From: aurel32 Date: Tue, 16 Sep 2008 22:44:02 +0000 (+0000) Subject: target-alpha: convert arith2 instructions to TCG X-Git-Tag: TizenStudio_2.0_p2.3~10991 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ce5ea051df859e0e580ba8afb37d97afc06cf836;p=sdk%2Femulator%2Fqemu.git target-alpha: convert arith2 instructions to TCG Replace gen_arith2 generic macro and dyngon ops by instruction specific optimized TCG code. Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162 --- diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 91c1b0e..88b1929 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -3,3 +3,9 @@ #endif DEF_HELPER(void, helper_tb_flush, (void)) + +DEF_HELPER(uint64_t, helper_amask, (uint64_t)) + +DEF_HELPER(uint64_t, helper_ctpop, (uint64_t)) +DEF_HELPER(uint64_t, helper_ctlz, (uint64_t)) +DEF_HELPER(uint64_t, helper_cttz, (uint64_t)) diff --git a/target-alpha/op.c b/target-alpha/op.c index 8ad2102..651900f 100644 --- a/target-alpha/op.c +++ b/target-alpha/op.c @@ -155,12 +155,6 @@ void OPPROTO op_excp (void) RETURN(); } -void OPPROTO op_load_amask (void) -{ - helper_amask(); - RETURN(); -} - void OPPROTO op_load_pcc (void) { helper_load_pcc(); @@ -340,37 +334,6 @@ void OPPROTO op_sra (void) RETURN(); } -void OPPROTO op_sextb (void) -{ - T0 = (int64_t)((int8_t)T0); - RETURN(); -} - -void OPPROTO op_sextw (void) -{ - T0 = (int64_t)((int16_t)T0); - RETURN(); - -} - -void OPPROTO op_ctpop (void) -{ - helper_ctpop(); - RETURN(); -} - -void OPPROTO op_ctlz (void) -{ - helper_ctlz(); - RETURN(); -} - -void OPPROTO op_cttz (void) -{ - helper_cttz(); - RETURN(); -} - void OPPROTO op_mskbl (void) { helper_mskbl(); diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 36b98b8..745c44d 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -65,7 +65,7 @@ void helper_excp (uint32_t excp, uint32_t error) cpu_loop_exit(); } -void helper_amask (void) +uint64_t helper_amask (uint64_t arg) { switch (env->implver) { case IMPLVER_2106x: @@ -74,9 +74,10 @@ void helper_amask (void) case IMPLVER_21164: case IMPLVER_21264: case IMPLVER_21364: - T0 &= ~env->amask; + arg &= ~env->amask; break; } + return arg; } void helper_load_pcc (void) @@ -210,19 +211,19 @@ void helper_mulqv () T0 = tl; } -void helper_ctpop (void) +uint64_t helper_ctpop (uint64_t arg) { - T0 = ctpop64(T0); + return ctpop64(arg); } -void helper_ctlz (void) +uint64_t helper_ctlz (uint64_t arg) { - T0 = clz64(T0); + return clz64(arg); } -void helper_cttz (void) +uint64_t helper_cttz (uint64_t arg) { - T0 = ctz64(T0); + return ctz64(arg); } static always_inline uint64_t byte_zap (uint64_t op, uint8_t mskb) diff --git a/target-alpha/op_helper.h b/target-alpha/op_helper.h index 7e79720..56f34a0 100644 --- a/target-alpha/op_helper.h +++ b/target-alpha/op_helper.h @@ -20,7 +20,6 @@ void helper_call_pal (uint32_t palcode); void helper_excp (uint32_t excp, uint32_t error); -void helper_amask (void); void helper_load_pcc (void); void helper_load_implver (void); void helper_load_fpcr (void); @@ -34,9 +33,6 @@ void helper_subqv (void); void helper_sublv (void); void helper_mullv (void); void helper_mulqv (void); -void helper_ctpop (void); -void helper_ctlz (void); -void helper_cttz (void); void helper_mskbl (void); void helper_extbl (void); void helper_insbl (void); diff --git a/target-alpha/translate.c b/target-alpha/translate.c index e6dc473..804cfcc 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "exec-all.h" #include "disas.h" +#include "host-utils.h" #include "helper.h" #include "tcg-op.h" #include "qemu-common.h" @@ -349,21 +350,6 @@ static always_inline void gen_fbcond (DisasContext *ctx, _gen_op_bcond(ctx); } -static always_inline void gen_arith2 (DisasContext *ctx, - void (*gen_arith_op)(void), - int rb, int rc, int islit, uint8_t lit) -{ - if (islit) - tcg_gen_movi_i64(cpu_T[0], lit); - else if (rb != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); - else - tcg_gen_movi_i64(cpu_T[0], 0); - (*gen_arith_op)(); - if (rc != 31) - tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]); -} - static always_inline void gen_arith3 (DisasContext *ctx, void (*gen_arith_op)(void), int ra, int rb, int rc, @@ -502,12 +488,6 @@ static always_inline void gen_s8subq (void) tcg_gen_sub_i64(cpu_T[0], cpu_T[0], cpu_T[1]); } -static always_inline void gen_amask (void) -{ - gen_op_load_amask(); - gen_op_bic(); -} - static always_inline int translate_one (DisasContext *ctx, uint32_t insn) { uint32_t palcode; @@ -793,7 +773,14 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) break; case 0x61: /* AMASK */ - gen_arith2(ctx, &gen_amask, rb, rc, islit, lit); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], helper_amask(lit)); + else if (rb != 31) + tcg_gen_helper_1_1(helper_amask, cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x64: /* CMOVLE */ @@ -1446,19 +1433,40 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) /* SEXTB */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; - gen_arith2(ctx, &gen_op_sextb, rb, rc, islit, lit); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int8_t)lit)); + else if (rb != 31) + tcg_gen_ext8s_i64(cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x01: /* SEXTW */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; - gen_arith2(ctx, &gen_op_sextw, rb, rc, islit, lit); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int16_t)lit)); + else if (rb != 31) + tcg_gen_ext16s_i64(cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x30: /* CTPOP */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; - gen_arith2(ctx, &gen_op_ctpop, rb, rc, 0, 0); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], ctpop64(lit)); + else if (rb != 31) + tcg_gen_helper_1_1(helper_ctpop, cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x31: /* PERR */ @@ -1471,13 +1479,27 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) /* CTLZ */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; - gen_arith2(ctx, &gen_op_ctlz, rb, rc, 0, 0); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], clz64(lit)); + else if (rb != 31) + tcg_gen_helper_1_1(helper_ctlz, cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x33: /* CTTZ */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; - gen_arith2(ctx, &gen_op_cttz, rb, rc, 0, 0); + if (likely(rc != 31)) { + if (islit) + tcg_gen_movi_i64(cpu_ir[rc], ctz64(lit)); + else if (rb != 31) + tcg_gen_helper_1_1(helper_cttz, cpu_ir[rc], cpu_ir[rb]); + else + tcg_gen_movi_i64(cpu_ir[rc], 0); + } break; case 0x34: /* UNPKBW */