From: Zou Nan hai <nanhai.zou@intel.com>
Date: Fri, 25 Jun 2010 05:40:22 +0000 (+0800)
Subject: drm/i915: Enable RC6 on Ironlake.
X-Git-Tag: accepted/tizen/common/20141203.182822~10309^2~12
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ce17178094f368d9e3f39b2cb4303da5ed633dd4;p=platform%2Fkernel%2Flinux-arm64.git

drm/i915: Enable RC6 on Ironlake.

RC6 allows the GPU to enter a lower power state when the GPU is idle.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
[anholt: Fixed the !renderctx error path to actually not enable RC6.]
Signed-off-by: Eric Anholt <eric@anholt.net>
---

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4668e9b..149c18b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5753,7 +5753,8 @@ void intel_init_clock_gating(struct drm_device *dev)
 				   ILK_DPFC_DIS2 |
 				   ILK_CLK_FBC);
 		}
-		return;
+		if (IS_GEN6(dev))
+			return;
 	} else if (IS_G4X(dev)) {
 		uint32_t dspclk_gate;
 		I915_WRITE(RENCLK_GATE_D1, 0);
@@ -5814,9 +5815,11 @@ void intel_init_clock_gating(struct drm_device *dev)
 				OUT_RING(MI_FLUSH);
 				ADVANCE_LP_RING();
 			}
-		} else
+		} else {
 			DRM_DEBUG_KMS("Failed to allocate render context."
-				       "Disable RC6\n");
+				      "Disable RC6\n");
+			return;
+		}
 	}
 
 	if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {