From: Kan Liang Date: Thu, 18 Aug 2022 18:44:29 +0000 (-0700) Subject: perf/x86/intel: Fix pebs event constraints for ADL X-Git-Tag: v6.1-rc5~519^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cde643ff75bc20c538dfae787ca3b587bab16b50;p=platform%2Fkernel%2Flinux-starfive.git perf/x86/intel: Fix pebs event constraints for ADL According to the latest event list, the LOAD_LATENCY PEBS event only works on the GP counter 0 and 1 for ADL and RPL. Update the pebs event constraints table. Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support") Reported-by: Ammy Yi Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20220818184429.2355857-1-kan.liang@linux.intel.com --- diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index e5b5874..de1f55d 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -830,7 +830,7 @@ struct event_constraint intel_glm_pebs_event_constraints[] = { struct event_constraint intel_grt_pebs_event_constraints[] = { /* Allow all events as PEBS with no flags */ - INTEL_HYBRID_LAT_CONSTRAINT(0x5d0, 0xf), + INTEL_HYBRID_LAT_CONSTRAINT(0x5d0, 0x3), INTEL_HYBRID_LAT_CONSTRAINT(0x6d0, 0xf), EVENT_CONSTRAINT_END };