From: Sascha Hauer Date: Mon, 4 Jun 2012 12:58:07 +0000 (+0200) Subject: ARM i.MX53: Fix PLL4 base address X-Git-Tag: v3.5-rc4~35^2~6^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cdd781ab1906d039c2a93078385645d2d5af8491;p=platform%2Fkernel%2Flinux-exynos.git ARM i.MX53: Fix PLL4 base address MX53_DPLL4_BASE accidently returned the base address of PLL3. Fix this. Signed-off-by: Sascha Hauer Cc: stable@vger.kernel.org --- diff --git a/arch/arm/mach-imx/crm-regs-imx5.h b/arch/arm/mach-imx/crm-regs-imx5.h index 5e11ba7..5e3f1f0 100644 --- a/arch/arm/mach-imx/crm-regs-imx5.h +++ b/arch/arm/mach-imx/crm-regs-imx5.h @@ -23,7 +23,7 @@ #define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR) #define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR) #define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) -#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) +#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR) /* PLL Register Offsets */ #define MXC_PLL_DP_CTL 0x00