From: David Wu <david.wu@rock-chips.com>
Date: Tue, 16 Apr 2019 13:50:56 +0000 (+0800)
Subject: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
X-Git-Tag: v2019.07-rc2~8^2~19
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cd8f00ce08102d2dbb350c76bbb53f7b0f804b7d;p=platform%2Fkernel%2Fu-boot.git

pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux

RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 1fa601d..5040cd8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	/* bank0 is special, there are no higher 16 bit writing bits. */
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(mask << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = (mask << (bit + 16));
+	}
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);