From: Thomas Gleixner <tglx@linutronix.de>
Date: Wed, 30 Jan 2008 12:34:08 +0000 (+0100)
Subject: x86: clflush_page_range needs mfence
X-Git-Tag: v3.12-rc1~24034^2~33
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cd8ddf1a2800026dd58433333cce7a65cbc6c6d2;p=kernel%2Fkernel-generic.git

x86: clflush_page_range needs mfence

clflush is an unordered operation with respect to other memory
traffic, including other CLFLUSH instructions. This needs proper
fencing with mfence.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index cdd2ea2..90b658a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -25,12 +25,24 @@ within(unsigned long addr, unsigned long start, unsigned long end)
 /*
  * Flushing functions
  */
+
+
+/**
+ * clflush_cache_range - flush a cache range with clflush
+ * @addr:	virtual start address
+ * @size:	number of bytes to flush
+ *
+ * clflush is an unordered instruction which needs fencing with mfence
+ * to avoid ordering issues.
+ */
 void clflush_cache_range(void *addr, int size)
 {
 	int i;
 
+	mb();
 	for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
 		clflush(addr+i);
+	mb();
 }
 
 static void __cpa_flush_all(void *arg)