From: aurel32 Date: Sun, 4 Jan 2009 22:10:09 +0000 (+0000) Subject: Add vsldoi instruction. X-Git-Tag: Tizen_Studio_1.3_Release_p2.3.1~1405^2~17^2~9478 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cd633b10fd99faeb01c94ba35ec35f48f4e86a68;p=sdk%2Femulator%2Fqemu.git Add vsldoi instruction. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6171 c046a42c-6fe2-441c-8c8c-71466251a162 --- diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 16e1bf8ff7..f8eb876627 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -155,6 +155,7 @@ DEF_HELPER_2(lvsr, void, avr, tl); DEF_HELPER_3(vrlb, void, avr, avr, avr) DEF_HELPER_3(vrlh, void, avr, avr, avr) DEF_HELPER_3(vrlw, void, avr, avr, avr) +DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32) DEF_HELPER_1(efscfsi, i32, i32) DEF_HELPER_1(efscfui, i32, i32) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 7f149c5ad2..fc5f20eb25 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -2145,6 +2145,34 @@ VSL(h, u16) VSL(w, u32) #undef VSL +void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) +{ + int sh = shift & 0xf; + int i; + ppc_avr_t result; + +#if defined(WORDS_BIGENDIAN) + for (i = 0; i < ARRAY_SIZE(r->u8); i++) { + int index = sh + i; + if (index > 0xf) { + result.u8[i] = b->u8[index-0x10]; + } else { + result.u8[i] = a->u8[index]; + } + } +#else + for (i = 0; i < ARRAY_SIZE(r->u8); i++) { + int index = (16 - sh) + i; + if (index > 0xf) { + result.u8[i] = a->u8[index-0x10]; + } else { + result.u8[i] = b->u8[index]; + } + } +#endif + *r = result; +} + void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 93c4177d3b..745da780df 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -374,6 +374,8 @@ EXTRACT_HELPER(UIMM, 0, 16); EXTRACT_HELPER(NB, 11, 5); /* Shift count */ EXTRACT_HELPER(SH, 11, 5); +/* Vector shift count */ +EXTRACT_HELPER(VSH, 6, 4); /* Mask start */ EXTRACT_HELPER(MB, 6, 5); /* Mask end */ @@ -6268,6 +6270,25 @@ GEN_VXFORM(vrlb, 2, 0); GEN_VXFORM(vrlh, 2, 1); GEN_VXFORM(vrlw, 2, 2); +GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) +{ + TCGv_ptr ra, rb, rd; + TCGv sh; + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + ra = gen_avr_ptr(rA(ctx->opcode)); + rb = gen_avr_ptr(rB(ctx->opcode)); + rd = gen_avr_ptr(rD(ctx->opcode)); + sh = tcg_const_i32(VSH(ctx->opcode)); + gen_helper_vsldoi (rd, ra, rb, sh); + tcg_temp_free_ptr(ra); + tcg_temp_free_ptr(rb); + tcg_temp_free_ptr(rd); + tcg_temp_free(sh); +} + /*** SPE extension ***/ /* Register moves */