From: Andrew Cagney <cagney@redhat.com>
Date: Fri, 11 Jul 1997 21:36:11 +0000 (+0000)
Subject: Tests for mips r5900 instructions
X-Git-Tag: gdb-4_18~5244
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ccc034af675a7392fd0b01c314230be71d4e5ff2;p=external%2Fbinutils.git

Tests for mips r5900 instructions
---

diff --git a/sim/testsuite/.Sanitize b/sim/testsuite/.Sanitize
index 3fbbadd..78f9367 100644
--- a/sim/testsuite/.Sanitize
+++ b/sim/testsuite/.Sanitize
@@ -39,6 +39,7 @@ Things-to-lose:
 
 common
 tic80-coff
+mips64vr5900el-elf
 
 Do-last:
 
diff --git a/sim/testsuite/mips64vr5900el-elf/loop.s b/sim/testsuite/mips64vr5900el-elf/loop.s
new file mode 100644
index 0000000..22ffb89
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/loop.s
@@ -0,0 +1,6 @@
+	.text
+	.align	2
+	.globl	_start
+	.ent	_start
+_start:
+	jal	_start
diff --git a/sim/testsuite/mips64vr5900el-elf/t-macros.i b/sim/testsuite/mips64vr5900el-elf/t-macros.i
new file mode 100644
index 0000000..47844a7
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-macros.i
@@ -0,0 +1,107 @@
+# NB: In the below, the 64bit values are embeded into the
+# machine code.  The address of which being determined
+# by a jal (after a jump to an aligned address).
+
+	.macro load reg hi lo
+	j 1f
+	nop
+	.align 3
+1:	jal 2f
+	nop
+	.quad \hi
+	.quad \lo
+2:
+	ld \reg, 0($31)
+	pcpyld	\reg, \reg, $0
+	ld \reg, 8($31)
+	.endm
+
+	.macro check10 hi lo
+	j 1f
+	nop
+	.align 3
+1:	jal 2f
+	nop
+	.quad \hi
+	.quad \lo	
+2:	pcpyud	$11, $10, $0
+	ld	$5, 0($31)
+	beq	$11, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	ld	$5, 8($31)
+	beq	$10, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	.endm
+
+	.macro checkHI hi lo
+	j 1f
+	nop
+	.align 3
+1:	jal 2f
+	nop
+	.quad \hi
+	.quad \lo
+2:	mfhi1	$11
+	ld	$5, 0($31)
+	beq	$11, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	mfhi	$11
+	ld	$5, 8($31)
+	beq	$11, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	.endm
+
+
+	.macro checkLO hi lo
+	j 1f
+	nop
+	.align 3
+1:	jal 2f
+	nop
+	.quad \hi
+	.quad \lo
+2:	mflo1	$11
+	ld	$5, 0($31)
+	beq	$11, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	mflo	$11
+	ld	$5, 8($31)
+	beq	$11, $5, 3f
+	nop
+	li	$4, 47
+	break	1023
+	nop
+3:	nop
+	.endm
+
+	.macro start
+	.globl _start
+	.set noreorder
+_start:
+	.endm
+
+	.macro exit0
+	li	$4, 0
+	break 1023
+	nop
+	.endm
diff --git a/sim/testsuite/mips64vr5900el-elf/t-paddb.s b/sim/testsuite/mips64vr5900el-elf/t-paddb.s
new file mode 100644
index 0000000..afc8e3a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-paddb.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_paddb:
+        load $8 0x0007210642056304 0x8403a502c601e701
+	load $9 0x01f902fa03fb04fc 0x05fd06fe07ff08ff
+        paddb   $10,$9,$8
+	check10 0x0100230045006700 0x8900ab00cd00ef00
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-paddsb.s b/sim/testsuite/mips64vr5900el-elf/t-paddsb.s
new file mode 100644
index 0000000..0432fbf
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-paddsb.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_paddsb:
+	load $8 0x0087218642856384 0x8403a502c601e701
+	load $9 0x01f902fa03fb04fc 0x057d067e077f087f
+        paddsb  $10,$9,$8
+	check10 0x0180238045806780 0x897fab7fcd7fef7f
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-paddsh.s b/sim/testsuite/mips64vr5900el-elf/t-paddsh.s
new file mode 100644
index 0000000..01933fd
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-paddsh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_paddsh:
+        load $8 0x0122800745658006 0x89a80005cdeb0004
+        load $9 0x0001fff90002fffa 0x00037ffb00047ffc
+        paddsh  $10,$9,$8
+	check10 0x0123800045678000 0x89ab7fffcdef7fff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-paddsw.s b/sim/testsuite/mips64vr5900el-elf/t-paddsw.s
new file mode 100644
index 0000000..55926bd
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-paddsw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_paddsw:
+	load $8 0x0123456680000007 0x89abcded00000006
+        load $9 0x00000001fffffff9 0x000000027ffffffa
+        paddsw  $10,$9,$8
+	check10 0x0123456780000000 0x89abcdef7fffffff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-paddub.s b/sim/testsuite/mips64vr5900el-elf/t-paddub.s
new file mode 100644
index 0000000..cc90b26
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-paddub.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_paddub:
+        load $8 0x0007210642056304 0x8403a502c601e701
+	load $9 0x01f902fa03fb04fc 0x05fd06fe07ff08ff
+        paddub  $10,$9,$8
+	check10 0x01ff23ff45ff67ff 0x89ffabffcdffefff
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-padduh.s b/sim/testsuite/mips64vr5900el-elf/t-padduh.s
new file mode 100644
index 0000000..18b564a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-padduh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_padduh:
+        load $8 0x0122000745650006 0x89a80005cdeb0004
+	load $9 0x0001fff90002fffa 0x0003fffb0004fffc
+        padduh  $10,$9,$8
+	check10 0x0123ffff4567ffff 0x89abffffcdefffff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-padduw.s b/sim/testsuite/mips64vr5900el-elf/t-padduw.s
new file mode 100644
index 0000000..fb7d665
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-padduw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_padduw:
+	load $8 0x0123456600000007 0x89abcded00000006
+	load $9 0x00000001fffffff9 0x00000002fffffffa
+        padduw  $10,$9,$8
+	check10 0x01234567ffffffff 0x89abcdefffffffff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pcpyh.s b/sim/testsuite/mips64vr5900el-elf/t-pcpyh.s
new file mode 100644
index 0000000..c6954a0
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pcpyh.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_pcpyh:
+	load $7 0x0000000000001111 0x000000000000ffff
+        pcpyh   $10,$7           #Expectation:
+	check10 0x1111111111111111 0xffffffffffffffff 
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pdivbw.s b/sim/testsuite/mips64vr5900el-elf/t-pdivbw.s
new file mode 100644
index 0000000..53f5d67
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pdivbw.s
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+	start
+
+test_pdivbw:
+        load $7 0x7fffffff80000000 0x0000000100000001
+	load $8 0x0000000000000000 0x000000000000ffff
+        pdivbw  $7,$8          #Expectation:
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x8000000180000000 0xffffffffffffffff
+
+test_pdivbw_0:
+        load $7 0x7fffffff80000000 0x0000000100000001
+	load $8 0x0000000000000000 0x0000000000000000
+        pdivbw  $7,$8          #Expectation:
+	# don't crash!
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pdivuw.s b/sim/testsuite/mips64vr5900el-elf/t-pdivuw.s
new file mode 100644
index 0000000..3391871
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pdivuw.s
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+	start
+
+test_pdivuw:
+	load $7 0x000000007fffffff 0xffffffff80000000
+	load $8 0xffffffffffffffff 0xffffffffffffffff
+        pdivuw    $7,$8           #Expectation:
+        checkHI 0x000000007fffffff 0xffffffff80000000
+        checkLO 0x0000000000000000 0x0000000000000000
+ 
+test_pdivuw_0:
+	load $7 0x000000007fffffff 0xffffffff80000000
+	load $8 0x0000000000000000 0x0000000000000000
+        pdivuw    $7,$8           #Expectation:
+	# don't crash!
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pdivw.s b/sim/testsuite/mips64vr5900el-elf/t-pdivw.s
new file mode 100644
index 0000000..3bad245
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pdivw.s
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+	start
+
+test_pdivw:
+	load $7 0x000000007fffffff 0xffffffff80000000
+	load $8 0xffffffffffffffff 0xffffffffffffffff
+        pdivw   $7,$8           #Expectation:
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0xffffffff80000001 0xffffffff80000000
+
+test_pdivw_0:
+	load $7 0x000000007fffffff 0xffffffff80000000
+	load $8 0x0000000000000000 0x0000000000000000
+        pdivw   $7,$8           #Expectation:
+	# don't crash!
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pexcw.s b/sim/testsuite/mips64vr5900el-elf/t-pexcw.s
new file mode 100644
index 0000000..4f96703
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pexcw.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_pexcw:
+        load $8 0x1111111133333333 0x2222222244444444
+        pexcw   $10,$8   #Expectation:
+	check10 0x1111111122222222 0x3333333344444444
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pexoh.s b/sim/testsuite/mips64vr5900el-elf/t-pexoh.s
new file mode 100644
index 0000000..f1533d6
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pexoh.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_pexoh:
+        load $8 0x1111444433332222 0x5555888877776666
+        pexoh  $10,$8   #Expectation:
+        check10 0x1111222233334444 0x5555666677778888
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pext5.s b/sim/testsuite/mips64vr5900el-elf/t-pext5.s
new file mode 100644
index 0000000..3a59565
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pext5.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_pext5:	
+	load $8 0x0000D6B50000D6B5 0x0000D6B50000D6B5
+        pext5   $10, $8
+	check10 0x80a8a8a880a8a8a8 0x80a8a8a880a8a8a8
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextlb.s b/sim/testsuite/mips64vr5900el-elf/t-pextlb.s
new file mode 100644
index 0000000..eb4e200
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextlb.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextlb:	
+	load $8 0x0000000000000000 0x0807060504030201
+	load $9 0x0000000000000000 0x100F0E0D0C0B0A09
+        pextlb  $10, $8, $9
+	check10 0x0810070F060E050D 0x040C030B020A0109
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextlh.s b/sim/testsuite/mips64vr5900el-elf/t-pextlh.s
new file mode 100644
index 0000000..284f130
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextlh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextlh:	
+	load $8 0x0000000000000000 0x0807060504030201
+	load $9 0x0000000000000000 0x100F0E0D0C0B0A09
+        pextlh  $10, $8, $9
+	check10 0x0807100F06050E0D 0x04030C0B02010A09
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextlw.s b/sim/testsuite/mips64vr5900el-elf/t-pextlw.s
new file mode 100644
index 0000000..1294926
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextlw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextlw:	
+	load $8 0x0000000000000000 0x0807060504030201
+	load $9 0x0000000000000000 0x100F0E0D0C0B0A09
+        pextlw  $10, $8, $9
+	check10 0x08070605100F0E0D 0x040302010C0B0A09
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextub.s b/sim/testsuite/mips64vr5900el-elf/t-pextub.s
new file mode 100644
index 0000000..562d304
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextub.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextub:	
+	load $8 0x0807060504030201 0x0000000000000000
+	load $9 0x100F0E0D0C0B0A09 0x0000000000000000
+        pextub  $10, $8, $9
+	check10 0x0810070F060E050D 0x040C030B020A0109
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextuh.s b/sim/testsuite/mips64vr5900el-elf/t-pextuh.s
new file mode 100644
index 0000000..e8c45f9
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextuh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextuh:	
+	load $8 0x0807060504030201 0x0000000000000000
+	load $9 0x100F0E0D0C0B0A09 0x0000000000000000
+        pextuh  $10, $8, $9
+	check10 0x0807100F06050E0D 0x04030C0B02010A09
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pextuw.s b/sim/testsuite/mips64vr5900el-elf/t-pextuw.s
new file mode 100644
index 0000000..3a7745d
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pextuw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pextuw:	
+	load $8 0x0807060504030201 0x0000000000000000
+	load $9 0x100F0E0D0C0B0A09 0x0000000000000000
+        pextuw  $10, $8, $9
+	check10 0x08070605100F0E0D 0x040302010C0B0A09
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-phmaddh.s b/sim/testsuite/mips64vr5900el-elf/t-phmaddh.s
new file mode 100644
index 0000000..ef8ddb9
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-phmaddh.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_phmaddh:	
+	load $7 0x8000800080007fff 0x800080007fff8000
+	load $8 0x8000800080007fff 0x80007fff80007fff
+        phmaddh    $10,$7,$8      #Expectation:
+        check10 0x800000007fff0001 0x0000800080010000
+        #checkHI xxxxxxxxxx80000000 0xxxxxxxxx00008000
+        #checkLO xxxxxxxxxx7fff0001 0xxxxxxxxx80010000
+	pmfhl.lw $10
+	check10 0x800000007fff0001 0x0000800080010000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-phmsubh.s b/sim/testsuite/mips64vr5900el-elf/t-phmsubh.s
new file mode 100644
index 0000000..833c09c
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-phmsubh.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_phmsubh:	
+	load $7 0x8000800080007fff 0x800080007fff8000
+	load $8 0x8000800080007fff 0x80007fff80007fff
+        phmsubh    $10,$7,$8      #Expectation:
+	check10 0x000000000000ffff 0x7fff800000000000
+	#checkHI 0xxxxxxxxx00000000 0xxxxxxxxx7fff8000
+	#checkLO 0xxxxxxxxx0000ffff 0xxxxxxxxx00000000
+	pmfhl.lw $10
+	check10 0x000000000000ffff 0x7fff800000000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pinth.s b/sim/testsuite/mips64vr5900el-elf/t-pinth.s
new file mode 100644
index 0000000..bf2b592
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pinth.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pinth:	
+        load $8 0x1111333355557777 0xffffffffffffffff
+        load $9 0xffffffffffffffff 0x2222444466668888
+        pinth   $10,$8,$9        #Expectation:
+        check10 0x1111222233334444 0x5555666677778888
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pintoh.s b/sim/testsuite/mips64vr5900el-elf/t-pintoh.s
new file mode 100644
index 0000000..d2c5481
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pintoh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_pintoh:	
+        load $8 0xffff1111ffff3333 0xffff5555ffff7777
+	load $9 0xffff2222ffff4444 0xffff6666ffff8888
+        pintoh $10,$8,$9        #Expectation:
+	check10 0x1111222233334444 0x5555666677778888
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmaddh.s b/sim/testsuite/mips64vr5900el-elf/t-pmaddh.s
new file mode 100644
index 0000000..860a673
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmaddh.s
@@ -0,0 +1,19 @@
+.include "t-macros.i"
+
+	start
+
+test_pmaddh:	
+        load $6 0x01237fff45677fff 0x89ab8000cdef8000
+        load $7 0x00017fff00017fff 0x00017fff00018000
+        load $8 0x0000000000007fff 0x00000000ffff8000
+        load $9 0x00000000ffff8000 0x0000000000007fff
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmaddh    $10,$6,$7      #Expectation:
+        check10 0x3fff80003ffe8001 0xc000000040007fff
+        checkHI 0x000001233fff8000 0xffff89abc0000000
+        checkLO 0x000045673ffe8001 0xffffcdef40007fff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmadduw.s b/sim/testsuite/mips64vr5900el-elf/t-pmadduw.s
new file mode 100644
index 0000000..8335f49
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmadduw.s
@@ -0,0 +1,33 @@
+.include "t-macros.i"
+
+	start
+
+test_pmadduw:
+        load $6 0x0123456780000000 0x89abcdef7fffffff
+        load $7 0x0123456780000000 0x89abcdef7fffffff
+	load $8 0x0123456700000000 0x89abcdefffffffff
+	load $9 0x012345677fffffff 0x89abcdef80000000
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmadduw    $10,$6,$7       #Expectation:
+        check10 0x400000007fffffff 0x3ffffffe80000001
+        checkHI 0x0000000040000000 0x000000003ffffffe
+        checkLO 0x000000007fffffff 0xffffffff80000001
+
+test_pmadduw2:
+        load $6 0x0123456780000000 0x89abcdef7fffffff
+        load $7 0x0123456780000000 0x89abcdef7fffffff
+        load $8 0x01234567ffffffff 0x89abcdef00000000
+        load $9 0x0123456780000000 0x89abcdef7fffffff
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmadduw    $10,$6,$7       #Expectation:
+	check10 0x3fffffff80000000 0x3fffffff80000000
+	checkHI 0x000000003fffffff 0x000000003fffffff
+	checkLO 0xffffffff80000000 0xffffffff80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmaddw.s b/sim/testsuite/mips64vr5900el-elf/t-pmaddw.s
new file mode 100644
index 0000000..8b79a2b
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmaddw.s
@@ -0,0 +1,33 @@
+.include "t-macros.i"
+
+	start
+
+test_pmaddw:
+        load $6 0x0123456780000000 0X89ABCDEF7FFFFFFF
+        load $7 0x0123456780000000 0X89ABCDEF7FFFFFFF
+	load $8 0x0123456700000000 0X89ABCDEFFFFFFFFF
+	load $9 0X012345677FFFFFFF 0X89ABCDEF80000000
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmaddw    $10,$6,$7       #Expectation:
+        check10 0x400000007fffffff 0x3ffffffe80000001
+        checkHI 0x0000000040000000 0x000000003FFFFFFE
+        checkLO 0x000000007fffffff 0xffffffff80000001
+
+test_pmaddw2:	
+        load $6 0x0123456780000000 0x89abcdef7fffffff
+        load $7 0x0123456780000000 0x89abcdef7fffffff
+	load $8 0x01234567ffffffff 0x89abcdef00000000
+	load $9 0x0123456780000000 0x89abcdef7fffffff
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmaddw    $10,$6,$7       #Expectation:
+        check10 0x3fffffff80000000 0x3fffffff80000000
+        checkHI 0x000000003fffffff 0x000000003fffffff
+        checkLO 0xffffffff80000000 0xffffffff80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lh.s b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lh.s
new file mode 100644
index 0000000..fdace07
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lh.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_pmfhl_lh:	
+	load $7 0xffff1111ffff2222 0xffff5555ffff6666
+	load $8 0xffff3333ffff4444 0xffff7777ffff8888
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.lh $10    #Expectation:
+	check10 0x1111222233334444 0x5555666677778888     
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lw.s b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lw.s
new file mode 100644
index 0000000..fe4e319
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-lw.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_pmfhl_lw:	
+	load $7 0xffffffff11111111 0xffffffff33333333
+	load $8 0xffffffff22222222 0xffffffff44444444
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.lw $10    #Expectation:
+        check10 0x1111111122222222 0x3333333344444444
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmfhl-sh.s b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-sh.s
new file mode 100644
index 0000000..9d0319e
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-sh.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_pmfhl_sh:	
+	load $7 0x7fffffffffff0000 0xffffffff00007fff
+	load $8 0x0007ffffffffffff 0xffff00007fffffff
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.sh $10    #Expectation:
+	check10 0x7fff80007fffffff 0xffff7fff80007fff           
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmfhl-slw.s b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-slw.s
new file mode 100644
index 0000000..e6c7455
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-slw.s
@@ -0,0 +1,25 @@
+.include "t-macros.i"
+
+	start
+
+test_pmfhl_slw_ok:	
+        load $7 0xffffffffffffffff 0xffffffff7fffffff
+	load $8 0xffffffffffffffff 0xffffffffffffffff
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.slw $10   #Expectation:
+	check10 0xffffffffffffffff 0x000000007fffffff
+ 
+test_pmfhl_slw:	
+        load $7 0xffffffffffffffff 0xffffffff7fffffff
+	load $8 0xffffffff00000000 0xffffffffffffffff
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.slw $10   #Expectation:
+	check10 0xffffffff80000000 0x000000007fffffff
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmfhl-uw.s b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-uw.s
new file mode 100644
index 0000000..4da05d5
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmfhl-uw.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+test_pmfhl_uw:
+	load $7 0x11111111ffffffff 0x33333333ffffffff
+	load $8 0x22222222ffffffff 0x44444444ffffffff
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        pmfhl.uw $10    #Expectation:
+        check10 0x1111111122222222 0x3333333344444444        
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmsubh.s b/sim/testsuite/mips64vr5900el-elf/t-pmsubh.s
new file mode 100644
index 0000000..d90f960
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmsubh.s
@@ -0,0 +1,19 @@
+.include "t-macros.i"
+
+	start
+
+test_pmsubh:	
+        load $6 0x01237fff45677fff 0x89ab8000cdef8000
+        load $7 0x00017fff00017fff 0x00017fff00018000
+	load $8 0x000001237fffffff 0xffff89ab7fffffff
+        load $9 0x0000456780000000 0xffffcdef80000000
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmsubh    $10,$6,$7      #Expectation:
+        check10 0x4000fffe4000ffff 0xbfff7fff40000000
+        checkHI 0x000000004000fffe 0x00000000bfff7fff
+        checkLO 0x000000004000ffff 0x0000000040000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmthl-lw.s b/sim/testsuite/mips64vr5900el-elf/t-pmthl-lw.s
new file mode 100644
index 0000000..5ce958a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmthl-lw.s
@@ -0,0 +1,17 @@
+.include "t-macros.i"
+
+	start
+
+test_pmthl_lw:	
+        load $7 0x11111111ffffffff 0x33333333ffffffff
+        load $8 0x55555555ffffffff 0x77777777ffffffff
+        pmthi   $7
+        pmtlo   $8
+        nop
+        nop
+        load $7 0x2222222266666666 0x4444444488888888
+        pmthl.lw $7
+        checkHI 0x1111111122222222 0x3333333344444444
+        checkLO 0x5555555566666666 0x7777777788888888               
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmulth.s b/sim/testsuite/mips64vr5900el-elf/t-pmulth.s
new file mode 100644
index 0000000..64a289b
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmulth.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+test_pmulth:
+	load $8 0x1234ffff2b3c8000 0x33947fff37bc7fff
+	load $9 0x0001ffff00028000 0x00037fff00048000
+        pmulth	$10,$8,$9   #Expectation:
+        check10 0x0000000140000000 0x3fff0001c0008000
+        checkHI 0x0000123400000001 0x00009abc3fff0001
+        checkLO 0x0000567840000000 0x0000def0c0008000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmultuw.s b/sim/testsuite/mips64vr5900el-elf/t-pmultuw.s
new file mode 100644
index 0000000..faffb1a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmultuw.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+test_multuw:
+	load $8 0xffffffff7fffffff 0x0000000080000000
+	load $9 0x00000000ffffffff 0x00000000ffffffff
+        pmultuw    $10,$8,$9
+	check10 0x7ffffffe80000001 0x7fffffff80000000
+        checkHI 0x000000007ffffffe 0x000000007fffffff
+        checkLO 0xffffffff80000001 0xffffffff80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-pmultw.s b/sim/testsuite/mips64vr5900el-elf/t-pmultw.s
new file mode 100644
index 0000000..18eec98
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-pmultw.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+test_multw:
+	load $8 0xffffffff7fffffff 0x0000000080000000
+	load $9 0x10000000ffffffff 0x00000000ffffffff
+	pmultw $10, $8, $9
+	check10 0xffffffff80000001 0x0000000080000000
+	checkHI 0xffffffffffffffff 0x0000000000000000
+	checkLO 0xffffffff80000001 0xffffffff80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-ppac5.s b/sim/testsuite/mips64vr5900el-elf/t-ppac5.s
new file mode 100644
index 0000000..a931d84
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-ppac5.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_ppac5:	
+	load $8 0x80a8a8a880a8a8a8 0x80a8a8a880a8a8a8
+        ppac5   $10, $8
+	check10 0x0000D6B50000D6B5 0x0000D6B50000D6B5
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-ppacb.s b/sim/testsuite/mips64vr5900el-elf/t-ppacb.s
new file mode 100644
index 0000000..d8645a8
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-ppacb.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_ppacb:	
+	load $8 0x0010000F000E000D 0x000C000B000A0009
+	load $9 0x0008000700060005 0x0004000300020001
+        ppacb   $10, $8, $9
+	check10 0x100F0E0D0C0B0A09 0x0807060504030201
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-ppach.s b/sim/testsuite/mips64vr5900el-elf/t-ppach.s
new file mode 100644
index 0000000..ce1113d
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-ppach.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_ppach:	
+	load $8 0x0010000F000E000D 0x000C000B000A0009
+	load $9 0x0008000700060005 0x0004000300020001
+        ppach $10, $8, $9
+	check10 0x000F000D000B0009 0x0007000500030001
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-ppacw.s b/sim/testsuite/mips64vr5900el-elf/t-ppacw.s
new file mode 100644
index 0000000..45c887a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-ppacw.s
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+	start
+
+test_ppacw:	
+	load $8 0x0010000F000E000D 0x000C000B000A0009
+	load $9 0x0008000700060005 0x0004000300020001
+        ppacw   $10, $8, $9
+	check10 0x000E000D000A0009 0x0006000500020001
+
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-prot3w.s b/sim/testsuite/mips64vr5900el-elf/t-prot3w.s
new file mode 100644
index 0000000..bc887ff
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-prot3w.s
@@ -0,0 +1,10 @@
+.include "t-macros.i"
+
+	start
+
+test_prot3w:	
+        load $8 0x3333333311111111 0x2222222244444444
+        prot3w  $10,$8       #Expectation:
+        check10 0x1111111122222222 0x3333333344444444
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psllvw.s b/sim/testsuite/mips64vr5900el-elf/t-psllvw.s
new file mode 100644
index 0000000..e7bdd9a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psllvw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psllvw:	
+        load $8 0x00000000ffffffff 0x00000000ffffffff
+        load $9 0x000000000000001f 0x000000000000001f
+        psllvw  $10,$8,$9       #Expectation:
+        check10 0xffffffff80000000 0xffffffff80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psravw.s b/sim/testsuite/mips64vr5900el-elf/t-psravw.s
new file mode 100644
index 0000000..5490047
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psravw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psravw:	
+        load $8 0x000000007fffffff 0x0000000080000000
+        load $9 0x0000000000000008 0x0000000000000008
+        psravw  $10,$8,$9       #Expectation:
+        check10 0x00000000007fffff 0xffffffffff800000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubsb.s b/sim/testsuite/mips64vr5900el-elf/t-psubsb.s
new file mode 100644
index 0000000..259d2ff
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubsb.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubsb:	
+        load $8 0x0200250148026b03 0x8efcb1fdd4fef780
+        load $9 0x0180028003810482 0x057c067d077e087f
+        psubsb  $10,$8,$9
+	check10 0x017f237f457f677f 0x8980ab80cd80ef80
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubsh.s b/sim/testsuite/mips64vr5900el-elf/t-psubsh.s
new file mode 100644
index 0000000..0f064f3
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubsh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubsh:	
+        load $8 0x0124000045690001 0x89aefffecdf3ffff
+        load $9 0x0001800000028000 0x00037ffe00047fff
+        psubsh  $10,$8,$9
+	check10 0x01237fff45677fff 0x89ab8000cdef8000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubsw.s b/sim/testsuite/mips64vr5900el-elf/t-psubsw.s
new file mode 100644
index 0000000..b83c750
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubsw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubsw:
+        load $8 0x0123456800000000 0x89abcdf1ffffffff
+        load $9 0x0000000180000000 0x000000027fffffff
+        psubsw  $10,$8,$9
+	check10 0x012345677fffffff 0x89abcdef80000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubub.s b/sim/testsuite/mips64vr5900el-elf/t-psubub.s
new file mode 100644
index 0000000..6f52577
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubub.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubub:	
+        load $8 0x0200250148026b03 0x8e04b105d406f77f
+        load $9 0x0101020203030404 0x0505060607070880
+        psubub  $10,$8,$9
+	check10 0x0100230045006700 0x8900ab00cd00ef00
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubuh.s b/sim/testsuite/mips64vr5900el-elf/t-psubuh.s
new file mode 100644
index 0000000..ab1bdfa
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubuh.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubuh:	
+        load $8 0x0124000045690001 0x89ae0002cdf30003
+        load $9 0x0001000100020002 0x0003000300040004
+        psubuh  $10,$8,$9
+	check10 0x0123000045670000 0x89ab0000cdef0000
+ 
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubuw.s b/sim/testsuite/mips64vr5900el-elf/t-psubuw.s
new file mode 100644
index 0000000..97b319f
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubuw.s
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+	start
+
+test_psubuw:	
+        load $8 0x0123456800000000 0x89abcdf100000001
+        load $9 0x0000000100000001 0x0000000200000002
+        psubuw  $10,$8,$9
+	check10 0x0123456700000000 0x89abcdef00000000
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-psubw.s b/sim/testsuite/mips64vr5900el-elf/t-psubw.s
new file mode 100644
index 0000000..95ca09a
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-psubw.s
@@ -0,0 +1,19 @@
+.include "t-macros.i"
+
+	start
+
+test_pmsubw:	
+        load $6 0x0123456780000000 0x89abcdef7fffffff
+        load $7 0x0123456780000000 0x89abcdef7fffffff
+        load $8 0x0123456780000000 0x89abcdef7fffffff
+        load $9 0x0123456700000000 0x89abcdefffffffff
+        pmthi    $8
+        pmtlo    $9
+        nop
+        nop
+        pmsubw    $10,$6,$7       #Expectation:
+        check10 0x4000000000000000 0x40000000fffffffe
+        checkHI 0x0000000040000000 0x0000000040000000
+        checkLO 0x0000000000000000 0xfffffffffffffffe
+	
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/t-qfsrv.s b/sim/testsuite/mips64vr5900el-elf/t-qfsrv.s
new file mode 100644
index 0000000..168a68b
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/t-qfsrv.s
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+	start
+
+test_qfsrv:
+        mtsab   $0,4
+        load $8 0x0000000000000000 0x0000000000000000
+	load $9 0xffffffffffffffff 0xffffffffffffffff
+        qfsrv   $10,$8,$9   #Expectation:
+        check10 0x00000000ffffffff 0xffffffffffffffff
+
+	exit0
diff --git a/sim/testsuite/mips64vr5900el-elf/tick.s b/sim/testsuite/mips64vr5900el-elf/tick.s
new file mode 100644
index 0000000..f82bcf6
--- /dev/null
+++ b/sim/testsuite/mips64vr5900el-elf/tick.s
@@ -0,0 +1,71 @@
+	# The main body of code loops on the variable FLAG, waiting
+	# for it to be set.  When set, the message `Tick' is displayed
+	# and the flag cleared.
+
+	# The interrupt handler, sets the global FLAG variable and
+	# then resumes normal execution.
+
+	.globl _start
+	.ent _start
+	.set noreorder
+_start:
+
+	# Patch the interrupt handler, setting it to an instruction
+	# sequence that jumps to this programs interrupt code.
+	la $4, handler
+	la $5, +0xffffffffBFC00200 + 0x180
+	lw $6, 0($4)  # BR $8
+	sw $6, 0($5)
+	lw $6, 4($4)  # NOP
+	sw $6, 4($5)
+
+	# establish two global pointer registers:	
+	la $8, flag         # r8 contains the address of FLAG
+	la $9, real_handler # r9 contains the address of the
+			    # real handler
+
+	# enable interrupt delivery
+	mfc0 $4, $12
+	nop ; nop ; nop
+	or $4, $4, 1
+	or $4, $4, 4 ; xor $4, $4, 4 # clear error level
+	mtc0 $4, $12
+	nop ; nop ; nop
+
+loop:	
+	lw $5, 0($8)
+	beq $5, $0, loop
+	nop
+	
+	# FLAG set, print the message Tick by calling
+	# write (1, str, 6)
+	sw $0, 0($8)	
+	li	$4, 1
+	la	$5, str
+	li	$6, 6
+	la	$2,+0xffffffffbfc00504
+	lw	$2, 0($2)
+	jal	$2
+	nop
+	j	loop
+	nop
+
+
+	# Instruction sequence that jumps to
+	# the real handler (address in r9).
+handler:	j $9
+		nop
+
+	# local interrupt handler, set FLAG and return
+real_handler:
+	li $10, 1
+	sw $10, 0($8) # flag = 1
+	eret
+	nop
+
+
+	.end	_start
+
+flag:
+	.word 0
+str:	.asciiz "Tick\r\n"