From: Alexey Kardashevskiy Date: Tue, 27 May 2014 05:36:32 +0000 (+1000) Subject: spapr_pci: spapr_iommu: Make DMA window a subregion X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~773^2~57 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cca7fad5765251fece44cd230156a101867522dd;p=sdk%2Femulator%2Fqemu.git spapr_pci: spapr_iommu: Make DMA window a subregion Currently the default DMA window is represented by a single MemoryRegion. However there can be more than just one window so we need a "root" memory region to be separated from the actual DMA window(s). This introduces a "root" IOMMU memory region and adds a subregion for the default DMA 32bit window. Following patches will add other subregion(s). This initializes a default DMA window subregion size to the guest RAM size as this window can be switched into "bypass" mode which implements direct DMA mapping. Signed-off-by: Alexey Kardashevskiy Signed-off-by: Alexander Graf --- diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index b855e7c..2d50faf 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -135,7 +135,7 @@ static int spapr_tce_table_realize(DeviceState *dev) trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd); memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops, - "iommu-spapr", UINT64_MAX); + "iommu-spapr", ram_size); QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list); diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 56944c1..ba02032 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -610,6 +610,20 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS); phb->bus = bus; + /* + * Initialize PHB address space. + * By default there will be at least one subregion for default + * 32bit DMA window. + * Later the guest might want to create another DMA window + * which will become another memory subregion. + */ + sprintf(namebuf, "%s.iommu-root", sphb->dtbusname); + + memory_region_init(&sphb->iommu_root, OBJECT(sphb), + namebuf, UINT64_MAX); + address_space_init(&sphb->iommu_as, &sphb->iommu_root, + sphb->dtbusname); + pci_setup_iommu(bus, spapr_pci_dma_iommu, sphb); pci_bus_set_route_irq_fn(bus, spapr_route_intx_pin_to_irq); @@ -648,8 +662,10 @@ static void spapr_phb_finish_realize(sPAPRPHBState *sphb, Error **errp) sphb->dtbusname); return ; } - address_space_init(&sphb->iommu_as, spapr_tce_get_iommu(sphb->tcet), - sphb->dtbusname); + + /* Register default 32bit DMA window */ + memory_region_add_subregion(&sphb->iommu_root, 0, + spapr_tce_get_iommu(sphb->tcet)); } static void spapr_phb_reset(DeviceState *qdev) diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 0f428a1..fcb6213 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -64,6 +64,7 @@ struct sPAPRPHBState { uint64_t dma_window_size; sPAPRTCETable *tcet; AddressSpace iommu_as; + MemoryRegion iommu_root; struct spapr_pci_lsi { uint32_t irq;