From: qing zhao Date: Thu, 5 Nov 2020 14:57:46 +0000 (+0100) Subject: i386: Fix PR97715 X-Git-Tag: upstream/12.2.0~12213 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cc32e81cdbb7696cd571bdb5ffe52f228f125df5;p=platform%2Fupstream%2Fgcc.git i386: Fix PR97715 This change fixes a bug in the i386 backend when adding -fzero-call-used-regs=all on a target that has no x87 registers. When there is no x87 registers available, we should not zero stack registers. gcc/ChangeLog: PR target/97715 * config/i386/i386.c (zero_all_st_registers): Return earlier when the FPU is disabled. gcc/testsuite/ChangeLog: PR target/97715 * gcc.target/i386/zero-scratch-regs-32.c: New test. --- diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 6fc6228..789ef72 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3640,6 +3640,11 @@ zero_all_vector_registers (HARD_REG_SET need_zeroed_hardregs) static bool zero_all_st_registers (HARD_REG_SET need_zeroed_hardregs) { + + /* If the FPU is disabled, no need to zero all st registers. */ + if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387)) + return false; + unsigned int num_of_st = 0; for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if ((STACK_REGNO_P (regno) || MMX_REGNO_P (regno)) diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c new file mode 100644 index 0000000..ca3261f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c @@ -0,0 +1,11 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -mno-80387" } */ + +int +foo (int x) +{ + return (x + 1); +} + +/* { dg-final { scan-assembler-not "fldz" } } */ +