From: Zack Rusin Date: Thu, 20 Sep 2007 15:33:35 +0000 (-0400) Subject: Make the rasterizer state in i915 use the cso semantics. X-Git-Tag: 062012170305~17580^2~390^2~4074 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cc2629f5912d1c608f830ab63f6c4e0875d2fcef;p=profile%2Fivi%2Fmesa.git Make the rasterizer state in i915 use the cso semantics. --- diff --git a/src/mesa/pipe/i915simple/i915_context.h b/src/mesa/pipe/i915simple/i915_context.h index 1a7df65..c582b06 100644 --- a/src/mesa/pipe/i915simple/i915_context.h +++ b/src/mesa/pipe/i915simple/i915_context.h @@ -127,6 +127,20 @@ struct i915_depth_stencil_state { unsigned depth_LIS6; }; +struct i915_rasterizer_state { + int light_twoside : 1; + unsigned st; + interp_mode color_interp; + + unsigned LIS4; + unsigned LIS7; + unsigned sc[1]; + + const struct pipe_rasterizer_state *templ; + + union { float f; unsigned u; } ds[2]; +}; + struct i915_context { struct pipe_context pipe; @@ -138,7 +152,7 @@ struct i915_context const struct i915_blend_state *blend; const struct pipe_sampler_state *sampler[PIPE_MAX_SAMPLERS]; const struct i915_depth_stencil_state *depth_stencil; - const struct pipe_rasterizer_state *rasterizer; + const struct i915_rasterizer_state *rasterizer; const struct pipe_shader_state *fs; struct pipe_alpha_test_state alpha_test; diff --git a/src/mesa/pipe/i915simple/i915_state.c b/src/mesa/pipe/i915simple/i915_state.c index 9611288..c7086c1 100644 --- a/src/mesa/pipe/i915simple/i915_state.c +++ b/src/mesa/pipe/i915simple/i915_state.c @@ -31,6 +31,7 @@ #include "pipe/draw/draw_context.h" #include "pipe/p_winsys.h" +#include "pipe/p_util.h" #include "i915_context.h" #include "i915_reg.h" @@ -437,9 +438,64 @@ static void i915_set_viewport_state( struct pipe_context *pipe, static void * i915_create_rasterizer_state(struct pipe_context *pipe, - const struct pipe_rasterizer_state *setup) + const struct pipe_rasterizer_state *rasterizer) { - return 0; + struct i915_rasterizer_state *cso = calloc(1, sizeof(struct i915_rasterizer_state)); + + cso->templ = rasterizer; + cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR; + cso->light_twoside = rasterizer->light_twoside; + cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE; + cso->ds[1].f = rasterizer->offset_scale; + if (rasterizer->poly_stipple_enable) { + cso->st |= ST1_ENABLE; + } + + if (rasterizer->scissor) + cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT; + else + cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT; + + switch (rasterizer->cull_mode) { + case PIPE_WINDING_NONE: + cso->LIS4 |= S4_CULLMODE_NONE; + break; + case PIPE_WINDING_CW: + cso->LIS4 |= S4_CULLMODE_CW; + break; + case PIPE_WINDING_CCW: + cso->LIS4 |= S4_CULLMODE_CCW; + break; + case PIPE_WINDING_BOTH: + cso->LIS4 |= S4_CULLMODE_BOTH; + break; + } + + { + int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf); + + cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT; + + if (rasterizer->line_smooth) + cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE; + } + + { + int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff); + + cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT; + } + + if (rasterizer->flatshade) { + cso->LIS4 |= (S4_FLATSHADE_ALPHA | + S4_FLATSHADE_COLOR | + S4_FLATSHADE_SPECULAR); + } + + cso->LIS7 = rasterizer->offset_units; /* probably incorrect */ + + + return cso; } static void i915_bind_rasterizer_state( struct pipe_context *pipe, @@ -447,10 +503,10 @@ static void i915_bind_rasterizer_state( struct pipe_context *pipe, { struct i915_context *i915 = i915_context(pipe); - i915->rasterizer = (struct pipe_rasterizer_state *)setup; + i915->rasterizer = (struct i915_rasterizer_state *)setup; /* pass-through to draw module */ - draw_set_rasterizer_state(i915->draw, setup); + draw_set_rasterizer_state(i915->draw, i915->rasterizer->templ); i915->dirty |= I915_NEW_RASTERIZER; } diff --git a/src/mesa/pipe/i915simple/i915_state_derived.c b/src/mesa/pipe/i915simple/i915_state_derived.c index dece697..572d270 100644 --- a/src/mesa/pipe/i915simple/i915_state_derived.c +++ b/src/mesa/pipe/i915simple/i915_state_derived.c @@ -44,8 +44,7 @@ static void calculate_vertex_layout( struct i915_context *i915 ) { const struct pipe_shader_state *fs = i915->fs; - const interp_mode colorInterp - = i915->rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR; + const interp_mode colorInterp = i915->rasterizer->color_interp; struct vertex_info *vinfo = &i915->current.vertex_info; uint front0 = 0, back0 = 0, front1 = 0, back1 = 0; boolean needW = 0; @@ -161,7 +160,7 @@ static void calculate_vertex_layout( struct i915_context *i915 ) if (front0) { back0 = draw_emit_vertex_attr(vinfo, TGSI_ATTRIB_BFC0, FORMAT_OMIT, colorInterp); - } + } if (back0) { back1 = draw_emit_vertex_attr(vinfo, TGSI_ATTRIB_BFC1, FORMAT_OMIT, colorInterp); diff --git a/src/mesa/pipe/i915simple/i915_state_dynamic.c b/src/mesa/pipe/i915simple/i915_state_dynamic.c index d97aeb8..845873b 100644 --- a/src/mesa/pipe/i915simple/i915_state_dynamic.c +++ b/src/mesa/pipe/i915simple/i915_state_dynamic.c @@ -165,18 +165,9 @@ const struct i915_tracked_state i915_upload_IAB = { static void upload_DEPTHSCALE( struct i915_context *i915 ) { - union { float f; unsigned u; } ds[2]; - - memset( ds, 0, sizeof(ds) ); - - /* I915_NEW_RASTERIZER - */ - ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE; - ds[1].f = i915->rasterizer->offset_scale; - - set_dynamic_indirect( i915, + set_dynamic_indirect( i915, I915_DYNAMIC_DEPTHSCALE_0, - &ds[0].u, + &(i915->rasterizer->ds[0].u), 2 ); } @@ -205,12 +196,10 @@ static void upload_STIPPLE( struct i915_context *i915 ) st[0] = _3DSTATE_STIPPLE; st[1] = 0; - - /* I915_NEW_RASTERIZER + + /* I915_NEW_RASTERIZER */ - if (i915->rasterizer->poly_stipple_enable) { - st[1] |= ST1_ENABLE; - } + st[1] |= i915->rasterizer->st; /* I915_NEW_STIPPLE @@ -248,20 +237,13 @@ const struct i915_tracked_state i915_upload_STIPPLE = { /*********************************************************************** - * Scissor. + * Scissor. */ static void upload_SCISSOR_ENABLE( struct i915_context *i915 ) { - unsigned sc[1]; - - if (i915->rasterizer->scissor) - sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT; - else - sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT; - - set_dynamic_indirect( i915, + set_dynamic_indirect( i915, I915_DYNAMIC_SC_ENA_0, - &sc[0], + &(i915->rasterizer->sc[0]), 1 ); } diff --git a/src/mesa/pipe/i915simple/i915_state_immediate.c b/src/mesa/pipe/i915simple/i915_state_immediate.c index 7de7f53..874c381 100644 --- a/src/mesa/pipe/i915simple/i915_state_immediate.c +++ b/src/mesa/pipe/i915simple/i915_state_immediate.c @@ -62,46 +62,7 @@ static void upload_S2S4(struct i915_context *i915) assert(LIS4); /* should never be zero? */ } - /* I915_NEW_RASTERIZER */ - switch (i915->rasterizer->cull_mode) { - case PIPE_WINDING_NONE: - LIS4 |= S4_CULLMODE_NONE; - break; - case PIPE_WINDING_CW: - LIS4 |= S4_CULLMODE_CW; - break; - case PIPE_WINDING_CCW: - LIS4 |= S4_CULLMODE_CCW; - break; - case PIPE_WINDING_BOTH: - LIS4 |= S4_CULLMODE_BOTH; - break; - } - - /* I915_NEW_RASTERIZER */ - { - int line_width = CLAMP((int)(i915->rasterizer->line_width * 2), 1, 0xf); - - LIS4 |= line_width << S4_LINE_WIDTH_SHIFT; - - if (i915->rasterizer->line_smooth) - LIS4 |= S4_LINE_ANTIALIAS_ENABLE; - } - - /* I915_NEW_RASTERIZER */ - { - int point_size = CLAMP((int) i915->rasterizer->point_size, 1, 0xff); - - LIS4 |= point_size << S4_POINT_WIDTH_SHIFT; - } - - /* I915_NEW_RASTERIZER */ - if (i915->rasterizer->flatshade) { - LIS4 |= (S4_FLATSHADE_ALPHA | - S4_FLATSHADE_COLOR | - S4_FLATSHADE_SPECULAR); - } - + LIS4 |= i915->rasterizer->LIS4; if (LIS2 != i915->current.immediate[I915_IMMEDIATE_S2] || LIS4 != i915->current.immediate[I915_IMMEDIATE_S4]) { @@ -198,7 +159,7 @@ static void upload_S7( struct i915_context *i915 ) /* I915_NEW_RASTERIZER */ - LIS7 = i915->rasterizer->offset_units; /* probably incorrect */ + LIS7 = i915->rasterizer->LIS7; /* probably incorrect */ if (LIS7 != i915->current.immediate[I915_IMMEDIATE_S7]) { i915->current.immediate[I915_IMMEDIATE_S7] = LIS7;