From: Roman Lebedev Date: Mon, 26 Dec 2022 21:41:59 +0000 (+0300) Subject: [NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG X-Git-Tag: upstream/17.0.6~22605 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cc051b07303687e7848447f024b90f69335667b6;p=platform%2Fupstream%2Fllvm.git [NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG --- diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll index 65ede91..9c343ac 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll @@ -5344,3 +5344,32 @@ define <32 x i8> @unpckh_v32i8(<32 x i8> %x, <32 x i8> %y) { ret <32 x i8> %unpckh } +define <32 x i8> @shuffle_v16i16_zextinreg_to_v8i32(<32 x i8> %a) { +; AVX1-LABEL: shuffle_v16i16_zextinreg_to_v8i32: +; AVX1: # %bb.0: +; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] +; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: retq +; +; AVX2OR512VL-LABEL: shuffle_v16i16_zextinreg_to_v8i32: +; AVX2OR512VL: # %bb.0: +; AVX2OR512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX2OR512VL-NEXT: retq +; +; XOPAVX1-LABEL: shuffle_v16i16_zextinreg_to_v8i32: +; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; XOPAVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] +; XOPAVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; XOPAVX1-NEXT: retq +; +; XOPAVX2-LABEL: shuffle_v16i16_zextinreg_to_v8i32: +; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; XOPAVX2-NEXT: retq + %b = shufflevector <32 x i8> %a, <32 x i8> , <32 x i32> + ret <32 x i8> %b +} diff --git a/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll b/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll index 99a48a6..6394fd1 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll @@ -1538,3 +1538,34 @@ define void @PR54562_mem(ptr %src, ptr %dst) { store <64 x i8> %shuffle2, ptr %dst, align 512 ret void } + +define <64 x i8> @shuffle_v32i16_zextinreg_to_v16i32(<64 x i8> %a) { +; AVX512F-LABEL: shuffle_v32i16_zextinreg_to_v16i32: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0 +; AVX512F-NEXT: retq +; +; AVX512BW-LABEL: shuffle_v32i16_zextinreg_to_v16i32: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero +; AVX512BW-NEXT: retq +; +; AVX512DQ-LABEL: shuffle_v32i16_zextinreg_to_v16i32: +; AVX512DQ: # %bb.0: +; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512DQ-NEXT: vextracti128 $1, %ymm0, %xmm0 +; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512DQ-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0 +; AVX512DQ-NEXT: retq +; +; AVX512VBMI-LABEL: shuffle_v32i16_zextinreg_to_v16i32: +; AVX512VBMI: # %bb.0: +; AVX512VBMI-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero +; AVX512VBMI-NEXT: retq + %b = shufflevector <64 x i8> %a, <64 x i8> , <64 x i32> + ret <64 x i8> %b +}