From: Sebastien Jan Date: Wed, 13 Jun 2012 05:16:40 +0000 (+0000) Subject: omap4: Use a smaller M,N couple for IVA DPLL X-Git-Tag: v2012.07-rc1~11^2~74 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cc009defa4211aa58b3387b59d568cf8ea863ef4;p=platform%2Fkernel%2Fu-boot.git omap4: Use a smaller M,N couple for IVA DPLL This reduced M,N couple corresponds to the advised value from TI HW team. Tested on 4460 Pandaboard, it also provides peripheral clocks closer to the advised values. Signed-off-by: Sebastien Jan --- diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index c568951..1d92e66 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -146,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = { {727, 14, -1, -1, 4, 7, -1, -1}, /* 19.2 MHz */ {931, 25, -1, -1, 4, 7, -1, -1}, /* 26 MHz */ {931, 26, -1, -1, 4, 7, -1, -1}, /* 27 MHz */ - {412, 16, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */ + {291, 11, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */ }; /* ABE M & N values with sys_clk as source */