From: Benoît Thébaudeau <benoit@wsystem.com>
Date: Tue, 30 May 2017 09:14:08 +0000 (+0200)
Subject: mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
X-Git-Tag: v4.13-rc1~179^2~40
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cbb4509374963bea440c15ff26e2501d15e7927a;p=platform%2Fkernel%2Flinux-exynos.git

mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR

The eSDHC can only DMA from 32-bit-aligned addresses.

This fixes the following test cases of mmc_test:
  11:	Badly aligned write
  12:	Badly aligned read
  13:	Badly aligned multi-block write
  14:	Badly aligned multi-block read

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index c4bbd74..e7893f2 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -19,6 +19,7 @@
  */
 
 #define ESDHC_DEFAULT_QUIRKS	(SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
+				SDHCI_QUIRK_32BIT_DMA_ADDR | \
 				SDHCI_QUIRK_NO_BUSY_IRQ | \
 				SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
 				SDHCI_QUIRK_PIO_NEEDS_DELAY | \