From: Ville Syrjälä Date: Mon, 19 Jan 2015 11:50:48 +0000 (+0200) Subject: drm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to decimal X-Git-Tag: v4.0-rc1~74^2~8^2~96 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cad725fe37454ac42fa909d589271ce6f065682c;p=platform%2Fkernel%2Flinux-exynos.git drm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to decimal We use decimal for all the other RP magic values, so change GEN6_RP_DOWN_TIMEOUT to decimal as well. Also change the order of the register writes to match the BIOS spec for easier verification. Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson Reviewed-by: Deepak S Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e7f0f21..ee9a5f9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4807,13 +4807,13 @@ static void valleyview_enable_rps(struct drm_device *dev) /* Disable RC states. */ I915_WRITE(GEN6_RC_CONTROL, 0); + I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 1000000); I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400); I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000); I915_WRITE(GEN6_RP_UP_EI, 66000); I915_WRITE(GEN6_RP_DOWN_EI, 350000); I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); - I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 0xf4240); I915_WRITE(GEN6_RP_CONTROL, GEN6_RP_MEDIA_TURBO |