From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sat, 10 May 2003 15:07:00 +0000 (+0000)
Subject: TF flag support
X-Git-Tag: TizenStudio_2.0_p2.3~16069
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cabb4d616d47300a65062eb07142738b1cd35563;p=sdk%2Femulator%2Fqemu.git

TF flag support


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@144 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/cpu-i386.h b/cpu-i386.h
index dae88fb..e5bbf45 100644
--- a/cpu-i386.h
+++ b/cpu-i386.h
@@ -440,6 +440,7 @@ void cpu_x86_dump_state(CPUX86State *env, FILE *f, int flags);
 #define GEN_FLAG_ST_SHIFT     4
 #define GEN_FLAG_CPL_SHIFT    7
 #define GEN_FLAG_IOPL_SHIFT   9
+#define GEN_FLAG_TF_SHIFT     11
 
 int cpu_x86_gen_code(uint8_t *gen_code_buf, int max_code_size, 
                      int *gen_code_size_ptr,
diff --git a/exec-i386.c b/exec-i386.c
index 10a10d7..5b90305 100644
--- a/exec-i386.c
+++ b/exec-i386.c
@@ -371,6 +371,7 @@ int cpu_x86_exec(CPUX86State *env1)
                 flags |= (3 << GEN_FLAG_CPL_SHIFT);
             }
             flags |= (env->eflags & IOPL_MASK) >> (12 - GEN_FLAG_IOPL_SHIFT);
+            flags |= (env->eflags & TF_MASK) << (GEN_FLAG_TF_SHIFT - 8);
             cs_base = env->seg_cache[R_CS].base;
             pc = cs_base + env->eip;
             tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,