From: Sinan Kaya <41809318+franksinankaya@users.noreply.github.com> Date: Wed, 13 Nov 2019 23:44:53 +0000 (-0500) Subject: ARM32 compilation fixes with GCC (dotnet/coreclr#27795) X-Git-Tag: submit/tizen/20210909.063632~11030^2~7 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ca8841df6900af5c2a45802deda44f07aca1011a;p=platform%2Fupstream%2Fdotnet%2Fruntime.git ARM32 compilation fixes with GCC (dotnet/coreclr#27795) * Suppress on clang only * Fix integer conversion * Extra qualifier * Suppress warning * Extra qualifier * Signedness issues * Correct offsetof * Offsetof doesn't support non-constant values * Conversion errors * Move the comment too * Fix assembly warning * size is not constant * Fix comment type * Fix endmacro name * Use OFFSET_NONE constant Commit migrated from https://github.com/dotnet/coreclr/commit/e8bbcf18be67b864d16e12c13d16f1bea4a9c76e --- diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lightweightmap.h b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lightweightmap.h index 83396bb..2a5594f 100644 --- a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lightweightmap.h +++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lightweightmap.h @@ -240,7 +240,7 @@ public: // If we have RTTI, we can make this assert report the correct type. No RTTI, though, when // built with .NET Core, especially when built against the PAL. - AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "%s - Ended with unexpected sizes %Ix != %x", + AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "%s - Ended with unexpected sizes %Ix != %x", "Unknown type" /*typeid(_Item).name()*/, ptr - rawData, size); } @@ -519,7 +519,7 @@ public: ptr += bufferLength * sizeof(unsigned char); } - AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x", + AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x", ptr - rawData, size); } @@ -579,7 +579,7 @@ private: delete[] tItems; } - AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x", + AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x", ptr - rawData, size); } diff --git a/src/coreclr/src/debug/createdump/dumpwriter.cpp b/src/coreclr/src/debug/createdump/dumpwriter.cpp index bb4860f..82635f4 100644 --- a/src/coreclr/src/debug/createdump/dumpwriter.cpp +++ b/src/coreclr/src/debug/createdump/dumpwriter.cpp @@ -391,7 +391,7 @@ DumpWriter::WriteNTFileInfo() for (const MemoryRegion& image : m_crashInfo.ModuleMappings()) { - struct NTFileEntry entry { image.StartAddress(), image.EndAddress(), image.Offset() / pageSize }; + struct NTFileEntry entry { (unsigned long)image.StartAddress(), (unsigned long)image.EndAddress(), (unsigned long)(image.Offset() / pageSize) }; if (!WriteData(&entry, sizeof(entry))) { return false; } diff --git a/src/coreclr/src/debug/di/rspriv.h b/src/coreclr/src/debug/di/rspriv.h index 84bf6ca..55e3ec9 100644 --- a/src/coreclr/src/debug/di/rspriv.h +++ b/src/coreclr/src/debug/di/rspriv.h @@ -4848,7 +4848,7 @@ public: #ifdef FEATURE_64BIT_ALIGNMENT // checks if the type requires 8-byte alignment. // this is not exposed via ICorDebug at present. - HRESULT CordbType::RequiresAlign8(BOOL* isRequired); + HRESULT RequiresAlign8(BOOL* isRequired); #endif //----------------------------------------------------------- diff --git a/src/coreclr/src/debug/ee/arm/dbghelpers.S b/src/coreclr/src/debug/ee/arm/dbghelpers.S index 1451df0e..3294843 100644 --- a/src/coreclr/src/debug/ee/arm/dbghelpers.S +++ b/src/coreclr/src/debug/ee/arm/dbghelpers.S @@ -57,4 +57,4 @@ NESTED_ENTRY ExceptionHijack, _TEXT, UnhandledExceptionHandlerUnix // *** should never get here *** EMIT_BREAKPOINT -NESTED_END ExceptionHijackEnd, _TEXT +NESTED_END_MARKED ExceptionHijack, _TEXT diff --git a/src/coreclr/src/gc/gc.cpp b/src/coreclr/src/gc/gc.cpp index 4105d7e..6fa0ebc 100644 --- a/src/coreclr/src/gc/gc.cpp +++ b/src/coreclr/src/gc/gc.cpp @@ -25443,7 +25443,7 @@ void gc_heap::relocate_shortened_survivor_helper (uint8_t* plug, uint8_t* plug_e while (x < plug_end) { - if (check_short_obj_p && ((plug_end - x) < (DWORD)min_pre_pin_obj_size)) + if (check_short_obj_p && ((DWORD)(plug_end - x) < (DWORD)min_pre_pin_obj_size)) { dprintf (3, ("last obj %Ix is short", x)); diff --git a/src/coreclr/src/pal/src/CMakeLists.txt b/src/coreclr/src/pal/src/CMakeLists.txt index f7c2383..9a92b09 100644 --- a/src/coreclr/src/pal/src/CMakeLists.txt +++ b/src/coreclr/src/pal/src/CMakeLists.txt @@ -173,7 +173,9 @@ if(NOT CMAKE_SYSTEM_NAME STREQUAL Darwin) endif(NOT CMAKE_SYSTEM_NAME STREQUAL Darwin) if(PAL_CMAKE_PLATFORM_ARCH_ARM) - set_source_files_properties(exception/seh.cpp PROPERTIES COMPILE_FLAGS -Wno-error=inline-asm) + if (CMAKE_CXX_COMPILER_ID MATCHES "Clang") + set_source_files_properties(exception/seh.cpp PROPERTIES COMPILE_FLAGS -Wno-error=inline-asm) + endif() endif(PAL_CMAKE_PLATFORM_ARCH_ARM) set(SOURCES diff --git a/src/coreclr/src/pal/src/libunwind/src/CMakeLists.txt b/src/coreclr/src/pal/src/libunwind/src/CMakeLists.txt index ea12252..334aca5 100644 --- a/src/coreclr/src/pal/src/libunwind/src/CMakeLists.txt +++ b/src/coreclr/src/pal/src/libunwind/src/CMakeLists.txt @@ -31,11 +31,11 @@ endif() if(CLR_CMAKE_PLATFORM_ARCH_ARM) # Ensure that the remote and local unwind code can reside in the same binary without name clashing add_definitions("-Darm_search_unwind_table=UNW_OBJ(arm_search_unwind_table)") - # Disable warning in asm: use of SP or PC in the list is deprecated - add_compile_options(-Wno-inline-asm) if (CMAKE_CXX_COMPILER_ID MATCHES "Clang") # Disable warning due to labs function called on unsigned argument add_compile_options(-Wno-absolute-value) + # Disable warning in asm: use of SP or PC in the list is deprecated + add_compile_options(-Wno-inline-asm) endif() # Disable warning for a bug in the libunwind source src/arm/Gtrace.c:529, but not in code that we exercise add_compile_options(-Wno-implicit-function-declaration) diff --git a/src/coreclr/src/unwinder/arm/unwinder_arm.cpp b/src/coreclr/src/unwinder/arm/unwinder_arm.cpp index 642e2eb..07b12ca 100644 --- a/src/coreclr/src/unwinder/arm/unwinder_arm.cpp +++ b/src/coreclr/src/unwinder/arm/unwinder_arm.cpp @@ -153,16 +153,18 @@ typedef struct _ARM_CONTEXT_OFFSETS UINT16 FpscrOffset; } ARM_CONTEXT_OFFSETS, *PARM_CONTEXT_OFFSETS; +const UINT16 OFFSET_NONE = (UINT16)~0; + static const ARM_CONTEXT_OFFSETS TrapFrameOffsets = -{ 8, 272, { 248,252,256,260, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, 72 }, - { 184, 192, 200, 208, 216, 224, 232, 240, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, - ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0}, 64, 68, 264, +{ 8, 272, { 248,252,256,260, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, 72 }, + { 184, 192, 200, 208, 216, 224, 232, 240, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, + OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE}, 64, 68, 264, 268, 176}; static const ARM_CONTEXT_OFFSETS MachineFrameOffsets = -{ 8, 8, { ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0 }, - {~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, - ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0}, 0, ~0, 4, ~0 , ~0}; +{ 8, 8, { OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE }, + {OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, + OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE}, 0, OFFSET_NONE, 4, OFFSET_NONE , OFFSET_NONE}; static const ARM_CONTEXT_OFFSETS ContextOffsets = { 16, 416, { 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52 }, @@ -322,7 +324,7 @@ Return Value: } for (RegIndex = 0; RegIndex < 13; RegIndex++) { - if (Offsets->RegOffset[RegIndex] != (UINT16)~0) { + if (Offsets->RegOffset[RegIndex] != OFFSET_NONE) { SourceAddress = ContextRecord->Sp + Offsets->RegOffset[RegIndex]; UPDATE_CONTEXT_POINTERS(UnwindParams, RegIndex, SourceAddress); CONTEXT_REGISTER(ContextRecord, RegIndex) = @@ -331,7 +333,7 @@ Return Value: } for (RegIndex = 0; RegIndex < 32; RegIndex++) { - if (Offsets->FpRegOffset[RegIndex] != (UINT16)~0) { + if (Offsets->FpRegOffset[RegIndex] != OFFSET_NONE) { SourceAddress = ContextRecord->Sp + Offsets->FpRegOffset[RegIndex]; UPDATE_FP_CONTEXT_POINTERS(UnwindParams, RegIndex, SourceAddress); ContextRecord->D[RegIndex] = MEMORY_READ_QWORD(UnwindParams, SourceAddress); @@ -350,11 +352,11 @@ Return Value: // Link register and PC next // - if (Offsets->LrOffset != (UINT16)~0) { + if (Offsets->LrOffset != OFFSET_NONE) { SourceAddress = ContextRecord->Sp + Offsets->LrOffset; ContextRecord->Lr = MEMORY_READ_DWORD(UnwindParams, SourceAddress); } - if (Offsets->PcOffset != (UINT16)~0) { + if (Offsets->PcOffset != OFFSET_NONE) { SourceAddress = ContextRecord->Sp + Offsets->PcOffset; ContextRecord->Pc = MEMORY_READ_DWORD(UnwindParams, SourceAddress); @@ -370,7 +372,7 @@ Return Value: // Finally the stack pointer // - if (Offsets->SpOffset != (UINT16)~0) { + if (Offsets->SpOffset != OFFSET_NONE) { SourceAddress = ContextRecord->Sp + Offsets->SpOffset; ContextRecord->Sp = MEMORY_READ_DWORD(UnwindParams, SourceAddress); } else { diff --git a/src/coreclr/src/vm/arm/asmhelpers.S b/src/coreclr/src/vm/arm/asmhelpers.S index 448d4c6..68e6f08 100644 --- a/src/coreclr/src/vm/arm/asmhelpers.S +++ b/src/coreclr/src/vm/arm/asmhelpers.S @@ -1092,7 +1092,7 @@ LOCAL_LABEL(CallCppHelper3): LOCAL_LABEL(AssigningNull): // Assigning null doesn't need write barrier - adds r0, r1, LSL #2 // r0 = r0 + (r1 x 4) = array->m_array[idx] + adds r0, r0, r1, LSL #2 // r0 = r0 + (r1 x 4) = array->m_array[idx] str r2, [r0, #PtrArray__m_Array] // array->m_array[idx] = val bx lr @@ -1146,7 +1146,7 @@ LOCAL_LABEL(DoWrite): // Setup args for JIT_WriteBarrier. r0 = &array->m_array[idx]// r1 = val adds r0, #PtrArray__m_Array // r0 = &array->m_array - adds r0, r1, LSL #2 + adds r0, r0, r1, LSL #2 mov r1, r2 // r1 = val // Branch to the write barrier (which is already correctly overwritten with diff --git a/src/coreclr/src/vm/arm/pinvokestubs.S b/src/coreclr/src/vm/arm/pinvokestubs.S index a51c356..000bc8f 100644 --- a/src/coreclr/src/vm/arm/pinvokestubs.S +++ b/src/coreclr/src/vm/arm/pinvokestubs.S @@ -73,7 +73,7 @@ NESTED_END \__PInvokeGenStubFuncName, _TEXT -.endmacro +.endm // ------------------------------------------------------------------ // IN: @@ -105,7 +105,7 @@ str lr, [r4, #InlinedCallFrame__m_pCallerReturnAddress] str r9, [r4, #InlinedCallFrame__m_pSPAfterProlog] - ;; r0 = GetThread() + // r0 = GetThread() bl C_FUNC(GetThread) str r0, [r4, #InlinedCallFrame__m_pThread] diff --git a/src/coreclr/src/vm/arm/stubs.cpp b/src/coreclr/src/vm/arm/stubs.cpp index 34b7fb4..ce1a3a1 100644 --- a/src/coreclr/src/vm/arm/stubs.cpp +++ b/src/coreclr/src/vm/arm/stubs.cpp @@ -951,7 +951,7 @@ void DispatchHolder::Initialize(PCODE implTarget, PCODE failTarget, size_t expe // instruction halfword to which it applies. For thumb-2 encodings the offset must be computed before emitting // the first of the halfwords. #undef PC_REL_OFFSET -#define PC_REL_OFFSET(_field) (WORD)(offsetof(DispatchStub, _field) - (offsetof(DispatchStub, _entryPoint[n + 2]) & 0xfffffffc)) +#define PC_REL_OFFSET(_field) (WORD)(offsetof(DispatchStub, _field) - ((offsetof(DispatchStub, _entryPoint) + sizeof(*DispatchStub::_entryPoint) * (n + 2)) & 0xfffffffc)) // r0 : object. It can be null as well. // when it is null the code causes an AV. This AV is seen by the VM's personality routine @@ -1033,7 +1033,7 @@ void ResolveHolder::Initialize(PCODE resolveWorkerTarget, PCODE patcherTarget, // instruction halfword to which it applies. For thumb-2 encodings the offset must be computed before emitting // the first of the halfwords. #undef PC_REL_OFFSET -#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _resolveEntryPoint[n + 2]) & 0xfffffffc)) +#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _resolveEntryPoint) + sizeof(*ResolveStub::_resolveEntryPoint) * (n + 2)) & 0xfffffffc)) // ldr r12, [r0 + #Object.m_pMethTab] _stub._resolveEntryPoint[n++] = RESOLVE_STUB_FIRST_WORD; @@ -1168,7 +1168,7 @@ void ResolveHolder::Initialize(PCODE resolveWorkerTarget, PCODE patcherTarget, _ASSERTE((n & 1) == 0); #undef PC_REL_OFFSET -#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _slowEntryPoint[n + 2]) & 0xfffffffc)) +#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _slowEntryPoint) + sizeof(*ResolveStub::_slowEntryPoint) * (n + 2)) & 0xfffffffc)) n = 0; @@ -1196,7 +1196,7 @@ void ResolveHolder::Initialize(PCODE resolveWorkerTarget, PCODE patcherTarget, _ASSERTE((n & 1) == 0); #undef PC_REL_OFFSET -#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _failEntryPoint[n + 2]) & 0xfffffffc)) +#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _failEntryPoint) + sizeof(*ResolveStub::_failEntryPoint) * (n + 2)) & 0xfffffffc)) n = 0; @@ -1233,7 +1233,7 @@ void ResolveHolder::Initialize(PCODE resolveWorkerTarget, PCODE patcherTarget, // resolveEntryPoint: // b _resolveEntryPoint - offset = (WORD)(offsetof(ResolveStub, _resolveEntryPoint) - offsetof(ResolveStub, _failEntryPoint[n + 2])); + offset = (WORD)(offsetof(ResolveStub, _resolveEntryPoint) - (offsetof(ResolveStub, _failEntryPoint) + sizeof(*ResolveStub::_failEntryPoint) * (n + 2))); _ASSERTE((offset & 1) == 0); offset = (offset >> 1) & 0x07ff; _stub._failEntryPoint[n++] = 0xe000 | offset; @@ -1334,14 +1334,14 @@ Stub *GenerateInitPInvokeFrameHelper() // Save argument registers around the GetThread call. Don't bother with using ldm/stm since this inefficient path anyway. for (int reg = 0; reg < 4; reg++) - psl->ThumbEmitStoreRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r[reg])); + psl->ThumbEmitStoreRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg); #endif psl->ThumbEmitGetThread(regThread); #ifdef FEATURE_PAL for (int reg = 0; reg < 4; reg++) - psl->ThumbEmitLoadRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r[reg])); + psl->ThumbEmitLoadRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg); #endif // mov [regFrame + FrameInfo.offsetOfGSCookie], GetProcessGSCookie() @@ -2013,7 +2013,7 @@ void StubLinkerCPU::ThumbEmitCallWithGenericInstantiationParameter(MethodDesc *p // 1) First loop will emit the moves that have stack location as the target // 2) Second loop will emit moves that have register as the target. DWORD idxCurrentLoopBegin = 0, idxCurrentLoopEnd = cArgDescriptors; - if (idxFirstMoveToStack != -1) + if (idxFirstMoveToStack != (DWORD)-1) { _ASSERTE(idxFirstMoveToStack < cArgDescriptors); idxCurrentLoopBegin = idxFirstMoveToStack; @@ -2891,7 +2891,7 @@ void StubLinkerCPU::EmitStubLinkFrame(TADDR pFrameVptr, int offsetOfFrame, int o // reload argument registers that could have been corrupted by the call for (int reg = 0; reg < 4; reg++) ThumbEmitLoadRegIndirect(ThumbReg(reg), ThumbReg(4), - offsetOfTransitionBlock + TransitionBlock::GetOffsetOfArgumentRegisters() + offsetof(ArgumentRegisters, r[reg])); + offsetOfTransitionBlock + TransitionBlock::GetOffsetOfArgumentRegisters() + offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg); #endif ThumbEmitLoadRegIndirect(ThumbReg(6), ThumbReg(5), Thread::GetOffsetOfCurrentFrame()); diff --git a/src/coreclr/src/vm/arm/virtualcallstubcpu.hpp b/src/coreclr/src/vm/arm/virtualcallstubcpu.hpp index 79e3284..a61b31e 100644 --- a/src/coreclr/src/vm/arm/virtualcallstubcpu.hpp +++ b/src/coreclr/src/vm/arm/virtualcallstubcpu.hpp @@ -345,7 +345,7 @@ struct VTableCallHolder return 6 + indirectionsSize + 4; } - static VTableCallHolder* VTableCallHolder::FromVTableCallEntry(PCODE entry) + static VTableCallHolder* FromVTableCallEntry(PCODE entry) { LIMITED_METHOD_CONTRACT; return (VTableCallHolder*)(entry & ~THUMB_CODE); diff --git a/src/coreclr/src/vm/precode.h b/src/coreclr/src/vm/precode.h index 363f429..cef1307 100644 --- a/src/coreclr/src/vm/precode.h +++ b/src/coreclr/src/vm/precode.h @@ -149,7 +149,7 @@ public: static int AlignOf(PrecodeType t) { SUPPORTS_DAC; - int align = PRECODE_ALIGNMENT; + unsigned int align = PRECODE_ALIGNMENT; #if defined(_TARGET_X86_) && defined(HAS_FIXUP_PRECODE) // Fixup precodes has to be aligned to allow atomic patching