From: Alek Du Date: Tue, 1 Dec 2009 21:17:45 +0000 (-0800) Subject: gpio: Langwell GPIO driver bugfixes X-Git-Tag: upstream/snapshot3+hdmi~16495 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ca0297015d4f117005718e01aa368875abcccbc5;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git gpio: Langwell GPIO driver bugfixes - Remove wrong and unnecessary unmask operation - Remove extra GEDR reading This fixes the loss of interrupts which occurs when two or more pins are triggered in close succession. Signed-off-by: Alek Du Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c index 5711ce5..4baf3d7 100644 --- a/drivers/gpio/langwell_gpio.c +++ b/drivers/gpio/langwell_gpio.c @@ -144,13 +144,6 @@ static int lnw_irq_type(unsigned irq, unsigned type) static void lnw_irq_unmask(unsigned irq) { - struct lnw_gpio *lnw = get_irq_chip_data(irq); - u32 gpio = irq - lnw->irq_base; - u8 reg = gpio / 32; - void __iomem *gedr; - - gedr = (void __iomem *)(&lnw->reg_base->GEDR[reg]); - writel(BIT(gpio % 32), gedr); }; static void lnw_irq_mask(unsigned irq) @@ -183,13 +176,11 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) gedr_v = readl(gedr); if (!gedr_v) continue; - for (gpio = reg*32; gpio < reg*32+32; gpio++) { - gedr_v = readl(gedr); + for (gpio = reg*32; gpio < reg*32+32; gpio++) if (gedr_v & BIT(gpio % 32)) { pr_debug("pin %d triggered\n", gpio); generic_handle_irq(lnw->irq_base + gpio); } - } /* clear the edge detect status bit */ writel(gedr_v, gedr); }