From: uros Date: Sat, 19 Oct 2013 12:32:25 +0000 (+0000) Subject: * mode-switching.c (create_pre_exit): Rename maybe_builtin_apply X-Git-Tag: upstream/4.9.2~3530 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c9c236e793b0577d3a8e963d3836527b4ac8cf47;p=platform%2Fupstream%2Flinaro-gcc.git * mode-switching.c (create_pre_exit): Rename maybe_builtin_apply to multi_reg_return. Clarify that we are skipping USEs of multiple return registers. Use bool type where appropriate. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203856 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 086b5b2..7deefce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-10-19 Uros Bizjak + + * mode-switching.c (create_pre_exit): Rename maybe_builtin_apply + to multi_reg_return. Clarify that we are skipping USEs of multiple + return registers. Use bool type where appropriate. + 2013-10-18 Jan Hubicka * config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Disable accumulation @@ -6,7 +12,8 @@ (X86_TUNE_PUSH_MEMORY): Likewise. (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL, X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): New. - (X86_TUNE_ACCUMULATE_OUTGOING_ARGS, X86_TUNE_ALWAYS_FANCY_MATH_387): New. + (X86_TUNE_ACCUMULATE_OUTGOING_ARGS, X86_TUNE_ALWAYS_FANCY_MATH_387): + New. * i386.c (x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, x86_avx256_split_unaligned_load, x86_avx256_split_unaligned_store): Remove. @@ -21,8 +28,8 @@ 2013-10-18 Andrew MacLeod - * tree-ssa.h: Don't include gimple-low.h, tree-ssa-address.h, sbitmap.h, - tree-ssa-threadedge.h, tree-ssa-dom.h, and tree-cfgcleanup.h. + * tree-ssa.h: Don't include gimple-low.h, tree-ssa-address.h, + sbitmap.h, tree-ssa-threadedge.h, tree-ssa-dom.h and tree-cfgcleanup.h. * gimple-low.c (gimple_check_call_arg, gimple_check_call_matching_types): Move to cgraph.c. * gimple-low.h: Remove prototype. @@ -90,7 +97,8 @@ * tree-ssa-threadupdate.c: Do not include "tm.h" or "tm_p.h". * tree-ssa-threadupdate.c: Include "dbgcnt.h". - (register_jump_thread): Add "registered_jump_thread" debug counter support. + (register_jump_thread): Add "registered_jump_thread" debug + counter support. * dbgcnt.def (registered_jump_thread): New debug counter. 2013-10-18 Andrew MacLeod diff --git a/gcc/mode-switching.c b/gcc/mode-switching.c index 483566b..0b08998 100644 --- a/gcc/mode-switching.c +++ b/gcc/mode-switching.c @@ -229,9 +229,9 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) int ret_start = REGNO (ret_reg); int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)]; int ret_end = ret_start + nregs; - int short_block = 0; - int maybe_builtin_apply = 0; - int forced_late_switch = 0; + bool short_block = false; + bool multi_reg_return = false; + bool forced_late_switch = false; rtx before_return_copy; do @@ -251,19 +251,20 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) copy yet, the copy must have been deleted. */ if (CALL_P (return_copy)) { - short_block = 1; + short_block = true; break; } return_copy_pat = PATTERN (return_copy); switch (GET_CODE (return_copy_pat)) { case USE: - /* Skip __builtin_apply pattern. */ + /* Skip USEs of multiple return registers. + __builtin_apply pattern is also handled here. */ if (GET_CODE (XEXP (return_copy_pat, 0)) == REG && (targetm.calls.function_value_regno_p (REGNO (XEXP (return_copy_pat, 0))))) { - maybe_builtin_apply = 1; + multi_reg_return = true; last_insn = return_copy; continue; } @@ -326,7 +327,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) there are no return copy insns at all. This avoids an ice on that invalid function. */ if (ret_start + nregs == ret_end) - short_block = 1; + short_block = true; break; } if (!targetm.calls.function_value_regno_p (copy_start)) @@ -354,10 +355,10 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) another mode than MODE_EXIT, even if it is unrelated to the return value, so we want to put the final mode switch after it. */ - if (maybe_builtin_apply + if (multi_reg_return && targetm.calls.function_value_regno_p (copy_start)) - forced_late_switch = 1; + forced_late_switch = true; /* For the SH4, floating point loads depend on fpscr, thus we might need to put the final mode switch @@ -367,7 +368,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) if (copy_start >= ret_start && copy_start + copy_num <= ret_end && OBJECT_P (SET_SRC (return_copy_pat))) - forced_late_switch = 1; + forced_late_switch = true; break; } if (copy_num == 0) @@ -379,7 +380,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) if (copy_start >= ret_start && copy_start + copy_num <= ret_end) nregs -= copy_num; - else if (!maybe_builtin_apply + else if (!multi_reg_return || !targetm.calls.function_value_regno_p (copy_start)) break; @@ -393,7 +394,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) isolated use. */ if (return_copy == BB_HEAD (src_bb)) { - short_block = 1; + short_block = true; break; } last_insn = return_copy;