From: rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Mon, 20 Aug 2012 10:57:45 +0000 (+0000)
Subject: 	* gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit
X-Git-Tag: upstream/4.9.2~11059
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c91260ab962c4cc93e09d08ebcbe9ee0ab36e161;p=platform%2Fupstream%2Flinaro-gcc.git

	* gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit
	add instruction.
	(f2): New test that really does need adds.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@190530 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ba0b5b2..e9aaf24 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2012-08-20  Richard Earnshaw  <rearnsha@arm.com>
+
+	* gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit
+	add instruction.
+	(f2): New test that really does need adds.
+
 2012-08-20  Richard Guenther  <rguenther@suse.de>
 
 	PR tree-optimization/54327
diff --git a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
index bd4f489..90407eb 100644
--- a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
+++ b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
@@ -4,14 +4,21 @@
 /* { dg-options "-Os -fno-builtin -mthumb" } */
 
 int
-f (int a, int b )
+f (int a, int b)
 {
   return a + b;
 }
 
-/* { dg-final { scan-assembler "adds	r0, r0, r1" } } */
+/* { dg-final { scan-assembler "add	r0, r0, r1" } } */
 
 int
+f2 (int a, int b, int c)
+{
+  return b + c;
+}
+
+/* { dg-final { scan-assembler "adds	r0, r1, r2" } } */
+int
 g1 (int a)
 {
   return a + 255;