From: Ido Schimmel Date: Tue, 25 Jul 2023 12:04:04 +0000 (+0200) Subject: mlxsw: reg: Increase Management Cable Info Access Register length X-Git-Tag: v6.6.7~2079^2~327^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c8dbf67883db98a1987eefd4872cf997c64ce7e7;p=platform%2Fkernel%2Flinux-starfive.git mlxsw: reg: Increase Management Cable Info Access Register length The layout of the register always supported 128 bytes payloads, but the driver defined the register with a shorter length because it uses a maximum payload size of 48 bytes. Increase the register's length in preparation for using 128 bytes payloads. Signed-off-by: Ido Schimmel Reviewed-by: Petr Machata Signed-off-by: Petr Machata Link: https://lore.kernel.org/r/ba5c0f631e2cfd61bd21218d0cbfe03fbfe521f9.1690281940.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index 3b29779..7a0023a 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -9640,7 +9640,7 @@ static inline void mlxsw_reg_mtbr_temp_unpack(char *payload, int rec_ind, */ #define MLXSW_REG_MCIA_ID 0x9014 -#define MLXSW_REG_MCIA_LEN 0x40 +#define MLXSW_REG_MCIA_LEN 0x94 MLXSW_REG_DEFINE(mcia, MLXSW_REG_MCIA_ID, MLXSW_REG_MCIA_LEN);