From: Jonas Paulsson <paulsson@linux.vnet.ibm.com>
Date: Tue, 28 Apr 2020 07:37:43 +0000 (+0200)
Subject: [SystemZ] Fix test case.
X-Git-Tag: llvmorg-12-init~7627
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c84461ba8dea35a9515e5a34a680ca1293d21e7d;p=platform%2Fupstream%2Fllvm.git

[SystemZ] Fix test case.

Remove bad kill flags fom load-and-test.mir as discovered by
https://reviews.llvm.org/D78586: "[MachineVerifier] Add more checks for
registers in live-in lists".

Review: Ulrich Weigand
---

diff --git a/llvm/test/CodeGen/SystemZ/load-and-test.mir b/llvm/test/CodeGen/SystemZ/load-and-test.mir
index c832913..1742728 100644
--- a/llvm/test/CodeGen/SystemZ/load-and-test.mir
+++ b/llvm/test/CodeGen/SystemZ/load-and-test.mir
@@ -15,12 +15,12 @@ body:             |
   bb.0 ():
     liveins: $r1d
     renamable $r0l = L $r1d, 0, $noreg
-    CLFIMux killed renamable $r0l, 0, implicit-def $cc
+    CLFIMux renamable $r0l, 0, implicit-def $cc
     BRC 14, 10, %bb.2, implicit $cc
 
   bb.1 ():
     liveins: $r0l
-    ST killed renamable $r0l, $r15d, 164, $noreg
+    ST renamable $r0l, $r15d, 164, $noreg
 
   bb.2 ():
     liveins: $r0l
@@ -38,12 +38,12 @@ body:             |
   bb.0 ():
     liveins: $r1d
     renamable $r0l = L $r1d, 0, $noreg
-    CLFIMux killed renamable $r0l, 0, implicit-def $cc
+    CLFIMux renamable $r0l, 0, implicit-def $cc
     BRC 14, 8, %bb.2, implicit $cc
 
   bb.1 ():
     liveins: $r0l
-    ST killed renamable $r0l, $r15d, 164, $noreg
+    ST renamable $r0l, $r15d, 164, $noreg
 
   bb.2 ():
     liveins: $r0l