From: Greg Kroah-Hartman Date: Wed, 5 Dec 2012 16:35:45 +0000 (-0800) Subject: update patches.at91 with newer patches X-Git-Tag: v3.4.25-ltsi~22 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c825156cca208b7569e9dc0d8d945d08d052ba57;p=platform%2Fkernel%2Flinux-stable.git update patches.at91 with newer patches clean up ordering in series file --- diff --git a/patches.at91/0001-MAINTAINERS-add-entry-for-Atmel-isi-driver.patch b/patches.at91/0001-MAINTAINERS-add-entry-for-Atmel-isi-driver.patch index cf8199884a11..4321ab4f6db1 100644 --- a/patches.at91/0001-MAINTAINERS-add-entry-for-Atmel-isi-driver.patch +++ b/patches.at91/0001-MAINTAINERS-add-entry-for-Atmel-isi-driver.patch @@ -1,8 +1,10 @@ -From f3bd6419099a0cfefc3b13cf95ba34015f06ffb3 Mon Sep 17 00:00:00 2001 +From 1fe826bf63cef59dde06a3e53f44445469c3ec75 Mon Sep 17 00:00:00 2001 From: Josh Wu Date: Fri, 23 Mar 2012 17:56:29 +0800 Subject: MAINTAINERS: add entry for Atmel isi driver +commit 1551554518371d919bbf6f3f1b1599ea2e7d2ac0 upstream. + Signed-off-by: Josh Wu Signed-off-by: Nicolas Ferre --- diff --git a/patches.at91/0002-MAINTAINERS-add-entry-for-Atmel-touch-screen-ADC-con.patch b/patches.at91/0002-MAINTAINERS-add-entry-for-Atmel-touch-screen-ADC-con.patch index d4a2238d683a..4d9e49514dfb 100644 --- a/patches.at91/0002-MAINTAINERS-add-entry-for-Atmel-touch-screen-ADC-con.patch +++ b/patches.at91/0002-MAINTAINERS-add-entry-for-Atmel-touch-screen-ADC-con.patch @@ -1,8 +1,10 @@ -From ef899cb1d2fda864b02a7efa424767981353f1b5 Mon Sep 17 00:00:00 2001 +From 5dfa35bf3ff4ceaa13e05e8ed563435b499a665e Mon Sep 17 00:00:00 2001 From: Josh Wu Date: Fri, 23 Mar 2012 17:56:55 +0800 Subject: MAINTAINERS: add entry for Atmel touch screen ADC controller driver +commit ff2675d6994157c308d7ce504b9f19a1c22d01a8 upstream. + Signed-off-by: Josh Wu Signed-off-by: Nicolas Ferre --- diff --git a/patches.at91/0003-MAINTAINERS-add-entry-for-Atmel-DMA-driver.patch b/patches.at91/0003-MAINTAINERS-add-entry-for-Atmel-DMA-driver.patch index 68b5ddaac06d..24dfc54a5952 100644 --- a/patches.at91/0003-MAINTAINERS-add-entry-for-Atmel-DMA-driver.patch +++ b/patches.at91/0003-MAINTAINERS-add-entry-for-Atmel-DMA-driver.patch @@ -1,8 +1,10 @@ -From 2dd30cf629c3267c2925a9925b31addf1ef168b6 Mon Sep 17 00:00:00 2001 +From aebdb4a2d3da9740c830b56ebdaaf9ade2e52b93 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 26 Mar 2012 15:50:36 +0200 Subject: MAINTAINERS: add entry for Atmel DMA driver +commit b414dc16f6ee64a23c525f80b924e44b0f0bee18 upstream. + Signed-off-by: Nicolas Ferre --- MAINTAINERS | 8 ++++++++ diff --git a/patches.at91/0004-MAINTAINERS-add-entry-for-Atmel-timer-counter-TC.patch b/patches.at91/0004-MAINTAINERS-add-entry-for-Atmel-timer-counter-TC.patch index 3f2de362ad97..303ec715f0cd 100644 --- a/patches.at91/0004-MAINTAINERS-add-entry-for-Atmel-timer-counter-TC.patch +++ b/patches.at91/0004-MAINTAINERS-add-entry-for-Atmel-timer-counter-TC.patch @@ -1,8 +1,10 @@ -From 811046c42ca111ebc64328429ae035f48dddb2fd Mon Sep 17 00:00:00 2001 +From 5ef2e8ea2b7b19632f2d8d931ddaa130669d50a1 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 26 Mar 2012 15:59:32 +0200 Subject: MAINTAINERS: add entry for Atmel timer counter (TC) +commit e9cb1c5a5ba906d01bf49a27460bd357aa6089ab upstream. + Add an entry for the Timer Counter (TC) library and the clocksource driver that is using this library. diff --git a/patches.at91/0005-MAINTAINERS-remove-non-responding-web-link-for-atmel.patch b/patches.at91/0005-MAINTAINERS-remove-non-responding-web-link-for-atmel.patch index a516b9522b0d..479e760ce840 100644 --- a/patches.at91/0005-MAINTAINERS-remove-non-responding-web-link-for-atmel.patch +++ b/patches.at91/0005-MAINTAINERS-remove-non-responding-web-link-for-atmel.patch @@ -1,8 +1,10 @@ -From ff97bdd9bbdcd2f550b68c11d90a3e01873933c7 Mon Sep 17 00:00:00 2001 +From c28695c921cee53829198558dc3ed95d9b65c83c Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 26 Mar 2012 16:11:19 +0200 Subject: MAINTAINERS: remove non-responding web link for atmel_usba driver +commit 1066c51ee28189aabff073bcd197b84a4f87ea81 upstream. + Signed-off-by: Nicolas Ferre Cc: Haavard Skinnemoen Cc: Hans-Christian Egtvedt diff --git a/patches.at91/0006-ARM-at91-change-AT91-Kconfig-entry-comment.patch b/patches.at91/0006-ARM-at91-change-AT91-Kconfig-entry-comment.patch index d84aa0d952ce..c27d6d203c63 100644 --- a/patches.at91/0006-ARM-at91-change-AT91-Kconfig-entry-comment.patch +++ b/patches.at91/0006-ARM-at91-change-AT91-Kconfig-entry-comment.patch @@ -1,8 +1,10 @@ -From cfcd98b36cbb2f074a06b1665727a72d3677ce64 Mon Sep 17 00:00:00 2001 +From 0bec15efe762b830db265b747b134a15e6600045 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 12:21:12 +0100 Subject: ARM: at91: change AT91 Kconfig entry comment +commit 929e994f7e249a58f50ccdd066da9899a6e39c7a upstream. + Signed-off-by: Nicolas Ferre --- arch/arm/Kconfig | 4 ++-- diff --git a/patches.at91/0007-ARM-at91-Kconfig-change-at91sam9g45-entry.patch b/patches.at91/0007-ARM-at91-Kconfig-change-at91sam9g45-entry.patch index a709d75a03e1..a6c649767f2d 100644 --- a/patches.at91/0007-ARM-at91-Kconfig-change-at91sam9g45-entry.patch +++ b/patches.at91/0007-ARM-at91-Kconfig-change-at91sam9g45-entry.patch @@ -1,8 +1,10 @@ -From 4b6fd2b781b2091e70dbfe0d3b3bf5ad70e9664b Mon Sep 17 00:00:00 2001 +From 9826d66f3e249659ca04a31885496ecb04f956ee Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 12:26:43 +0100 Subject: ARM: at91/Kconfig: change at91sam9g45 entry +commit ca1dcbf7fc6a9d849f487a50f8ee34f923d8e16b upstream. + The AT91SAM9G45 entry covers the whole family so we also add the AT91SAM9M10 name and the "families" qualifier. Then, add a comment to explain which SoCs are supported by this entry: AT91SAM9G45, AT91SAM9G46 but also diff --git a/patches.at91/0008-ARM-at91-Kconfig-add-comment-to-at91sam9x5-family-en.patch b/patches.at91/0008-ARM-at91-Kconfig-add-comment-to-at91sam9x5-family-en.patch index 02a7a09d9ede..08f5af83cc63 100644 --- a/patches.at91/0008-ARM-at91-Kconfig-add-comment-to-at91sam9x5-family-en.patch +++ b/patches.at91/0008-ARM-at91-Kconfig-add-comment-to-at91sam9x5-family-en.patch @@ -1,8 +1,10 @@ -From 780545021feb2796b0595ebb300522c862bafc55 Mon Sep 17 00:00:00 2001 +From 146a8f586032093247b7fbe75bde12d4d9bb4129 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 12:48:41 +0100 Subject: ARM: at91/Kconfig: add comment to at91sam9x5 family entry +commit a26e1af50e716711c340146529403b37c5d455e8 upstream. + Add comment to make it clear that several SoC are supported by this generic entry. diff --git a/patches.at91/0009-ARM-at91-Kconfig-add-clarifications-to-AT91SAM9M10G4.patch b/patches.at91/0009-ARM-at91-Kconfig-add-clarifications-to-AT91SAM9M10G4.patch index d5de31639952..00a9bdc971f3 100644 --- a/patches.at91/0009-ARM-at91-Kconfig-add-clarifications-to-AT91SAM9M10G4.patch +++ b/patches.at91/0009-ARM-at91-Kconfig-add-clarifications-to-AT91SAM9M10G4.patch @@ -1,8 +1,10 @@ -From 2eb2471c5bf340e1057c2e5faba6d8b23f6f23e4 Mon Sep 17 00:00:00 2001 +From 18a3e8c78f1e37ef27874b915a8719589c801557 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 12:57:03 +0100 Subject: ARM: at91/Kconfig: add clarifications to AT91SAM9M10G45-EK entry +commit fefbc4075a191e9e8c1064906c400ed19a0bc48a upstream. + Add clarifications about the SoCs that can be found on an AT91SAM9M10G45-EK board. Add also the web link to this board on Atmel's website. diff --git a/patches.at91/0010-ARM-at91-Kconfig-add-AT91SAM9x5-family-to-AT91_EARLY.patch b/patches.at91/0010-ARM-at91-Kconfig-add-AT91SAM9x5-family-to-AT91_EARLY.patch index 48aedef8c201..b1c041de01fa 100644 --- a/patches.at91/0010-ARM-at91-Kconfig-add-AT91SAM9x5-family-to-AT91_EARLY.patch +++ b/patches.at91/0010-ARM-at91-Kconfig-add-AT91SAM9x5-family-to-AT91_EARLY.patch @@ -1,8 +1,10 @@ -From f46c2a68a6ad0d570c5c8894d8589cb91f0e2d5f Mon Sep 17 00:00:00 2001 +From 7be4beaa63a35e15e2c80938cc45aee62670cf49 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 13:49:21 +0100 Subject: ARM: at91/Kconfig: add AT91SAM9x5 family to AT91_EARLY_DBGU0 entry +commit 514982adc7a5439140e09facf492e58fc8a7fcc3 upstream. + Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 2 +- diff --git a/patches.at91/0011-ARM-at91-Kconfig-website-link-for-AT91SAM9G20-EK.patch b/patches.at91/0011-ARM-at91-Kconfig-website-link-for-AT91SAM9G20-EK.patch index f43f496e1e49..99875f2536cd 100644 --- a/patches.at91/0011-ARM-at91-Kconfig-website-link-for-AT91SAM9G20-EK.patch +++ b/patches.at91/0011-ARM-at91-Kconfig-website-link-for-AT91SAM9G20-EK.patch @@ -1,8 +1,10 @@ -From 761e63c4d6f8cbf48f12bc90aff9083eefb37e2c Mon Sep 17 00:00:00 2001 +From b1331a2b88162177d8a1f011736a51401724c20e Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 13:56:44 +0100 Subject: ARM: at91/Kconfig: website link for AT91SAM9G20-EK +commit ff65e398f3e3d1ee38a6b23d5a9f8e2fd950be49 upstream. + Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 1 + diff --git a/patches.at91/0012-rtc-Kconfig-remove-dependency-for-AT91-rtc-driver.patch b/patches.at91/0012-rtc-Kconfig-remove-dependency-for-AT91-rtc-driver.patch index dd918d05e054..68920e188a42 100644 --- a/patches.at91/0012-rtc-Kconfig-remove-dependency-for-AT91-rtc-driver.patch +++ b/patches.at91/0012-rtc-Kconfig-remove-dependency-for-AT91-rtc-driver.patch @@ -1,8 +1,10 @@ -From aa2c1a9a69b0a74992d2e4d129f69f58c9b9c433 Mon Sep 17 00:00:00 2001 +From 4af884378298168d5bdd0e8d16a3d0ce86b0925a Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 14:38:09 +0100 Subject: rtc: Kconfig: remove dependency for AT91 rtc driver +commit 938f970eb23d40dba49d7b14b774ed7ae7ec974a upstream. + This will allow to select this driver for newer SoCs. Keep dependency on AT91 because of the use of an header file located in include/mach directory. diff --git a/patches.at91/0013-Input-Kconfig-remove-dependency-for-atmel_tsadcc-dri.patch b/patches.at91/0013-Input-Kconfig-remove-dependency-for-atmel_tsadcc-dri.patch index f79ccb33435e..d02d9aaea681 100644 --- a/patches.at91/0013-Input-Kconfig-remove-dependency-for-atmel_tsadcc-dri.patch +++ b/patches.at91/0013-Input-Kconfig-remove-dependency-for-atmel_tsadcc-dri.patch @@ -1,8 +1,10 @@ -From 3f06a6301f2cba15b6e6f60283c5910f6383ed3f Mon Sep 17 00:00:00 2001 +From 491ea72aa5bb04a0ab7078c74e0f8159044ececc Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 16:02:02 +0100 Subject: Input: Kconfig: remove dependency for atmel_tsadcc driver +commit 1fc4ec3791729db4e2602e9afb1045aef1bc3a58 upstream. + This will allow to select this driver for newer SoCs. Keep dependency on AT91 because of the use of an header file located in include/mach directory. diff --git a/patches.at91/0014-hwrng-Kconfig-remove-dependency-for-atmel-rng-driver.patch b/patches.at91/0014-hwrng-Kconfig-remove-dependency-for-atmel-rng-driver.patch index b2703f828ca4..3ba1a1de9d24 100644 --- a/patches.at91/0014-hwrng-Kconfig-remove-dependency-for-atmel-rng-driver.patch +++ b/patches.at91/0014-hwrng-Kconfig-remove-dependency-for-atmel-rng-driver.patch @@ -1,8 +1,10 @@ -From 3511638f3d8c7369a85592a17b186482c1057b99 Mon Sep 17 00:00:00 2001 +From 2a6149a2914f5495085f2535a26b19a6e74de0bc Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 15 Mar 2012 16:10:59 +0100 Subject: hwrng: Kconfig: remove dependency for atmel-rng driver +commit 1234f4bada54cfcd4dfeeebccf0295d49174da40 upstream. + This will allow to select this driver for newer SoCs. Make sure to keep dependency on HAVE_CLK to avoid breaking other machines. diff --git a/patches.at91/0015-ARM-at91-uncompress-Store-UART-address-in-a-variable.patch b/patches.at91/0015-ARM-at91-uncompress-Store-UART-address-in-a-variable.patch index bc6a63914762..59fde4eb0365 100644 --- a/patches.at91/0015-ARM-at91-uncompress-Store-UART-address-in-a-variable.patch +++ b/patches.at91/0015-ARM-at91-uncompress-Store-UART-address-in-a-variable.patch @@ -1,8 +1,10 @@ -From d100869e11a7ed455412896d44314a81a386ed42 Mon Sep 17 00:00:00 2001 +From 07c647f806c4b990c3ece3a6389de178d131b0d3 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 15 Feb 2012 18:35:40 +0800 Subject: ARM: at91: uncompress Store UART address in a variable +commit c40a763be603867c226505dbe0845ea16a4ee538 upstream. + This will allow a future change to auto-detect which UART to use. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0016-ARM-at91-uncompress-autodetect-the-uart-to-use.patch b/patches.at91/0016-ARM-at91-uncompress-autodetect-the-uart-to-use.patch index b54384b26e4b..980e71d13c02 100644 --- a/patches.at91/0016-ARM-at91-uncompress-autodetect-the-uart-to-use.patch +++ b/patches.at91/0016-ARM-at91-uncompress-autodetect-the-uart-to-use.patch @@ -1,8 +1,10 @@ -From e740a739f469c0128ad12bf8388cdb69bdccc005 Mon Sep 17 00:00:00 2001 +From b975f66bd77491d4f1b426fb4c02f337f0178f5f Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 15 Feb 2012 18:44:40 +0800 Subject: ARM: at91: uncompress: autodetect the uart to use +commit 5f29d0a0ee2c3c2ed06384c923db336183ee6708 upstream. + This will now autodetect the first uart enabled by the bootloader and will use it for uncompress. This will still assume that the bootloader configured it (pins and clock). diff --git a/patches.at91/0017-ARM-at91-drop-at91_set_serial_console.patch b/patches.at91/0017-ARM-at91-drop-at91_set_serial_console.patch index d394110e4a30..85247981979f 100644 --- a/patches.at91/0017-ARM-at91-drop-at91_set_serial_console.patch +++ b/patches.at91/0017-ARM-at91-drop-at91_set_serial_console.patch @@ -1,8 +1,10 @@ -From 9e4b59887ceab4e5a9a311f91da86196106c75c1 Mon Sep 17 00:00:00 2001 +From bfb9a880b47717d96c83725f5134f1b24fc43550 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 5 Apr 2012 13:43:40 +0800 Subject: ARM: at91: drop at91_set_serial_console +commit a27fa58117ae1161adefedde449e5a71b3c593a4 upstream. + at91_set_serial_console is used to define the default console of linux. This is already manage by the cmdline. And if the boot loader can not be modified you can still set it by enabling the CONFIG_CMDLINE_EXTEND option. diff --git a/patches.at91/0018-ARM-at91-do-not-pin-mux-the-UARTs-in-init_early.patch b/patches.at91/0018-ARM-at91-do-not-pin-mux-the-UARTs-in-init_early.patch index 7e4cfed4a699..b079746f9058 100644 --- a/patches.at91/0018-ARM-at91-do-not-pin-mux-the-UARTs-in-init_early.patch +++ b/patches.at91/0018-ARM-at91-do-not-pin-mux-the-UARTs-in-init_early.patch @@ -1,8 +1,10 @@ -From 01175552b5bdf3438fa9bb6acbbfa5498414d2ab Mon Sep 17 00:00:00 2001 +From 2f0374f8e78dc83a1589f405fac8c86e7fe2f2cd Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 5 Apr 2012 14:14:28 +0800 Subject: ARM: at91: do not pin mux the UARTs in init_early +commit 71b149b3f740501c2d59c80de5b10f5e45051099 upstream. + There is no need to pinmux the UART so early in the kernel. Move it to the board init. diff --git a/patches.at91/0019-ARM-at91-move-at91_init_leds-to-board-init.patch b/patches.at91/0019-ARM-at91-move-at91_init_leds-to-board-init.patch index 4e75d7d4ff61..8374c00358bb 100644 --- a/patches.at91/0019-ARM-at91-move-at91_init_leds-to-board-init.patch +++ b/patches.at91/0019-ARM-at91-move-at91_init_leds-to-board-init.patch @@ -1,8 +1,10 @@ -From 0543012c6006a0638654943130daae637f764d5a Mon Sep 17 00:00:00 2001 +From 940c679c9142bff7bc2c16192d6e118b9b07d9a2 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 5 Apr 2012 14:27:57 +0800 Subject: ARM: at91: move at91_init_leds to board init +commit 7eb1dbb3beb982a7d72514abff96ebc08a22e5cd upstream. + This will also allow to finally move the gpio driver to platform device/driver. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0020-ARM-at91-pm-select-memory-controler-at-runtime.patch b/patches.at91/0020-ARM-at91-pm-select-memory-controler-at-runtime.patch index 23c7bb326439..8d85c5f961df 100644 --- a/patches.at91/0020-ARM-at91-pm-select-memory-controler-at-runtime.patch +++ b/patches.at91/0020-ARM-at91-pm-select-memory-controler-at-runtime.patch @@ -1,8 +1,10 @@ -From e7d4df4ef74b1ed11a0e2037bc5cbe8123cf258d Mon Sep 17 00:00:00 2001 +From ec2eded8dc34a9404174de06999cdeab641651c4 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 13 Feb 2012 14:58:30 +0800 Subject: ARM: at91: pm select memory controler at runtime +commit efd09165aa554f84a42565d5ae6a1af58b06a97a upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD [nicolas.ferre@atmel.com: add cpuidle modification] Signed-off-by: Nicolas Ferre diff --git a/patches.at91/0021-ARM-at91-add-SOC_AT91SAM9-kconfig-option-to-factoris.patch b/patches.at91/0021-ARM-at91-add-SOC_AT91SAM9-kconfig-option-to-factoris.patch index 3d2ea6f94e1a..8ad2ed4a4ec5 100644 --- a/patches.at91/0021-ARM-at91-add-SOC_AT91SAM9-kconfig-option-to-factoris.patch +++ b/patches.at91/0021-ARM-at91-add-SOC_AT91SAM9-kconfig-option-to-factoris.patch @@ -1,8 +1,10 @@ -From 54af5dc6fcc90243d7d161c83f2c94cb1ef67697 Mon Sep 17 00:00:00 2001 +From c57f12b42c6bb7481d27ffb9073b32102ab3015c Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 6 Apr 2012 13:04:04 +0800 Subject: ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select +commit 1441bd325bbbcd38d190b2444481b23cdf70069a upstream. + This will allow to simplify the switch to multi soc in the same kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0022-ARN-at91-introduce-SOC_AT91xxx-define-to-allow-to-co.patch b/patches.at91/0022-ARN-at91-introduce-SOC_AT91xxx-define-to-allow-to-co.patch index 13ba82bd9366..eb2ed805904e 100644 --- a/patches.at91/0022-ARN-at91-introduce-SOC_AT91xxx-define-to-allow-to-co.patch +++ b/patches.at91/0022-ARN-at91-introduce-SOC_AT91xxx-define-to-allow-to-co.patch @@ -1,9 +1,11 @@ -From 420a99e1110afb0a9a2fd8ac6e1c18ba2136002e Mon Sep 17 00:00:00 2001 +From f9375e3c4c45dafefe52350547b1f927f966ddd3 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 6 Apr 2012 11:51:50 +0800 Subject: ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support +commit 1e3ce2b8545390a2aee8dbfcd49ca4161b636000 upstream. + We can now compile all SoC core support together and DT boards. We still can not compile together the non DT board. So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig diff --git a/patches.at91/0023-ARM-at91-dt-do-not-specify-the-board-any-more.patch b/patches.at91/0023-ARM-at91-dt-do-not-specify-the-board-any-more.patch index 5f968506f6d9..74496bab7ef9 100644 --- a/patches.at91/0023-ARM-at91-dt-do-not-specify-the-board-any-more.patch +++ b/patches.at91/0023-ARM-at91-dt-do-not-specify-the-board-any-more.patch @@ -1,8 +1,10 @@ -From 77a5977e7fdc175bb1963143b80ad2a74cf3d9b8 Mon Sep 17 00:00:00 2001 +From 48fbfca1c5db644eb14c62307d2608def41a78cf Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 1 Mar 2012 14:47:44 +0800 Subject: ARM: at91/dt: do not specify the board any more +commit 7c8a98c8c0475f0659beb9798f6ddebc2c840079 upstream. + This will allow to add any board to a compiled kernel by just passing the DTB. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0024-ARM-at91-add-defconfig-for-device-tree.patch b/patches.at91/0024-ARM-at91-add-defconfig-for-device-tree.patch index 9ae95597c5db..24965e57088c 100644 --- a/patches.at91/0024-ARM-at91-add-defconfig-for-device-tree.patch +++ b/patches.at91/0024-ARM-at91-add-defconfig-for-device-tree.patch @@ -1,8 +1,10 @@ -From 73aa3911713fc739b9213475b4ff86d85d80d113 Mon Sep 17 00:00:00 2001 +From 5227ce7aea2f044e2e189626ea6f8d0cb7ac682c Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 8 Apr 2012 17:40:06 +0200 Subject: ARM: at91: add defconfig for device tree +commit 39ecc143b4c1f3d42e8300e7f5274681b99f95c2 upstream. + This will enable all current SoC support on DT (9260, 9g20, 9g45 family and 9x5 family). diff --git a/patches.at91/0025-ARM-at91-add-at91sam9260-DT-support.patch b/patches.at91/0025-ARM-at91-add-at91sam9260-DT-support.patch index 48bd9750d284..d55dfa69daa8 100644 --- a/patches.at91/0025-ARM-at91-add-at91sam9260-DT-support.patch +++ b/patches.at91/0025-ARM-at91-add-at91sam9260-DT-support.patch @@ -1,8 +1,10 @@ -From d795dab6d067cd5734cd7af4b67634f3b3961bd7 Mon Sep 17 00:00:00 2001 +From 91c5d96f8c4ace401677cb00a843a1ab9f8646c6 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 9 Apr 2012 19:26:33 +0800 Subject: ARM: at91: add at91sam9260 DT support +commit 5b6089cb6f283b29e7b1e181f95afd3dcf2d8948 upstream. + The at91sam9260 and at91sam9g20 share most of the same IP. So udpate the node property in the at91sam9g20 only. diff --git a/patches.at91/0026-arm-at91-add-Calao-TNY-A9260-and-TNY-A9G20-board-sup.patch b/patches.at91/0026-arm-at91-add-Calao-TNY-A9260-and-TNY-A9G20-board-sup.patch index 002aa4488239..7bee42515140 100644 --- a/patches.at91/0026-arm-at91-add-Calao-TNY-A9260-and-TNY-A9G20-board-sup.patch +++ b/patches.at91/0026-arm-at91-add-Calao-TNY-A9260-and-TNY-A9G20-board-sup.patch @@ -1,8 +1,10 @@ -From 735aea5075e405af25ecdaea8a00091fa0b45c29 Mon Sep 17 00:00:00 2001 +From e3ade6b868e15d2280fee9d17e5bdd0301411e76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 30 Jan 2012 23:45:52 +0800 Subject: arm: at91: add Calao TNY-A9260 and TNY-A9G20 board support +commit 995376a54460ea2e6279ad96353323048f7db3ab upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0027-ARM-at91-add-at91sam9g20ek-boards-dt-support.patch b/patches.at91/0027-ARM-at91-add-at91sam9g20ek-boards-dt-support.patch index 73d1a909e38b..aebafacbbcc8 100644 --- a/patches.at91/0027-ARM-at91-add-at91sam9g20ek-boards-dt-support.patch +++ b/patches.at91/0027-ARM-at91-add-at91sam9g20ek-boards-dt-support.patch @@ -1,8 +1,10 @@ -From a72c0834c3f846f3fe9f2c782c8d6a67df258458 Mon Sep 17 00:00:00 2001 +From 8eb252d75d14c55d013aafe27d6fd74f587d7e53 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 13 Feb 2012 00:54:47 +0800 Subject: ARM: at91: add at91sam9g20ek boards dt support +commit 5cb4e73575e3c66b73ccda811b2ba70339703ea5 upstream. + Add both board revision support 1mmc and 2mmc and use a dtsi for common part. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0028-ARM-at91-USB-A926x-update-nand-partition.patch b/patches.at91/0028-ARM-at91-USB-A926x-update-nand-partition.patch index d8029a144ce8..2fb953985989 100644 --- a/patches.at91/0028-ARM-at91-USB-A926x-update-nand-partition.patch +++ b/patches.at91/0028-ARM-at91-USB-A926x-update-nand-partition.patch @@ -1,8 +1,10 @@ -From b2b5334c32e6c1c8c0333279e4ee9600b3d4d34a Mon Sep 17 00:00:00 2001 +From 820b7c95d6958edce4db6d204c9e3ccb8fb742a5 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 11 Apr 2012 23:40:31 +0800 Subject: ARM: at91: USB A926x update nand partition +commit d78504774435d5fc961f58a92ba7ec441d8b74c9 upstream. + We now store the dtb in a nand partition. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0029-ARM-at91-Calao-USB-A926x-factorize-common-binding-in.patch b/patches.at91/0029-ARM-at91-Calao-USB-A926x-factorize-common-binding-in.patch index d3b4a11e21ff..0a1ff8d5d067 100644 --- a/patches.at91/0029-ARM-at91-Calao-USB-A926x-factorize-common-binding-in.patch +++ b/patches.at91/0029-ARM-at91-Calao-USB-A926x-factorize-common-binding-in.patch @@ -1,9 +1,11 @@ -From 23f3c5a2f5746c2e1eca2364ea6fb3d3e4515cf3 Mon Sep 17 00:00:00 2001 +From 7c87b9d5d1ab4d9487de665e92ab94de3bdf050f Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 11 Apr 2012 23:42:44 +0800 Subject: ARM: at91: Calao USB A926x factorize common binding in usb_a9260_common +commit cff4175ecdc2447847526b6352ca6f7d1139d5b5 upstream. + This will simplify the adding of the A9260. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0030-ARM-at91-DT-add-Calao-USB-A9260-DT-support.patch b/patches.at91/0030-ARM-at91-DT-add-Calao-USB-A9260-DT-support.patch index e3259ae532e1..eb56c24c2523 100644 --- a/patches.at91/0030-ARM-at91-DT-add-Calao-USB-A9260-DT-support.patch +++ b/patches.at91/0030-ARM-at91-DT-add-Calao-USB-A9260-DT-support.patch @@ -1,8 +1,10 @@ -From 83be7b15e8dea5beb4d3299835b79347c3148fd2 Mon Sep 17 00:00:00 2001 +From 4c5e3f92533de94648bd618ec5825c9952f1ab57 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 9 Apr 2012 14:43:34 +0800 Subject: ARM: at91: DT: add Calao USB A9260 DT support +commit 4e114c9576b53461b14ac30f5e6159e73aa6abd3 upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0031-ARM-at91-standard-device-init-only-if-DT-is-not-popu.patch b/patches.at91/0031-ARM-at91-standard-device-init-only-if-DT-is-not-popu.patch index f27c8142d2ba..e9bf9cb0c447 100644 --- a/patches.at91/0031-ARM-at91-standard-device-init-only-if-DT-is-not-popu.patch +++ b/patches.at91/0031-ARM-at91-standard-device-init-only-if-DT-is-not-popu.patch @@ -1,8 +1,10 @@ -From 07e34d884cb904668fe1e413fe10958a65de3c57 Mon Sep 17 00:00:00 2001 +From e693aa3e62f8ab17d523978b44543d489c4525e6 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 28 Feb 2012 15:23:43 +0800 Subject: ARM: at91: standard device init only if DT is not populated. +commit 8cf93b9ceaf4534cdeda5727782001f8fecb1688 upstream. + This will avoid the CONFIG_OF on the *_devices.c as this file is deprecated for DT support. diff --git a/patches.at91/0032-ARM-at91-add-at91sam9263-DT-support.patch b/patches.at91/0032-ARM-at91-add-at91sam9263-DT-support.patch index c624252fec83..2829283f017d 100644 --- a/patches.at91/0032-ARM-at91-add-at91sam9263-DT-support.patch +++ b/patches.at91/0032-ARM-at91-add-at91sam9263-DT-support.patch @@ -1,8 +1,10 @@ -From 6703c4d1f42cf346f9a6f5f174f46c01ece33c90 Mon Sep 17 00:00:00 2001 +From 04f070b90ea4e6121ecf05da4f2d86e28a7e3d72 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 26 Feb 2012 19:12:43 +0800 Subject: ARM: at91: add at91sam9263 DT support +commit 4abb367722c2dc06972658c8fad5b4763114477c upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0033-ARM-at91-add-at91sam9263ek-DT-support.patch b/patches.at91/0033-ARM-at91-add-at91sam9263ek-DT-support.patch index 7b9c30e1b7b6..b8d7b3e9243c 100644 --- a/patches.at91/0033-ARM-at91-add-at91sam9263ek-DT-support.patch +++ b/patches.at91/0033-ARM-at91-add-at91sam9263ek-DT-support.patch @@ -1,8 +1,10 @@ -From 57fab5b53e9cf05574fffd706373b62713eb616c Mon Sep 17 00:00:00 2001 +From 8dc26edb6641e03867239b76f0a6ab0042308db4 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 26 Feb 2012 19:12:43 +0800 Subject: ARM: at91: add at91sam9263ek DT support +commit 39f31cd40ae0c2301c00e6f1cf17bf20863c498c upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0034-ARM-at91-DT-add-Calao-USB-A9263-board-support.patch b/patches.at91/0034-ARM-at91-DT-add-Calao-USB-A9263-board-support.patch index 5ad367b549f0..627e04bc1e55 100644 --- a/patches.at91/0034-ARM-at91-DT-add-Calao-USB-A9263-board-support.patch +++ b/patches.at91/0034-ARM-at91-DT-add-Calao-USB-A9263-board-support.patch @@ -1,8 +1,10 @@ -From 6c84b391e098cad2350f661ebffd8b8d4f6b8981 Mon Sep 17 00:00:00 2001 +From ae8f5dd8fc1213e42edc565e31cd14f4aee1ff8d Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 12 Apr 2012 18:01:33 +0800 Subject: ARM: at91: DT: add Calao USB A9263 board support +commit 1fb4f71977c5ffe5875412949b0b7ab2bed3a283 upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0035-ARM-at91-DT-add-Calao-TNY-A9263-board-support.patch b/patches.at91/0035-ARM-at91-DT-add-Calao-TNY-A9263-board-support.patch index 1cdfb9cc6dc5..aa14a9ba87d6 100644 --- a/patches.at91/0035-ARM-at91-DT-add-Calao-TNY-A9263-board-support.patch +++ b/patches.at91/0035-ARM-at91-DT-add-Calao-TNY-A9263-board-support.patch @@ -1,8 +1,10 @@ -From 242797da12e5e34231572f9d5472ab2f80bbc301 Mon Sep 17 00:00:00 2001 +From 7c00f8580d1555427d9619881d0ad59f57665fbc Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 12 Apr 2012 18:47:32 +0800 Subject: ARM: at91: DT: add Calao TNY A9263 board support +commit 15787753d08107f2066b8ed8c9f8046ef3b766bb upstream. + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Nicolas Ferre --- diff --git a/patches.at91/0036-ARM-at91-add-kizbox-board-dt-support.patch b/patches.at91/0036-ARM-at91-add-kizbox-board-dt-support.patch index c6646e562f12..9728b1631279 100644 --- a/patches.at91/0036-ARM-at91-add-kizbox-board-dt-support.patch +++ b/patches.at91/0036-ARM-at91-add-kizbox-board-dt-support.patch @@ -1,8 +1,10 @@ -From 1dd636835a243a050417ff1c10f221ef545d5ab0 Mon Sep 17 00:00:00 2001 +From 32a078f6d401977db0ed9eca60974a7f52db183f Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 20 Apr 2012 14:37:50 +0200 Subject: ARM: at91: add kizbox board dt support. +commit df8267487c7f8d707faca430f4d759dbc2dad6f5 upstream. + This patch adds support for the kizbox board (based on at91sam9g20 SoC) Signed-off-by: Boris BREZILLON diff --git a/patches.at91/0037-Ethernut-5-board-support.patch b/patches.at91/0037-Ethernut-5-board-support.patch index a3b9b1084348..4c8c84e54736 100644 --- a/patches.at91/0037-Ethernut-5-board-support.patch +++ b/patches.at91/0037-Ethernut-5-board-support.patch @@ -1,8 +1,10 @@ -From 6d9ded2c6183d8098f852b2a5dcd18454f9de0e7 Mon Sep 17 00:00:00 2001 +From b05042223346bdeceecd5f4039da27b86010f682 Mon Sep 17 00:00:00 2001 From: Tim Schendekehl Date: Tue, 24 Apr 2012 18:47:59 +0200 Subject: Ethernut 5 board support +commit 26690863e2c1fa4fee5f6137b219f4b8a1a02287 upstream. + Add support for the Ethernut 5 open hardware design, based on Atmel's AT91SAM9XE512 SoC. diff --git a/patches.at91/0038-ARM-at91-Add-machine-header-file-for-AT91SAM9N12-SoC.patch b/patches.at91/0038-ARM-at91-Add-machine-header-file-for-AT91SAM9N12-SoC.patch index dc6f319c3282..b0318a5e8746 100644 --- a/patches.at91/0038-ARM-at91-Add-machine-header-file-for-AT91SAM9N12-SoC.patch +++ b/patches.at91/0038-ARM-at91-Add-machine-header-file-for-AT91SAM9N12-SoC.patch @@ -1,8 +1,10 @@ -From 771d02d8690db4118b239f864edca3d80d1c163f Mon Sep 17 00:00:00 2001 +From 917cda0ea634a3812fbe22a20f634254beafa1a0 Mon Sep 17 00:00:00 2001 From: Hong Xu Date: Tue, 17 Apr 2012 14:26:30 +0800 Subject: ARM: at91: Add machine header file for AT91SAM9N12 SoC +commit 02059684271079f96e2a7a4bdc7912f029997866 upstream. + Signed-off-by: Hong Xu Signed-off-by: Nicolas Ferre Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0039-ARM-at91-Add-machine-files-for-AT91SAM9N12-SoC.patch b/patches.at91/0039-ARM-at91-Add-machine-files-for-AT91SAM9N12-SoC.patch index c5a453488e8e..e4743efb17c7 100644 --- a/patches.at91/0039-ARM-at91-Add-machine-files-for-AT91SAM9N12-SoC.patch +++ b/patches.at91/0039-ARM-at91-Add-machine-files-for-AT91SAM9N12-SoC.patch @@ -1,8 +1,10 @@ -From 37b8c7ad2aa24a15b778cff614913c63b7e5c505 Mon Sep 17 00:00:00 2001 +From db8c0e1e68b38c879f7ff677bdacd20c3ec5b388 Mon Sep 17 00:00:00 2001 From: Hong Xu Date: Tue, 17 Apr 2012 14:26:31 +0800 Subject: ARM: at91: Add machine files for AT91SAM9N12 SoC +commit 74db4fb93e4ed4d6241bf0f28e4b5d68a7a05577 upstream. + Signed-off-by: Hong Xu Signed-off-by: Nicolas Ferre Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/patches.at91/0040-ARM-at91-Add-DT-description-files-for-AT91SAM9N12-EK.patch b/patches.at91/0040-ARM-at91-Add-DT-description-files-for-AT91SAM9N12-EK.patch index b84646a52eb9..ab3f456c8956 100644 --- a/patches.at91/0040-ARM-at91-Add-DT-description-files-for-AT91SAM9N12-EK.patch +++ b/patches.at91/0040-ARM-at91-Add-DT-description-files-for-AT91SAM9N12-EK.patch @@ -1,8 +1,10 @@ -From 2fc9a0d7df19f33a08242efb22d64e8d3d0280de Mon Sep 17 00:00:00 2001 +From a38377b607a1019457b443714b66b7d9cdd47380 Mon Sep 17 00:00:00 2001 From: Hong Xu Date: Tue, 17 Apr 2012 14:26:29 +0800 Subject: ARM: at91: Add DT description files for AT91SAM9N12-EK +commit cce783c608fee0716cff65926d1835a5fd097b69 upstream. + Added AT91SAM9N12 SoC DT file, as well as the board definition .dts file for AT91SAM9N12-EK. diff --git a/patches.at91/0041-ARM-at91-remove-two-unused-headers.patch b/patches.at91/0041-ARM-at91-remove-two-unused-headers.patch index a118d5ff83b6..244051fa4fd5 100644 --- a/patches.at91/0041-ARM-at91-remove-two-unused-headers.patch +++ b/patches.at91/0041-ARM-at91-remove-two-unused-headers.patch @@ -1,8 +1,10 @@ -From 2d672820ba5d6f2b3be8f73decfc00d4994af6ba Mon Sep 17 00:00:00 2001 +From cf269a7d1c0c08e2f7d609f026c28e32d41a1b0d Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Thu, 7 Jun 2012 12:18:46 +0200 Subject: ARM: at91: remove two unused headers +commit 2d1c9ccd68cdee502eb4829dfe1def7debc0298e upstream. + Commit 82c583e3ae31ffa76d1280197274cc1e1cde3179 ("AT91RM9200 hardware headers") introduced arch/arm/mach-at91/include/mach/at91_spi.h and arch/arm/mach-at91/include/mach/at91_ssc.h. (These files were called diff --git a/patches.at91/0042-ARM-at91-fix-at91_aic_write-macro.patch b/patches.at91/0042-ARM-at91-fix-at91_aic_write-macro.patch index c5cb945c019f..10a9432441b5 100644 --- a/patches.at91/0042-ARM-at91-fix-at91_aic_write-macro.patch +++ b/patches.at91/0042-ARM-at91-fix-at91_aic_write-macro.patch @@ -1,8 +1,10 @@ -From f7a7be1650e7160181c9ab1c4aeb5dd8b67ac939 Mon Sep 17 00:00:00 2001 +From 27948a35ec0d89d516dad5eca85e2bd27109483e Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 31 May 2012 17:26:05 +0200 Subject: ARM: at91: fix at91_aic_write macro +commit f25b00be60ab3865308a89437af66b277b04f53e upstream. + Fix at91_aic_write macro to avoid potential issues. Signed-off-by: Ludovic Desroches diff --git a/patches.at91/0043-USB-ohci-at91-use-resource_size-for-memory-io-resour.patch b/patches.at91/0043-USB-ohci-at91-use-resource_size-for-memory-io-resour.patch index 2f65c9fa7651..8712d4727bb0 100644 --- a/patches.at91/0043-USB-ohci-at91-use-resource_size-for-memory-io-resour.patch +++ b/patches.at91/0043-USB-ohci-at91-use-resource_size-for-memory-io-resour.patch @@ -1,8 +1,10 @@ -From 6b36e56532a5b9d9f2311165a95f2a0d31c40464 Mon Sep 17 00:00:00 2001 +From b6a6d64d8d141bd4f88453c6586dfe67813db266 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 9 May 2012 10:49:41 +0200 Subject: USB: ohci-at91: use resource_size() for memory/io resource length +commit 7a82f612fa3aadb5676184ae202903f5a42e4f4a upstream. + Signed-off-by: Nicolas Ferre Signed-off-by: Greg Kroah-Hartman --- diff --git a/patches.at91/0044-ARM-at91-clock-fix-PLLA-overclock-warning.patch b/patches.at91/0044-ARM-at91-clock-fix-PLLA-overclock-warning.patch new file mode 100644 index 000000000000..d378308e5a89 --- /dev/null +++ b/patches.at91/0044-ARM-at91-clock-fix-PLLA-overclock-warning.patch @@ -0,0 +1,49 @@ +From 4bd0bf333245414643729d864fdea1023984b8e9 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Mon, 9 Jul 2012 21:06:25 +0200 +Subject: ARM: at91/clock: fix PLLA overclock warning + +commit 2ed1f58900280f79485bbc15f781687bd9584675 upstream. + +Fix PLLA overclock warning in relation with datasheet numbers. +Add new > 240 MHz and > 210 MHz SoC categories. + +Reported-by: Jiri Prchal +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/clock.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c +index de2ec6b..188c829 100644 +--- a/arch/arm/mach-at91/clock.c ++++ b/arch/arm/mach-at91/clock.c +@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); + + #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) + ++#define cpu_has_240M_plla() (cpu_is_at91sam9261() \ ++ || cpu_is_at91sam9263() \ ++ || cpu_is_at91sam9rl()) ++ ++#define cpu_has_210M_plla() (cpu_is_at91sam9260()) ++ + #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5() \ +@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock) + } else if (cpu_has_800M_plla()) { + if (plla.rate_hz > 800000000) + pll_overclock = true; ++ } else if (cpu_has_240M_plla()) { ++ if (plla.rate_hz > 240000000) ++ pll_overclock = true; ++ } else if (cpu_has_210M_plla()) { ++ if (plla.rate_hz > 210000000) ++ pll_overclock = true; + } else { + if (plla.rate_hz > 209000000) + pll_overclock = true; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0044-USB-Kconfig-add-Atmel-usba-driver-entry.patch b/patches.at91/0044-USB-Kconfig-add-Atmel-usba-driver-entry.patch deleted file mode 100644 index 782778b7ce0d..000000000000 --- a/patches.at91/0044-USB-Kconfig-add-Atmel-usba-driver-entry.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 4a0e29935e53da412664f85d25d46ba719ec2294 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Tue, 19 Jun 2012 13:14:10 +0200 -Subject: USB: Kconfig: add Atmel usba driver entry - -Allow the USBA entry to be selected for every AT91 SoC. -Will allow to select driver for newer SoCs. - -Signed-off-by: Nicolas Ferre ---- - drivers/usb/gadget/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index 2633f75..10fea8b 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -150,7 +150,7 @@ config USB_AT91 - config USB_ATMEL_USBA - tristate "Atmel USBA" - select USB_GADGET_DUALSPEED -- depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 -+ depends on AVR32 || ARCH_AT91 - help - USBA is the integrated high-speed USB Device controller on - the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel. --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0045-ARM-at91-clock-fix-PLLA-overclock-warning.patch b/patches.at91/0045-ARM-at91-clock-fix-PLLA-overclock-warning.patch deleted file mode 100644 index 50009b45b6fa..000000000000 --- a/patches.at91/0045-ARM-at91-clock-fix-PLLA-overclock-warning.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 0880824561e6e9769027d83be21e5ab3f8aa9d31 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 9 Jul 2012 21:06:25 +0200 -Subject: ARM: at91/clock: fix PLLA overclock warning - -Fix PLLA overclock warning in relation with datasheet numbers. -Add new > 240 MHz and > 210 MHz SoC categories. - -Reported-by: Jiri Prchal -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/clock.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c -index de2ec6b..188c829 100644 ---- a/arch/arm/mach-at91/clock.c -+++ b/arch/arm/mach-at91/clock.c -@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); - - #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) - -+#define cpu_has_240M_plla() (cpu_is_at91sam9261() \ -+ || cpu_is_at91sam9263() \ -+ || cpu_is_at91sam9rl()) -+ -+#define cpu_has_210M_plla() (cpu_is_at91sam9260()) -+ - #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45() \ - || cpu_is_at91sam9x5() \ -@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock) - } else if (cpu_has_800M_plla()) { - if (plla.rate_hz > 800000000) - pll_overclock = true; -+ } else if (cpu_has_240M_plla()) { -+ if (plla.rate_hz > 240000000) -+ pll_overclock = true; -+ } else if (cpu_has_210M_plla()) { -+ if (plla.rate_hz > 210000000) -+ pll_overclock = true; - } else { - if (plla.rate_hz > 209000000) - pll_overclock = true; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0045-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch b/patches.at91/0045-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch new file mode 100644 index 000000000000..1053b1c01ef9 --- /dev/null +++ b/patches.at91/0045-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch @@ -0,0 +1,31 @@ +From d8b0eeec1568a9dd566c733e25d349704aa0ba61 Mon Sep 17 00:00:00 2001 +From: Bo Shen +Date: Fri, 17 Aug 2012 16:23:56 +0800 +Subject: ARM: at91/dts: remove partial parameter in at91sam9g25ek.dts + +commit 9e0255dd035348953e23161b7158b2ce0ddc182e upstream. + +Remove the malformed "mem=" bootargs parameter in at91sam9g25ek.dts + +Signed-off-by: Bo Shen +Signed-off-by: Nicolas Ferre +--- + arch/arm/boot/dts/at91sam9g25ek.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts +index 7829a4d..96514c1 100644 +--- a/arch/arm/boot/dts/at91sam9g25ek.dts ++++ b/arch/arm/boot/dts/at91sam9g25ek.dts +@@ -15,7 +15,7 @@ + compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; + + chosen { +- bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; ++ bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; + }; + + ahb { +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0046-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch b/patches.at91/0046-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch deleted file mode 100644 index 721fb1e214f3..000000000000 --- a/patches.at91/0046-ARM-at91-dts-remove-partial-parameter-in-at91sam9g25.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 5870fd6e3a30ac854a4f38eba8976fbde68fa705 Mon Sep 17 00:00:00 2001 -From: Bo Shen -Date: Fri, 17 Aug 2012 16:23:56 +0800 -Subject: ARM: at91/dts: remove partial parameter in at91sam9g25ek.dts - -Remove the malformed "mem=" bootargs parameter in at91sam9g25ek.dts - -Signed-off-by: Bo Shen -Signed-off-by: Nicolas Ferre ---- - arch/arm/boot/dts/at91sam9g25ek.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts -index 7829a4d..96514c1 100644 ---- a/arch/arm/boot/dts/at91sam9g25ek.dts -+++ b/arch/arm/boot/dts/at91sam9g25ek.dts -@@ -15,7 +15,7 @@ - compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; - - chosen { -- bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; -+ bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; - }; - - ahb { --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0046-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch b/patches.at91/0046-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch new file mode 100644 index 000000000000..437f889944e4 --- /dev/null +++ b/patches.at91/0046-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch @@ -0,0 +1,35 @@ +From 119447ac8e1e07bc8a44760ffa4a72ec55fce825 Mon Sep 17 00:00:00 2001 +From: Paul Bolle +Date: Thu, 24 May 2012 16:30:29 +0200 +Subject: ARM: at91: set i2c_board_info.type to "ds1339" directly + +commit c1cb59fde7d1570e23d97d9b2a988760f732e28b upstream. + +The single element of the cpu9krea_i2c_devices array (of type struct +i2c_board_info) has its "type" member set twice. First to "rtc-ds1307" +(through the I2C_BOARD_INFO macro) and then directly to "ds1339". Just +set it (once and) directly to "ds1339" instead. + +Signed-off-by: Paul Bolle +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/board-cpu9krea.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c +index 69951ec..ece0d76 100644 +--- a/arch/arm/mach-at91/board-cpu9krea.c ++++ b/arch/arm/mach-at91/board-cpu9krea.c +@@ -253,8 +253,7 @@ static struct gpio_led cpu9krea_leds[] = { + + static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = { + { +- I2C_BOARD_INFO("rtc-ds1307", 0x68), +- .type = "ds1339", ++ I2C_BOARD_INFO("ds1339", 0x68), + }, + }; + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0047-ARM-at91-defconfig-Remove-unaffected-config-option.patch b/patches.at91/0047-ARM-at91-defconfig-Remove-unaffected-config-option.patch new file mode 100644 index 000000000000..579690649b50 --- /dev/null +++ b/patches.at91/0047-ARM-at91-defconfig-Remove-unaffected-config-option.patch @@ -0,0 +1,125 @@ +From 10bcd9d24bf2abbe98c2e12f83926e1aa1dc4799 Mon Sep 17 00:00:00 2001 +From: Richard Genoud +Date: Fri, 22 Jun 2012 15:29:28 +0200 +Subject: ARM: at91/defconfig: Remove unaffected config option + +commit b4084bcf5ae833e049b0c428868de7e4efae2e4f upstream. + +The commit bf4289cba02b8cf770ecd7959ca70839f0dd9d3c removed the use of +CONFIG_MTD_NAND_ATMEL_ECC_NONE and CONFIG_MTD_NAND_ATMEL_ECC_HW but the +Kconfig file was forgotten. + +This patch remove those inoperative options. + +Signed-off-by: Richard Genoud +Signed-off-by: Nicolas Ferre +--- + arch/arm/configs/afeb9260_defconfig | 1 - + arch/arm/configs/at91sam9263_defconfig | 1 - + arch/arm/configs/qil-a9260_defconfig | 1 - + arch/arm/configs/usb-a9260_defconfig | 1 - + drivers/mtd/nand/Kconfig | 40 ---------------------------------- + 5 files changed, 44 deletions(-) + +diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig +index 2afdf67..c285a9d 100644 +--- a/arch/arm/configs/afeb9260_defconfig ++++ b/arch/arm/configs/afeb9260_defconfig +@@ -39,7 +39,6 @@ CONFIG_MTD_BLOCK=y + CONFIG_MTD_DATAFLASH=y + CONFIG_MTD_NAND=y + CONFIG_MTD_NAND_ATMEL=y +-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y + CONFIG_BLK_DEV_RAM=y + CONFIG_BLK_DEV_RAM_SIZE=8192 + CONFIG_ATMEL_SSC=y +diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig +index 1cf9626..585e7e0 100644 +--- a/arch/arm/configs/at91sam9263_defconfig ++++ b/arch/arm/configs/at91sam9263_defconfig +@@ -61,7 +61,6 @@ CONFIG_MTD_DATAFLASH=y + CONFIG_MTD_BLOCK2MTD=y + CONFIG_MTD_NAND=y + CONFIG_MTD_NAND_ATMEL=y +-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y + CONFIG_MTD_UBI=y + CONFIG_MTD_UBI_GLUEBI=y + CONFIG_BLK_DEV_LOOP=y +diff --git a/arch/arm/configs/qil-a9260_defconfig b/arch/arm/configs/qil-a9260_defconfig +index 9160f3b..2bb100b 100644 +--- a/arch/arm/configs/qil-a9260_defconfig ++++ b/arch/arm/configs/qil-a9260_defconfig +@@ -50,7 +50,6 @@ CONFIG_MTD_BLOCK=y + CONFIG_MTD_DATAFLASH=y + CONFIG_MTD_NAND=y + CONFIG_MTD_NAND_ATMEL=y +-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y + CONFIG_BLK_DEV_LOOP=y + # CONFIG_MISC_DEVICES is not set + CONFIG_SCSI=y +diff --git a/arch/arm/configs/usb-a9260_defconfig b/arch/arm/configs/usb-a9260_defconfig +index 2e39f38..a1501e1 100644 +--- a/arch/arm/configs/usb-a9260_defconfig ++++ b/arch/arm/configs/usb-a9260_defconfig +@@ -49,7 +49,6 @@ CONFIG_MTD_BLOCK=y + CONFIG_MTD_DATAFLASH=y + CONFIG_MTD_NAND=y + CONFIG_MTD_NAND_ATMEL=y +-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y + CONFIG_BLK_DEV_LOOP=y + # CONFIG_MISC_DEVICES is not set + CONFIG_SCSI=y +diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig +index 7d17cec..0e43a3f 100644 +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -366,46 +366,6 @@ config MTD_NAND_ATMEL + help + Enables support for NAND Flash / Smart Media Card interface + on Atmel AT91 and AVR32 processors. +-choice +- prompt "ECC management for NAND Flash / SmartMedia on AT91 / AVR32" +- depends on MTD_NAND_ATMEL +- +-config MTD_NAND_ATMEL_ECC_HW +- bool "Hardware ECC" +- depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 +- help +- Use hardware ECC instead of software ECC when the chip +- supports it. +- +- The hardware ECC controller is capable of single bit error +- correction and 2-bit random detection per page. +- +- NB : hardware and software ECC schemes are incompatible. +- If you switch from one to another, you'll have to erase your +- mtd partition. +- +- If unsure, say Y +- +-config MTD_NAND_ATMEL_ECC_SOFT +- bool "Software ECC" +- help +- Use software ECC. +- +- NB : hardware and software ECC schemes are incompatible. +- If you switch from one to another, you'll have to erase your +- mtd partition. +- +-config MTD_NAND_ATMEL_ECC_NONE +- bool "No ECC (testing only, DANGEROUS)" +- depends on DEBUG_KERNEL +- help +- No ECC will be used. +- It's not a good idea and it should be reserved for testing +- purpose only. +- +- If unsure, say N +- +-endchoice + + config MTD_NAND_PXA3xx + tristate "Support for NAND flash devices on PXA3xx" +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0047-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch b/patches.at91/0047-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch deleted file mode 100644 index 503985d9b9f9..000000000000 --- a/patches.at91/0047-ARM-at91-set-i2c_board_info.type-to-ds1339-directly.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 632b3f90968b823b65b84cac6b348b13ad662a95 Mon Sep 17 00:00:00 2001 -From: Paul Bolle -Date: Thu, 24 May 2012 16:30:29 +0200 -Subject: ARM: at91: set i2c_board_info.type to "ds1339" directly - -The single element of the cpu9krea_i2c_devices array (of type struct -i2c_board_info) has its "type" member set twice. First to "rtc-ds1307" -(through the I2C_BOARD_INFO macro) and then directly to "ds1339". Just -set it (once and) directly to "ds1339" instead. - -Signed-off-by: Paul Bolle -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/board-cpu9krea.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c -index 69951ec..ece0d76 100644 ---- a/arch/arm/mach-at91/board-cpu9krea.c -+++ b/arch/arm/mach-at91/board-cpu9krea.c -@@ -253,8 +253,7 @@ static struct gpio_led cpu9krea_leds[] = { - - static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = { - { -- I2C_BOARD_INFO("rtc-ds1307", 0x68), -- .type = "ds1339", -+ I2C_BOARD_INFO("ds1339", 0x68), - }, - }; - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0048-ARM-at91-defconfig-Remove-unaffected-config-option.patch b/patches.at91/0048-ARM-at91-defconfig-Remove-unaffected-config-option.patch deleted file mode 100644 index 2a84b809661f..000000000000 --- a/patches.at91/0048-ARM-at91-defconfig-Remove-unaffected-config-option.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 7b849b56ec5599dbe5454204511d904c0d1c2be4 Mon Sep 17 00:00:00 2001 -From: Richard Genoud -Date: Fri, 22 Jun 2012 15:29:28 +0200 -Subject: ARM: at91/defconfig: Remove unaffected config option - -The commit bf4289cba02b8cf770ecd7959ca70839f0dd9d3c removed the use of -CONFIG_MTD_NAND_ATMEL_ECC_NONE and CONFIG_MTD_NAND_ATMEL_ECC_HW but the -Kconfig file was forgotten. - -This patch remove those inoperative options. - -Signed-off-by: Richard Genoud -Signed-off-by: Nicolas Ferre ---- - arch/arm/configs/afeb9260_defconfig | 1 - - arch/arm/configs/at91sam9263_defconfig | 1 - - arch/arm/configs/qil-a9260_defconfig | 1 - - arch/arm/configs/usb-a9260_defconfig | 1 - - drivers/mtd/nand/Kconfig | 40 ---------------------------------- - 5 files changed, 44 deletions(-) - -diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig -index 2afdf67..c285a9d 100644 ---- a/arch/arm/configs/afeb9260_defconfig -+++ b/arch/arm/configs/afeb9260_defconfig -@@ -39,7 +39,6 @@ CONFIG_MTD_BLOCK=y - CONFIG_MTD_DATAFLASH=y - CONFIG_MTD_NAND=y - CONFIG_MTD_NAND_ATMEL=y --CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y - CONFIG_BLK_DEV_RAM=y - CONFIG_BLK_DEV_RAM_SIZE=8192 - CONFIG_ATMEL_SSC=y -diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig -index 1cf9626..585e7e0 100644 ---- a/arch/arm/configs/at91sam9263_defconfig -+++ b/arch/arm/configs/at91sam9263_defconfig -@@ -61,7 +61,6 @@ CONFIG_MTD_DATAFLASH=y - CONFIG_MTD_BLOCK2MTD=y - CONFIG_MTD_NAND=y - CONFIG_MTD_NAND_ATMEL=y --CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y - CONFIG_MTD_UBI=y - CONFIG_MTD_UBI_GLUEBI=y - CONFIG_BLK_DEV_LOOP=y -diff --git a/arch/arm/configs/qil-a9260_defconfig b/arch/arm/configs/qil-a9260_defconfig -index 9160f3b..2bb100b 100644 ---- a/arch/arm/configs/qil-a9260_defconfig -+++ b/arch/arm/configs/qil-a9260_defconfig -@@ -50,7 +50,6 @@ CONFIG_MTD_BLOCK=y - CONFIG_MTD_DATAFLASH=y - CONFIG_MTD_NAND=y - CONFIG_MTD_NAND_ATMEL=y --CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y - CONFIG_BLK_DEV_LOOP=y - # CONFIG_MISC_DEVICES is not set - CONFIG_SCSI=y -diff --git a/arch/arm/configs/usb-a9260_defconfig b/arch/arm/configs/usb-a9260_defconfig -index 2e39f38..a1501e1 100644 ---- a/arch/arm/configs/usb-a9260_defconfig -+++ b/arch/arm/configs/usb-a9260_defconfig -@@ -49,7 +49,6 @@ CONFIG_MTD_BLOCK=y - CONFIG_MTD_DATAFLASH=y - CONFIG_MTD_NAND=y - CONFIG_MTD_NAND_ATMEL=y --CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y - CONFIG_BLK_DEV_LOOP=y - # CONFIG_MISC_DEVICES is not set - CONFIG_SCSI=y -diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig -index 7d17cec..0e43a3f 100644 ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -366,46 +366,6 @@ config MTD_NAND_ATMEL - help - Enables support for NAND Flash / Smart Media Card interface - on Atmel AT91 and AVR32 processors. --choice -- prompt "ECC management for NAND Flash / SmartMedia on AT91 / AVR32" -- depends on MTD_NAND_ATMEL -- --config MTD_NAND_ATMEL_ECC_HW -- bool "Hardware ECC" -- depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 -- help -- Use hardware ECC instead of software ECC when the chip -- supports it. -- -- The hardware ECC controller is capable of single bit error -- correction and 2-bit random detection per page. -- -- NB : hardware and software ECC schemes are incompatible. -- If you switch from one to another, you'll have to erase your -- mtd partition. -- -- If unsure, say Y -- --config MTD_NAND_ATMEL_ECC_SOFT -- bool "Software ECC" -- help -- Use software ECC. -- -- NB : hardware and software ECC schemes are incompatible. -- If you switch from one to another, you'll have to erase your -- mtd partition. -- --config MTD_NAND_ATMEL_ECC_NONE -- bool "No ECC (testing only, DANGEROUS)" -- depends on DEBUG_KERNEL -- help -- No ECC will be used. -- It's not a good idea and it should be reserved for testing -- purpose only. -- -- If unsure, say N -- --endchoice - - config MTD_NAND_PXA3xx - tristate "Support for NAND flash devices on PXA3xx" --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0048-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch b/patches.at91/0048-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch new file mode 100644 index 000000000000..68c81844ed6e --- /dev/null +++ b/patches.at91/0048-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch @@ -0,0 +1,209 @@ +From d735b914ddb8a98a5a79c817c04625c70158941d Mon Sep 17 00:00:00 2001 +From: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu, 13 Sep 2012 12:40:26 +0200 +Subject: ARM: at91: fix missing #interrupt-cells on gpio-controller + +commit 51ac51a6a5ab5f0aff46c4757ba4c32f3f8f7a2e upstream. + +Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD +Tested-by: Bo Shen +Signed-off-by: Nicolas Ferre +--- + arch/arm/boot/dts/at91sam9260.dtsi | 3 +++ + arch/arm/boot/dts/at91sam9263.dtsi | 5 +++++ + arch/arm/boot/dts/at91sam9g45.dtsi | 5 +++++ + arch/arm/boot/dts/at91sam9n12.dtsi | 4 ++++ + arch/arm/boot/dts/at91sam9x5.dtsi | 4 ++++ + 5 files changed, 21 insertions(+) + +diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi +index f4605ff..eddc467 100644 +--- a/arch/arm/boot/dts/at91sam9260.dtsi ++++ b/arch/arm/boot/dts/at91sam9260.dtsi +@@ -103,6 +103,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioB: gpio@fffff600 { +@@ -112,6 +113,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioC: gpio@fffff800 { +@@ -121,6 +123,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + dbgu: serial@fffff200 { +diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi +index 0209913..d330de9 100644 +--- a/arch/arm/boot/dts/at91sam9263.dtsi ++++ b/arch/arm/boot/dts/at91sam9263.dtsi +@@ -94,6 +94,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioB: gpio@fffff400 { +@@ -103,6 +104,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioC: gpio@fffff600 { +@@ -112,6 +114,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioD: gpio@fffff800 { +@@ -121,6 +124,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioE: gpio@fffffa00 { +@@ -130,6 +134,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + dbgu: serial@ffffee00 { +diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi +index c804214..d1c497d 100644 +--- a/arch/arm/boot/dts/at91sam9g45.dtsi ++++ b/arch/arm/boot/dts/at91sam9g45.dtsi +@@ -112,6 +112,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioB: gpio@fffff400 { +@@ -121,6 +122,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioC: gpio@fffff600 { +@@ -130,6 +132,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioD: gpio@fffff800 { +@@ -139,6 +142,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioE: gpio@fffffa00 { +@@ -148,6 +152,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + dbgu: serial@ffffee00 { +diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi +index cb84de7..a69e89a 100644 +--- a/arch/arm/boot/dts/at91sam9n12.dtsi ++++ b/arch/arm/boot/dts/at91sam9n12.dtsi +@@ -107,6 +107,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioB: gpio@fffff600 { +@@ -116,6 +117,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioC: gpio@fffff800 { +@@ -125,6 +127,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioD: gpio@fffffa00 { +@@ -134,6 +137,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + dbgu: serial@fffff200 { +diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi +index dd4ed74..80a50864 100644 +--- a/arch/arm/boot/dts/at91sam9x5.dtsi ++++ b/arch/arm/boot/dts/at91sam9x5.dtsi +@@ -114,6 +114,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioB: gpio@fffff600 { +@@ -123,6 +124,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioC: gpio@fffff800 { +@@ -132,6 +134,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pioD: gpio@fffffa00 { +@@ -141,6 +144,7 @@ + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; ++ #interrupt-cells = <2>; + }; + + dbgu: serial@fffff200 { +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0049-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch b/patches.at91/0049-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch deleted file mode 100644 index 06db420f8ecd..000000000000 --- a/patches.at91/0049-ARM-at91-fix-missing-interrupt-cells-on-gpio-control.patch +++ /dev/null @@ -1,207 +0,0 @@ -From 567e6c4f49b1acf13d0e60ba9a6e1faa78f865a1 Mon Sep 17 00:00:00 2001 -From: Jean-Christophe PLAGNIOL-VILLARD -Date: Thu, 13 Sep 2012 12:40:26 +0200 -Subject: ARM: at91: fix missing #interrupt-cells on gpio-controller - -Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD -Tested-by: Bo Shen -Signed-off-by: Nicolas Ferre ---- - arch/arm/boot/dts/at91sam9260.dtsi | 3 +++ - arch/arm/boot/dts/at91sam9263.dtsi | 5 +++++ - arch/arm/boot/dts/at91sam9g45.dtsi | 5 +++++ - arch/arm/boot/dts/at91sam9n12.dtsi | 4 ++++ - arch/arm/boot/dts/at91sam9x5.dtsi | 4 ++++ - 5 files changed, 21 insertions(+) - -diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi -index f4605ff..eddc467 100644 ---- a/arch/arm/boot/dts/at91sam9260.dtsi -+++ b/arch/arm/boot/dts/at91sam9260.dtsi -@@ -103,6 +103,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioB: gpio@fffff600 { -@@ -112,6 +113,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioC: gpio@fffff800 { -@@ -121,6 +123,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - dbgu: serial@fffff200 { -diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi -index 0209913..d330de9 100644 ---- a/arch/arm/boot/dts/at91sam9263.dtsi -+++ b/arch/arm/boot/dts/at91sam9263.dtsi -@@ -94,6 +94,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioB: gpio@fffff400 { -@@ -103,6 +104,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioC: gpio@fffff600 { -@@ -112,6 +114,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioD: gpio@fffff800 { -@@ -121,6 +124,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioE: gpio@fffffa00 { -@@ -130,6 +134,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - dbgu: serial@ffffee00 { -diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi -index c804214..d1c497d 100644 ---- a/arch/arm/boot/dts/at91sam9g45.dtsi -+++ b/arch/arm/boot/dts/at91sam9g45.dtsi -@@ -112,6 +112,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioB: gpio@fffff400 { -@@ -121,6 +122,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioC: gpio@fffff600 { -@@ -130,6 +132,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioD: gpio@fffff800 { -@@ -139,6 +142,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioE: gpio@fffffa00 { -@@ -148,6 +152,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - dbgu: serial@ffffee00 { -diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi -index cb84de7..a69e89a 100644 ---- a/arch/arm/boot/dts/at91sam9n12.dtsi -+++ b/arch/arm/boot/dts/at91sam9n12.dtsi -@@ -107,6 +107,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioB: gpio@fffff600 { -@@ -116,6 +117,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioC: gpio@fffff800 { -@@ -125,6 +127,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioD: gpio@fffffa00 { -@@ -134,6 +137,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - dbgu: serial@fffff200 { -diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi -index dd4ed74..80a50864 100644 ---- a/arch/arm/boot/dts/at91sam9x5.dtsi -+++ b/arch/arm/boot/dts/at91sam9x5.dtsi -@@ -114,6 +114,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioB: gpio@fffff600 { -@@ -123,6 +124,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioC: gpio@fffff800 { -@@ -132,6 +134,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - pioD: gpio@fffffa00 { -@@ -141,6 +144,7 @@ - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -+ #interrupt-cells = <2>; - }; - - dbgu: serial@fffff200 { --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0050-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch b/patches.at91/0050-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch new file mode 100644 index 000000000000..08443b8139b2 --- /dev/null +++ b/patches.at91/0050-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch @@ -0,0 +1,30 @@ +From 232aa09c9e9aa7e03a83382ef27612bcbed93570 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Wed, 19 Sep 2012 10:02:32 +0200 +Subject: ARM: at91: missing header file for rtc-at91rm9200.c + +Included in commit 14070ade02cc378bc30dae383532768a94805988 upstream. + +Missing asm/io.h inclusion causing issue with __raw_readl and +__raw_writel. + +Signed-off-by: Ludovic Desroches +--- + drivers/rtc/rtc-at91rm9200.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c +index dc474bc..f02acb0 100644 +--- a/drivers/rtc/rtc-at91rm9200.c ++++ b/drivers/rtc/rtc-at91rm9200.c +@@ -28,6 +28,7 @@ + #include + #include + ++#include + #include + + #include +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0051-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch b/patches.at91/0051-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch deleted file mode 100644 index 157177082280..000000000000 --- a/patches.at91/0051-ARM-at91-missing-header-file-for-rtc-at91rm9200.c.patch +++ /dev/null @@ -1,28 +0,0 @@ -From d20929e0422398f34a241a11d9183fc7750c9f4e Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Wed, 19 Sep 2012 10:02:32 +0200 -Subject: ARM: at91: missing header file for rtc-at91rm9200.c - -Missing asm/io.h inclusion causing issue with __raw_readl and -__raw_writel. - -Signed-off-by: Ludovic Desroches ---- - drivers/rtc/rtc-at91rm9200.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c -index dc474bc..f02acb0 100644 ---- a/drivers/rtc/rtc-at91rm9200.c -+++ b/drivers/rtc/rtc-at91rm9200.c -@@ -28,6 +28,7 @@ - #include - #include - -+#include - #include - - #include --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0051-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch b/patches.at91/0051-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch new file mode 100644 index 000000000000..62d3febecc41 --- /dev/null +++ b/patches.at91/0051-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch @@ -0,0 +1,39 @@ +From 79625ccc49e70d4cc8bb3361c98fd5ff3ad40157 Mon Sep 17 00:00:00 2001 +From: Joachim Eastwood +Date: Thu, 23 Aug 2012 18:14:54 +0200 +Subject: ASoC: atmel-ssc: include linux/io.h for raw io + +commit b969afc8b719bbe3f0842a694e6bf5e87f08868f upstream. + +Include linux/io.h for raw io operations in atmel-scc header. + +This fixes the following build error: + CC [M] sound/soc/atmel/atmel_ssc_dai.o +sound/soc/atmel/atmel_ssc_dai.c: In function 'atmel_ssc_interrupt': +sound/soc/atmel/atmel_ssc_dai.c:171: error: implicit declaration of function '__raw_readl' +sound/soc/atmel/atmel_ssc_dai.c: In function 'atmel_ssc_shutdown': +sound/soc/atmel/atmel_ssc_dai.c:249: error: implicit declaration of function '__raw_writel' + +Signed-off-by: Joachim Eastwood +Signed-off-by: Nicolas Ferre +Acked-by: Jean-Christophe PLAGNIOL-VILLARD +Signed-off-by: Mark Brown +--- + include/linux/atmel-ssc.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h +index 0602339..4eb3175 100644 +--- a/include/linux/atmel-ssc.h ++++ b/include/linux/atmel-ssc.h +@@ -3,6 +3,7 @@ + + #include + #include ++#include + + struct ssc_device { + struct list_head list; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0052-ARM-at91-aic-can-use-fast-eoi-handler-type.patch b/patches.at91/0052-ARM-at91-aic-can-use-fast-eoi-handler-type.patch new file mode 100644 index 000000000000..2c41a774b429 --- /dev/null +++ b/patches.at91/0052-ARM-at91-aic-can-use-fast-eoi-handler-type.patch @@ -0,0 +1,160 @@ +From 6c4b12f6fc72208ab963463412acba210d137e71 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Fri, 25 May 2012 14:11:51 +0200 +Subject: ARM: at91: aic can use fast eoi handler type + +commit 42a859daaf6af4d234fcf964a421666d5cca3f6a upstream. + +The Advanced Interrupt Controller allows us to use the fast EOI handler type. +It lets us remove the Atmel specific workaround into arch/arm/kernel/irq.c +used to indicate to the AIC the end of the interrupt treatment. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Will Deacon +--- + arch/arm/kernel/irq.c | 10 ---------- + arch/arm/mach-at91/gpio.c | 9 +++++---- + arch/arm/mach-at91/include/mach/irqs.h | 7 ------- + arch/arm/mach-at91/irq.c | 15 ++++++++++++--- + 4 files changed, 17 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c +index 8349d4e..16cedb4 100644 +--- a/arch/arm/kernel/irq.c ++++ b/arch/arm/kernel/irq.c +@@ -40,13 +40,6 @@ + #include + #include + +-/* +- * No architecture-specific irq_finish function defined in arm/arch/irqs.h. +- */ +-#ifndef irq_finish +-#define irq_finish(irq) do { } while (0) +-#endif +- + unsigned long irq_err_count; + + int arch_show_interrupts(struct seq_file *p, int prec) +@@ -85,9 +78,6 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs) + generic_handle_irq(irq); + } + +- /* AT91 specific workaround */ +- irq_finish(irq); +- + irq_exit(); + set_irq_regs(old_regs); + } +diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c +index 325837a..be42cf0 100644 +--- a/arch/arm/mach-at91/gpio.c ++++ b/arch/arm/mach-at91/gpio.c +@@ -26,6 +26,8 @@ + #include + #include + ++#include ++ + #include + #include + +@@ -585,15 +587,14 @@ static struct irq_chip gpio_irqchip = { + + static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) + { ++ struct irq_chip *chip = irq_desc_get_chip(desc); + struct irq_data *idata = irq_desc_get_irq_data(desc); +- struct irq_chip *chip = irq_data_get_irq_chip(idata); + struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); + void __iomem *pio = at91_gpio->regbase; + unsigned long isr; + int n; + +- /* temporarily mask (level sensitive) parent IRQ */ +- chip->irq_ack(idata); ++ chained_irq_enter(chip, desc); + for (;;) { + /* Reading ISR acks pending (edge triggered) GPIO interrupts. + * When there none are pending, we're finished unless we need +@@ -614,7 +615,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) + n = find_next_bit(&isr, BITS_PER_LONG, n + 1); + } + } +- chip->irq_unmask(idata); ++ chained_irq_exit(chip, desc); + /* now it may re-trigger */ + } + +diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h +index ac8b7df..2d510ee 100644 +--- a/arch/arm/mach-at91/include/mach/irqs.h ++++ b/arch/arm/mach-at91/include/mach/irqs.h +@@ -28,13 +28,6 @@ + + + /* +- * Acknowledge interrupt with AIC after interrupt has been handled. +- * (by kernel/irq.c) +- */ +-#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) +- +- +-/* + * IRQ interrupt symbols are the AT91xxx_ID_* symbols + * for IRQs handled directly through the AIC, or else the AT91_PIN_* + * symbols in gpio.h for ones handled indirectly as GPIOs. +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index cfcfcbe..2d5d4c8 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -55,6 +55,15 @@ static void at91_aic_unmask_irq(struct irq_data *d) + at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); + } + ++static void at91_aic_eoi(struct irq_data *d) ++{ ++ /* ++ * Mark end-of-interrupt on AIC, the controller doesn't care about ++ * the value written. Moreover it's a write-only register. ++ */ ++ at91_aic_write(AT91_AIC_EOICR, 0); ++} ++ + unsigned int at91_extern_irq; + + #define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) +@@ -128,11 +137,11 @@ void at91_irq_resume(void) + + static struct irq_chip at91_aic_chip = { + .name = "AIC", +- .irq_ack = at91_aic_mask_irq, + .irq_mask = at91_aic_mask_irq, + .irq_unmask = at91_aic_unmask_irq, + .irq_set_type = at91_aic_set_type, + .irq_set_wake = at91_aic_set_wake, ++ .irq_eoi = at91_aic_eoi, + }; + + static void __init at91_aic_hw_init(unsigned int spu_vector) +@@ -171,7 +180,7 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + /* Active Low interrupt, without priority */ + at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); + +- irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); ++ irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); + + return 0; +@@ -238,7 +247,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) + /* Active Low interrupt, with the specified priority */ + at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); + +- irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); ++ irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0052-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch b/patches.at91/0052-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch deleted file mode 100644 index f5e8dcfeb5ac..000000000000 --- a/patches.at91/0052-ASoC-atmel-ssc-include-linux-io.h-for-raw-io.patch +++ /dev/null @@ -1,37 +0,0 @@ -From dc55ac7fd56dc3973d15f3a263b29ce222715771 Mon Sep 17 00:00:00 2001 -From: Joachim Eastwood -Date: Thu, 23 Aug 2012 18:14:54 +0200 -Subject: ASoC: atmel-ssc: include linux/io.h for raw io - -Include linux/io.h for raw io operations in atmel-scc header. - -This fixes the following build error: - CC [M] sound/soc/atmel/atmel_ssc_dai.o -sound/soc/atmel/atmel_ssc_dai.c: In function 'atmel_ssc_interrupt': -sound/soc/atmel/atmel_ssc_dai.c:171: error: implicit declaration of function '__raw_readl' -sound/soc/atmel/atmel_ssc_dai.c: In function 'atmel_ssc_shutdown': -sound/soc/atmel/atmel_ssc_dai.c:249: error: implicit declaration of function '__raw_writel' - -Signed-off-by: Joachim Eastwood -Signed-off-by: Nicolas Ferre -Acked-by: Jean-Christophe PLAGNIOL-VILLARD -Signed-off-by: Mark Brown ---- - include/linux/atmel-ssc.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h -index 0602339..4eb3175 100644 ---- a/include/linux/atmel-ssc.h -+++ b/include/linux/atmel-ssc.h -@@ -3,6 +3,7 @@ - - #include - #include -+#include - - struct ssc_device { - struct list_head list; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0053-ARM-at91-aic-add-dt-support-for-external-irqs.patch b/patches.at91/0053-ARM-at91-aic-add-dt-support-for-external-irqs.patch new file mode 100644 index 000000000000..ee25075e7e27 --- /dev/null +++ b/patches.at91/0053-ARM-at91-aic-add-dt-support-for-external-irqs.patch @@ -0,0 +1,124 @@ +From 6d79a82baf09ee3a77f305542cf0ed0c00fa325f Mon Sep 17 00:00:00 2001 +From: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon, 9 Apr 2012 19:36:36 +0800 +Subject: ARM: at91: aic add dt support for external irqs + +commit c65739437045c351a2a0ddb834719b9d616d4d47 upstream. + +Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD +--- + Documentation/devicetree/bindings/arm/atmel-aic.txt | 1 + + arch/arm/boot/dts/at91sam9260.dtsi | 1 + + arch/arm/boot/dts/at91sam9263.dtsi | 1 + + arch/arm/boot/dts/at91sam9g45.dtsi | 1 + + arch/arm/boot/dts/at91sam9x5.dtsi | 1 + + arch/arm/mach-at91/at91sam9x5.c | 2 -- + arch/arm/mach-at91/irq.c | 12 ++++++++++++ + 7 files changed, 17 insertions(+), 2 deletions(-) + +diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt +index aabca4f..1953b0c 100644 +--- a/Documentation/devicetree/bindings/arm/atmel-aic.txt ++++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt +@@ -15,6 +15,7 @@ Required properties: + Valid combinations are 1, 2, 3, 4, 8. + Default flag for internal sources should be set to 4 (active high). + - reg: Should contain AIC registers location and length ++- atmel,external-irqs: u32 array of external irqs. + + Examples: + /* +diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi +index eddc467..fb86de0 100644 +--- a/arch/arm/boot/dts/at91sam9260.dtsi ++++ b/arch/arm/boot/dts/at91sam9260.dtsi +@@ -56,6 +56,7 @@ + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; ++ atmel,external-irqs = <29 30 31>; + }; + + ramc0: ramc@ffffea00 { +diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi +index d330de9..78b2808 100644 +--- a/arch/arm/boot/dts/at91sam9263.dtsi ++++ b/arch/arm/boot/dts/at91sam9263.dtsi +@@ -52,6 +52,7 @@ + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; ++ atmel,external-irqs = <30 31>; + }; + + pmc: pmc@fffffc00 { +diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi +index d1c497d..779ffca 100644 +--- a/arch/arm/boot/dts/at91sam9g45.dtsi ++++ b/arch/arm/boot/dts/at91sam9g45.dtsi +@@ -57,6 +57,7 @@ + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; ++ atmel,external-irqs = <31>; + }; + + ramc0: ramc@ffffe400 { +diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi +index 80a50864..170b6f8 100644 +--- a/arch/arm/boot/dts/at91sam9x5.dtsi ++++ b/arch/arm/boot/dts/at91sam9x5.dtsi +@@ -55,6 +55,7 @@ + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; ++ atmel,external-irqs = <31>; + }; + + ramc0: ramc@ffffe800 { +diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c +index 13c8cae..dce3ff3 100644 +--- a/arch/arm/mach-at91/at91sam9x5.c ++++ b/arch/arm/mach-at91/at91sam9x5.c +@@ -306,8 +306,6 @@ static void __init at91sam9x5_map_io(void) + + void __init at91sam9x5_initialize(void) + { +- at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); +- + /* Register GPIO subsystem (using DT) */ + at91_gpio_init(NULL, 0); + } +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index 2d5d4c8..df8605f 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = { + int __init at91_aic_of_init(struct device_node *node, + struct device_node *parent) + { ++ struct property *prop; ++ const __be32 *p; ++ u32 val; ++ + at91_aic_base = of_iomap(node, 0); + at91_aic_np = node; + +@@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node, + if (!at91_aic_domain) + panic("Unable to add AIC irq domain (DT)\n"); + ++ at91_extern_irq = 0; ++ of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { ++ if (val > 31) ++ pr_warn("AIC: external irq %d > 31 skip it\n", val); ++ else ++ at91_extern_irq |= (1 << val); ++ } ++ + irq_set_default_host(at91_aic_domain); + + at91_aic_hw_init(NR_AIC_IRQS); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0053-ARM-at91-aic-can-use-fast-eoi-handler-type.patch b/patches.at91/0053-ARM-at91-aic-can-use-fast-eoi-handler-type.patch deleted file mode 100644 index 6003ca8075ef..000000000000 --- a/patches.at91/0053-ARM-at91-aic-can-use-fast-eoi-handler-type.patch +++ /dev/null @@ -1,158 +0,0 @@ -From adc32a9ee5875fe4c0da12b676b38c696d95437c Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Fri, 25 May 2012 14:11:51 +0200 -Subject: ARM: at91: aic can use fast eoi handler type - -The Advanced Interrupt Controller allows us to use the fast EOI handler type. -It lets us remove the Atmel specific workaround into arch/arm/kernel/irq.c -used to indicate to the AIC the end of the interrupt treatment. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Will Deacon ---- - arch/arm/kernel/irq.c | 10 ---------- - arch/arm/mach-at91/gpio.c | 9 +++++---- - arch/arm/mach-at91/include/mach/irqs.h | 7 ------- - arch/arm/mach-at91/irq.c | 15 ++++++++++++--- - 4 files changed, 17 insertions(+), 24 deletions(-) - -diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c -index 8349d4e..16cedb4 100644 ---- a/arch/arm/kernel/irq.c -+++ b/arch/arm/kernel/irq.c -@@ -40,13 +40,6 @@ - #include - #include - --/* -- * No architecture-specific irq_finish function defined in arm/arch/irqs.h. -- */ --#ifndef irq_finish --#define irq_finish(irq) do { } while (0) --#endif -- - unsigned long irq_err_count; - - int arch_show_interrupts(struct seq_file *p, int prec) -@@ -85,9 +78,6 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs) - generic_handle_irq(irq); - } - -- /* AT91 specific workaround */ -- irq_finish(irq); -- - irq_exit(); - set_irq_regs(old_regs); - } -diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c -index 325837a..be42cf0 100644 ---- a/arch/arm/mach-at91/gpio.c -+++ b/arch/arm/mach-at91/gpio.c -@@ -26,6 +26,8 @@ - #include - #include - -+#include -+ - #include - #include - -@@ -585,15 +587,14 @@ static struct irq_chip gpio_irqchip = { - - static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) - { -+ struct irq_chip *chip = irq_desc_get_chip(desc); - struct irq_data *idata = irq_desc_get_irq_data(desc); -- struct irq_chip *chip = irq_data_get_irq_chip(idata); - struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); - void __iomem *pio = at91_gpio->regbase; - unsigned long isr; - int n; - -- /* temporarily mask (level sensitive) parent IRQ */ -- chip->irq_ack(idata); -+ chained_irq_enter(chip, desc); - for (;;) { - /* Reading ISR acks pending (edge triggered) GPIO interrupts. - * When there none are pending, we're finished unless we need -@@ -614,7 +615,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) - n = find_next_bit(&isr, BITS_PER_LONG, n + 1); - } - } -- chip->irq_unmask(idata); -+ chained_irq_exit(chip, desc); - /* now it may re-trigger */ - } - -diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h -index ac8b7df..2d510ee 100644 ---- a/arch/arm/mach-at91/include/mach/irqs.h -+++ b/arch/arm/mach-at91/include/mach/irqs.h -@@ -28,13 +28,6 @@ - - - /* -- * Acknowledge interrupt with AIC after interrupt has been handled. -- * (by kernel/irq.c) -- */ --#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) -- -- --/* - * IRQ interrupt symbols are the AT91xxx_ID_* symbols - * for IRQs handled directly through the AIC, or else the AT91_PIN_* - * symbols in gpio.h for ones handled indirectly as GPIOs. -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index cfcfcbe..2d5d4c8 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -55,6 +55,15 @@ static void at91_aic_unmask_irq(struct irq_data *d) - at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); - } - -+static void at91_aic_eoi(struct irq_data *d) -+{ -+ /* -+ * Mark end-of-interrupt on AIC, the controller doesn't care about -+ * the value written. Moreover it's a write-only register. -+ */ -+ at91_aic_write(AT91_AIC_EOICR, 0); -+} -+ - unsigned int at91_extern_irq; - - #define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) -@@ -128,11 +137,11 @@ void at91_irq_resume(void) - - static struct irq_chip at91_aic_chip = { - .name = "AIC", -- .irq_ack = at91_aic_mask_irq, - .irq_mask = at91_aic_mask_irq, - .irq_unmask = at91_aic_unmask_irq, - .irq_set_type = at91_aic_set_type, - .irq_set_wake = at91_aic_set_wake, -+ .irq_eoi = at91_aic_eoi, - }; - - static void __init at91_aic_hw_init(unsigned int spu_vector) -@@ -171,7 +180,7 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - /* Active Low interrupt, without priority */ - at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); - -- irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); -+ irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); - - return 0; -@@ -238,7 +247,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) - /* Active Low interrupt, with the specified priority */ - at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - -- irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); -+ irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0054-ARM-at91-add-of-irq-priorities-support.patch b/patches.at91/0054-ARM-at91-add-of-irq-priorities-support.patch new file mode 100644 index 000000000000..b8df4e105d34 --- /dev/null +++ b/patches.at91/0054-ARM-at91-add-of-irq-priorities-support.patch @@ -0,0 +1,885 @@ +From 70df58d418b354d8e1ad6597463da2b3d32148c3 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Wed, 20 Jun 2012 16:13:30 +0200 +Subject: ARM: at91: add of irq priorities support + +commit f8a073ee378b9893aee0749c3868a6ecfb0c1636 upstream. + +Add a third cell to define irq priority. + +Signed-off-by: Ludovic Desroches +Reviewed-by: Rob Herring +Signed-off-by: Nicolas Ferre + +Conflicts: + arch/arm/boot/dts/at91sam9260.dtsi + arch/arm/boot/dts/at91sam9g45.dtsi + arch/arm/boot/dts/at91sam9x5.dtsi +--- + .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- + arch/arm/boot/dts/at91sam9260.dtsi | 34 ++++++++++---------- + arch/arm/boot/dts/at91sam9263.dtsi | 30 +++++++++--------- + arch/arm/boot/dts/at91sam9g45.dtsi | 36 +++++++++++----------- + arch/arm/boot/dts/at91sam9n12.dtsi | 30 +++++++++--------- + arch/arm/boot/dts/at91sam9x5.dtsi | 36 +++++++++++----------- + arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ + arch/arm/mach-at91/irq.c | 34 ++++++++++++++++++-- + 8 files changed, 122 insertions(+), 89 deletions(-) + +diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt +index 1953b0c..19078bf 100644 +--- a/Documentation/devicetree/bindings/arm/atmel-aic.txt ++++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt +@@ -4,7 +4,7 @@ Required properties: + - compatible: Should be "atmel,-aic" + - interrupt-controller: Identifies the node as an interrupt controller. + - interrupt-parent: For single AIC system, it is an empty property. +-- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. ++- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. + The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). + The second cell is used to specify flags: + bits[3:0] trigger type and level flags: +@@ -14,6 +14,8 @@ Required properties: + 8 = active low level-sensitive. + Valid combinations are 1, 2, 3, 4, 8. + Default flag for internal sources should be set to 4 (active high). ++ The third cell is used to specify the irq priority from 0 (lowest) to 7 ++ (highest). + - reg: Should contain AIC registers location and length + - atmel,external-irqs: u32 array of external irqs. + +@@ -25,7 +27,7 @@ Examples: + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + interrupt-parent; +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + reg = <0xfffff000 0x200>; + }; + +@@ -35,5 +37,5 @@ Examples: + dma: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; +- interrupts = <21 4>; ++ interrupts = <21 4 5>; + }; +diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi +index fb86de0..12df8ca 100644 +--- a/arch/arm/boot/dts/at91sam9260.dtsi ++++ b/arch/arm/boot/dts/at91sam9260.dtsi +@@ -52,7 +52,7 @@ + ranges; + + aic: interrupt-controller@fffff000 { +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; +@@ -82,25 +82,25 @@ + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + }; + + tcb0: timer@fffa0000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffa0000 0x100>; +- interrupts = <17 4 18 4 19 4>; ++ interrupts = <17 4 0 18 4 0 19 4 0>; + }; + + tcb1: timer@fffdc000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffdc000 0x100>; +- interrupts = <26 4 27 4 28 4>; ++ interrupts = <26 4 0 27 4 0 28 4 0>; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -110,7 +110,7 @@ + pioB: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -120,7 +120,7 @@ + pioC: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; +- interrupts = <4 4>; ++ interrupts = <4 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -130,14 +130,14 @@ + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + status = "disabled"; + }; + + usart0: serial@fffb0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb0000 0x200>; +- interrupts = <6 4>; ++ interrupts = <6 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -146,7 +146,7 @@ + usart1: serial@fffb4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb4000 0x200>; +- interrupts = <7 4>; ++ interrupts = <7 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -155,7 +155,7 @@ + usart2: serial@fffb8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb8000 0x200>; +- interrupts = <8 4>; ++ interrupts = <8 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -164,7 +164,7 @@ + usart3: serial@fffd0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd0000 0x200>; +- interrupts = <23 4>; ++ interrupts = <23 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -173,7 +173,7 @@ + usart4: serial@fffd4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd4000 0x200>; +- interrupts = <24 4>; ++ interrupts = <24 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -182,7 +182,7 @@ + usart5: serial@fffd8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd8000 0x200>; +- interrupts = <25 4>; ++ interrupts = <25 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -191,14 +191,14 @@ + macb0: ethernet@fffc4000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xfffc4000 0x100>; +- interrupts = <21 4>; ++ interrupts = <21 4 3>; + status = "disabled"; + }; + + usb1: gadget@fffa4000 { + compatible = "atmel,at91rm9200-udc"; + reg = <0xfffa4000 0x4000>; +- interrupts = <10 4>; ++ interrupts = <10 4 2>; + status = "disabled"; + }; + }; +@@ -222,7 +222,7 @@ + usb0: ohci@00500000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00500000 0x100000>; +- interrupts = <20 4>; ++ interrupts = <20 4 2>; + status = "disabled"; + }; + }; +diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi +index 78b2808..195019b 100644 +--- a/arch/arm/boot/dts/at91sam9263.dtsi ++++ b/arch/arm/boot/dts/at91sam9263.dtsi +@@ -48,7 +48,7 @@ + ranges; + + aic: interrupt-controller@fffff000 { +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; +@@ -69,13 +69,13 @@ + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + }; + + tcb0: timer@fff7c000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfff7c000 0x100>; +- interrupts = <19 4>; ++ interrupts = <19 4 0>; + }; + + rstc@fffffd00 { +@@ -91,7 +91,7 @@ + pioA: gpio@fffff200 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff200 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -101,7 +101,7 @@ + pioB: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -111,7 +111,7 @@ + pioC: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; +- interrupts = <4 4>; ++ interrupts = <4 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -121,7 +121,7 @@ + pioD: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; +- interrupts = <4 4>; ++ interrupts = <4 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -131,7 +131,7 @@ + pioE: gpio@fffffa00 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; +- interrupts = <4 4>; ++ interrupts = <4 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -141,14 +141,14 @@ + dbgu: serial@ffffee00 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xffffee00 0x200>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + status = "disabled"; + }; + + usart0: serial@fff8c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff8c000 0x200>; +- interrupts = <7 4>; ++ interrupts = <7 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -157,7 +157,7 @@ + usart1: serial@fff90000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff90000 0x200>; +- interrupts = <8 4>; ++ interrupts = <8 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -166,7 +166,7 @@ + usart2: serial@fff94000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff94000 0x200>; +- interrupts = <9 4>; ++ interrupts = <9 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -175,14 +175,14 @@ + macb0: ethernet@fffbc000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xfffbc000 0x100>; +- interrupts = <21 4>; ++ interrupts = <21 4 3>; + status = "disabled"; + }; + + usb1: gadget@fff78000 { + compatible = "atmel,at91rm9200-udc"; + reg = <0xfff78000 0x4000>; +- interrupts = <24 4>; ++ interrupts = <24 4 2>; + status = "disabled"; + }; + }; +@@ -206,7 +206,7 @@ + usb0: ohci@00a00000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00a00000 0x100000>; +- interrupts = <29 4>; ++ interrupts = <29 4 2>; + status = "disabled"; + }; + }; +diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi +index 779ffca..6a3ed54 100644 +--- a/arch/arm/boot/dts/at91sam9g45.dtsi ++++ b/arch/arm/boot/dts/at91sam9g45.dtsi +@@ -53,7 +53,7 @@ + ranges; + + aic: interrupt-controller@fffff000 { +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; +@@ -79,7 +79,7 @@ + pit: timer@fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + }; + + +@@ -91,25 +91,25 @@ + tcb0: timer@fff7c000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfff7c000 0x100>; +- interrupts = <18 4>; ++ interrupts = <18 4 0>; + }; + + tcb1: timer@fffd4000 { + compatible = "atmel,at91rm9200-tcb"; + reg = <0xfffd4000 0x100>; +- interrupts = <18 4>; ++ interrupts = <18 4 0>; + }; + + dma: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; +- interrupts = <21 4>; ++ interrupts = <21 4 0>; + }; + + pioA: gpio@fffff200 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff200 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -119,7 +119,7 @@ + pioB: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -129,7 +129,7 @@ + pioC: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; +- interrupts = <4 4>; ++ interrupts = <4 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -139,7 +139,7 @@ + pioD: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; +- interrupts = <5 4>; ++ interrupts = <5 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -149,7 +149,7 @@ + pioE: gpio@fffffa00 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; +- interrupts = <5 4>; ++ interrupts = <5 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -159,14 +159,14 @@ + dbgu: serial@ffffee00 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xffffee00 0x200>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + status = "disabled"; + }; + + usart0: serial@fff8c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff8c000 0x200>; +- interrupts = <7 4>; ++ interrupts = <7 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -175,7 +175,7 @@ + usart1: serial@fff90000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff90000 0x200>; +- interrupts = <8 4>; ++ interrupts = <8 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -184,7 +184,7 @@ + usart2: serial@fff94000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff94000 0x200>; +- interrupts = <9 4>; ++ interrupts = <9 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -193,7 +193,7 @@ + usart3: serial@fff98000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff98000 0x200>; +- interrupts = <10 4>; ++ interrupts = <10 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -202,7 +202,7 @@ + macb0: ethernet@fffbc000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xfffbc000 0x100>; +- interrupts = <25 4>; ++ interrupts = <25 4 3>; + status = "disabled"; + }; + }; +@@ -226,14 +226,14 @@ + usb0: ohci@00700000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00700000 0x100000>; +- interrupts = <22 4>; ++ interrupts = <22 4 2>; + status = "disabled"; + }; + + usb1: ehci@00800000 { + compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; + reg = <0x00800000 0x100000>; +- interrupts = <22 4>; ++ interrupts = <22 4 2>; + status = "disabled"; + }; + }; +diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi +index a69e89a..ef9336a 100644 +--- a/arch/arm/boot/dts/at91sam9n12.dtsi ++++ b/arch/arm/boot/dts/at91sam9n12.dtsi +@@ -50,7 +50,7 @@ + ranges; + + aic: interrupt-controller@fffff000 { +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; +@@ -74,7 +74,7 @@ + pit: timer@fffffe30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe30 0xf>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + }; + + shdwc@fffffe10 { +@@ -85,25 +85,25 @@ + tcb0: timer@f8008000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8008000 0x100>; +- interrupts = <17 4>; ++ interrupts = <17 4 0>; + }; + + tcb1: timer@f800c000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf800c000 0x100>; +- interrupts = <17 4>; ++ interrupts = <17 4 0>; + }; + + dma: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; +- interrupts = <20 4>; ++ interrupts = <20 4 0>; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -113,7 +113,7 @@ + pioB: gpio@fffff600 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -123,7 +123,7 @@ + pioC: gpio@fffff800 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -133,7 +133,7 @@ + pioD: gpio@fffffa00 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -143,14 +143,14 @@ + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + status = "disabled"; + }; + + usart0: serial@f801c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf801c000 0x4000>; +- interrupts = <5 4>; ++ interrupts = <5 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -159,7 +159,7 @@ + usart1: serial@f8020000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8020000 0x4000>; +- interrupts = <6 4>; ++ interrupts = <6 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -168,7 +168,7 @@ + usart2: serial@f8024000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8024000 0x4000>; +- interrupts = <7 4>; ++ interrupts = <7 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -177,7 +177,7 @@ + usart3: serial@f8028000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8028000 0x4000>; +- interrupts = <8 4>; ++ interrupts = <8 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -205,7 +205,7 @@ + usb0: ohci@00500000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00500000 0x00100000>; +- interrupts = <22 4>; ++ interrupts = <22 4 2>; + status = "disabled"; + }; + }; +diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi +index 170b6f8..fc38d21 100644 +--- a/arch/arm/boot/dts/at91sam9x5.dtsi ++++ b/arch/arm/boot/dts/at91sam9x5.dtsi +@@ -51,7 +51,7 @@ + ranges; + + aic: interrupt-controller@fffff000 { +- #interrupt-cells = <2>; ++ #interrupt-cells = <3>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; +@@ -81,37 +81,37 @@ + pit: timer@fffffe30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe30 0xf>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + }; + + tcb0: timer@f8008000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8008000 0x100>; +- interrupts = <17 4>; ++ interrupts = <17 4 0>; + }; + + tcb1: timer@f800c000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf800c000 0x100>; +- interrupts = <17 4>; ++ interrupts = <17 4 0>; + }; + + dma0: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; +- interrupts = <20 4>; ++ interrupts = <20 4 0>; + }; + + dma1: dma-controller@ffffee00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffee00 0x200>; +- interrupts = <21 4>; ++ interrupts = <21 4 0>; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -121,7 +121,7 @@ + pioB: gpio@fffff600 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; +- interrupts = <2 4>; ++ interrupts = <2 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -131,7 +131,7 @@ + pioC: gpio@fffff800 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -141,7 +141,7 @@ + pioD: gpio@fffffa00 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; +- interrupts = <3 4>; ++ interrupts = <3 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; +@@ -151,14 +151,14 @@ + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; +- interrupts = <1 4>; ++ interrupts = <1 4 7>; + status = "disabled"; + }; + + usart0: serial@f801c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf801c000 0x200>; +- interrupts = <5 4>; ++ interrupts = <5 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -167,7 +167,7 @@ + usart1: serial@f8020000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8020000 0x200>; +- interrupts = <6 4>; ++ interrupts = <6 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -176,7 +176,7 @@ + usart2: serial@f8024000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8024000 0x200>; +- interrupts = <7 4>; ++ interrupts = <7 4 5>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; +@@ -185,14 +185,14 @@ + macb0: ethernet@f802c000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; +- interrupts = <24 4>; ++ interrupts = <24 4 3>; + status = "disabled"; + }; + + macb1: ethernet@f8030000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf8030000 0x100>; +- interrupts = <27 4>; ++ interrupts = <27 4 3>; + status = "disabled"; + }; + }; +@@ -215,14 +215,14 @@ + usb0: ohci@00600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; +- interrupts = <22 4>; ++ interrupts = <22 4 2>; + status = "disabled"; + }; + + usb1: ehci@00700000 { + compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; + reg = <0x00700000 0x100000>; +- interrupts = <22 4>; ++ interrupts = <22 4 2>; + status = "disabled"; + }; + }; +diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h +index c1413ed..3af7272 100644 +--- a/arch/arm/mach-at91/include/mach/at91_aic.h ++++ b/arch/arm/mach-at91/include/mach/at91_aic.h +@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; + .extern at91_aic_base + #endif + ++#define AT91_AIC_IRQ_MIN_PRIORITY 0 ++#define AT91_AIC_IRQ_MAX_PRIORITY 7 ++ + #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ + #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ + #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index df8605f..db8e141 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -42,6 +43,7 @@ + void __iomem *at91_aic_base; + static struct irq_domain *at91_aic_domain; + static struct device_node *at91_aic_np; ++static unsigned int *at91_aic_irq_priorities; + + static void at91_aic_mask_irq(struct irq_data *d) + { +@@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + /* Put virq number in Source Vector Register */ + at91_aic_write(AT91_AIC_SVR(hw), virq); + +- /* Active Low interrupt, without priority */ +- at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); ++ /* Active Low interrupt, with priority */ ++ at91_aic_write(AT91_AIC_SMR(hw), ++ AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); + + irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); +@@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + return 0; + } + ++static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, ++ const u32 *intspec, unsigned int intsize, ++ irq_hw_number_t *out_hwirq, unsigned int *out_type) ++{ ++ if (WARN_ON(intsize < 3)) ++ return -EINVAL; ++ if (WARN_ON(intspec[0] >= NR_AIC_IRQS)) ++ return -EINVAL; ++ if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) ++ || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) ++ return -EINVAL; ++ ++ *out_hwirq = intspec[0]; ++ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; ++ at91_aic_irq_priorities[*out_hwirq] = intspec[2]; ++ ++ return 0; ++} ++ + static struct irq_domain_ops at91_aic_irq_ops = { + .map = at91_aic_irq_map, +- .xlate = irq_domain_xlate_twocell, ++ .xlate = at91_aic_irq_domain_xlate, + }; + + int __init at91_aic_of_init(struct device_node *node, +@@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node, + const __be32 *p; + u32 val; + ++ at91_aic_irq_priorities = kzalloc(NR_AIC_IRQS ++ * sizeof(*at91_aic_irq_priorities), ++ GFP_KERNEL); ++ if (!at91_aic_irq_priorities) ++ return -ENOMEM; ++ + at91_aic_base = of_iomap(node, 0); + at91_aic_np = node; + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0054-ARM-at91-aic-add-dt-support-for-external-irqs.patch b/patches.at91/0054-ARM-at91-aic-add-dt-support-for-external-irqs.patch deleted file mode 100644 index 4850ef400ae8..000000000000 --- a/patches.at91/0054-ARM-at91-aic-add-dt-support-for-external-irqs.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 6591d7a4f331b00fa020ef27b367239854944459 Mon Sep 17 00:00:00 2001 -From: Jean-Christophe PLAGNIOL-VILLARD -Date: Mon, 9 Apr 2012 19:36:36 +0800 -Subject: ARM: at91: aic add dt support for external irqs - -Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD ---- - Documentation/devicetree/bindings/arm/atmel-aic.txt | 1 + - arch/arm/boot/dts/at91sam9260.dtsi | 1 + - arch/arm/boot/dts/at91sam9263.dtsi | 1 + - arch/arm/boot/dts/at91sam9g45.dtsi | 1 + - arch/arm/boot/dts/at91sam9x5.dtsi | 1 + - arch/arm/mach-at91/at91sam9x5.c | 2 -- - arch/arm/mach-at91/irq.c | 12 ++++++++++++ - 7 files changed, 17 insertions(+), 2 deletions(-) - -diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt -index aabca4f..1953b0c 100644 ---- a/Documentation/devicetree/bindings/arm/atmel-aic.txt -+++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt -@@ -15,6 +15,7 @@ Required properties: - Valid combinations are 1, 2, 3, 4, 8. - Default flag for internal sources should be set to 4 (active high). - - reg: Should contain AIC registers location and length -+- atmel,external-irqs: u32 array of external irqs. - - Examples: - /* -diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi -index eddc467..fb86de0 100644 ---- a/arch/arm/boot/dts/at91sam9260.dtsi -+++ b/arch/arm/boot/dts/at91sam9260.dtsi -@@ -56,6 +56,7 @@ - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -+ atmel,external-irqs = <29 30 31>; - }; - - ramc0: ramc@ffffea00 { -diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi -index d330de9..78b2808 100644 ---- a/arch/arm/boot/dts/at91sam9263.dtsi -+++ b/arch/arm/boot/dts/at91sam9263.dtsi -@@ -52,6 +52,7 @@ - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -+ atmel,external-irqs = <30 31>; - }; - - pmc: pmc@fffffc00 { -diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi -index d1c497d..779ffca 100644 ---- a/arch/arm/boot/dts/at91sam9g45.dtsi -+++ b/arch/arm/boot/dts/at91sam9g45.dtsi -@@ -57,6 +57,7 @@ - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -+ atmel,external-irqs = <31>; - }; - - ramc0: ramc@ffffe400 { -diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi -index 80a50864..170b6f8 100644 ---- a/arch/arm/boot/dts/at91sam9x5.dtsi -+++ b/arch/arm/boot/dts/at91sam9x5.dtsi -@@ -55,6 +55,7 @@ - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -+ atmel,external-irqs = <31>; - }; - - ramc0: ramc@ffffe800 { -diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c -index 13c8cae..dce3ff3 100644 ---- a/arch/arm/mach-at91/at91sam9x5.c -+++ b/arch/arm/mach-at91/at91sam9x5.c -@@ -306,8 +306,6 @@ static void __init at91sam9x5_map_io(void) - - void __init at91sam9x5_initialize(void) - { -- at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); -- - /* Register GPIO subsystem (using DT) */ - at91_gpio_init(NULL, 0); - } -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index 2d5d4c8..df8605f 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = { - int __init at91_aic_of_init(struct device_node *node, - struct device_node *parent) - { -+ struct property *prop; -+ const __be32 *p; -+ u32 val; -+ - at91_aic_base = of_iomap(node, 0); - at91_aic_np = node; - -@@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node, - if (!at91_aic_domain) - panic("Unable to add AIC irq domain (DT)\n"); - -+ at91_extern_irq = 0; -+ of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { -+ if (val > 31) -+ pr_warn("AIC: external irq %d > 31 skip it\n", val); -+ else -+ at91_extern_irq |= (1 << val); -+ } -+ - irq_set_default_host(at91_aic_domain); - - at91_aic_hw_init(NR_AIC_IRQS); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0055-ARM-at91-add-of-irq-priorities-support.patch b/patches.at91/0055-ARM-at91-add-of-irq-priorities-support.patch deleted file mode 100644 index ed2769e343ed..000000000000 --- a/patches.at91/0055-ARM-at91-add-of-irq-priorities-support.patch +++ /dev/null @@ -1,883 +0,0 @@ -From 2e9f08703ba386c61ee33e8a7018ef12c361b463 Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Wed, 20 Jun 2012 16:13:30 +0200 -Subject: ARM: at91: add of irq priorities support - -Add a third cell to define irq priority. - -Signed-off-by: Ludovic Desroches -Reviewed-by: Rob Herring -Signed-off-by: Nicolas Ferre - -Conflicts: - arch/arm/boot/dts/at91sam9260.dtsi - arch/arm/boot/dts/at91sam9g45.dtsi - arch/arm/boot/dts/at91sam9x5.dtsi ---- - .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- - arch/arm/boot/dts/at91sam9260.dtsi | 34 ++++++++++---------- - arch/arm/boot/dts/at91sam9263.dtsi | 30 +++++++++--------- - arch/arm/boot/dts/at91sam9g45.dtsi | 36 +++++++++++----------- - arch/arm/boot/dts/at91sam9n12.dtsi | 30 +++++++++--------- - arch/arm/boot/dts/at91sam9x5.dtsi | 36 +++++++++++----------- - arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ - arch/arm/mach-at91/irq.c | 34 ++++++++++++++++++-- - 8 files changed, 122 insertions(+), 89 deletions(-) - -diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt -index 1953b0c..19078bf 100644 ---- a/Documentation/devicetree/bindings/arm/atmel-aic.txt -+++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt -@@ -4,7 +4,7 @@ Required properties: - - compatible: Should be "atmel,-aic" - - interrupt-controller: Identifies the node as an interrupt controller. - - interrupt-parent: For single AIC system, it is an empty property. --- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. -+- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. - The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). - The second cell is used to specify flags: - bits[3:0] trigger type and level flags: -@@ -14,6 +14,8 @@ Required properties: - 8 = active low level-sensitive. - Valid combinations are 1, 2, 3, 4, 8. - Default flag for internal sources should be set to 4 (active high). -+ The third cell is used to specify the irq priority from 0 (lowest) to 7 -+ (highest). - - reg: Should contain AIC registers location and length - - atmel,external-irqs: u32 array of external irqs. - -@@ -25,7 +27,7 @@ Examples: - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - interrupt-parent; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0xfffff000 0x200>; - }; - -@@ -35,5 +37,5 @@ Examples: - dma: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; -- interrupts = <21 4>; -+ interrupts = <21 4 5>; - }; -diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi -index fb86de0..12df8ca 100644 ---- a/arch/arm/boot/dts/at91sam9260.dtsi -+++ b/arch/arm/boot/dts/at91sam9260.dtsi -@@ -52,7 +52,7 @@ - ranges; - - aic: interrupt-controller@fffff000 { -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -@@ -82,25 +82,25 @@ - pit: timer@fffffd30 { - compatible = "atmel,at91sam9260-pit"; - reg = <0xfffffd30 0xf>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - }; - - tcb0: timer@fffa0000 { - compatible = "atmel,at91rm9200-tcb"; - reg = <0xfffa0000 0x100>; -- interrupts = <17 4 18 4 19 4>; -+ interrupts = <17 4 0 18 4 0 19 4 0>; - }; - - tcb1: timer@fffdc000 { - compatible = "atmel,at91rm9200-tcb"; - reg = <0xfffdc000 0x100>; -- interrupts = <26 4 27 4 28 4>; -+ interrupts = <26 4 0 27 4 0 28 4 0>; - }; - - pioA: gpio@fffff400 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -110,7 +110,7 @@ - pioB: gpio@fffff600 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -120,7 +120,7 @@ - pioC: gpio@fffff800 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; -- interrupts = <4 4>; -+ interrupts = <4 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -130,14 +130,14 @@ - dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffff200 0x200>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - status = "disabled"; - }; - - usart0: serial@fffb0000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffb0000 0x200>; -- interrupts = <6 4>; -+ interrupts = <6 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -146,7 +146,7 @@ - usart1: serial@fffb4000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffb4000 0x200>; -- interrupts = <7 4>; -+ interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -155,7 +155,7 @@ - usart2: serial@fffb8000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffb8000 0x200>; -- interrupts = <8 4>; -+ interrupts = <8 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -164,7 +164,7 @@ - usart3: serial@fffd0000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffd0000 0x200>; -- interrupts = <23 4>; -+ interrupts = <23 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -173,7 +173,7 @@ - usart4: serial@fffd4000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffd4000 0x200>; -- interrupts = <24 4>; -+ interrupts = <24 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -182,7 +182,7 @@ - usart5: serial@fffd8000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffd8000 0x200>; -- interrupts = <25 4>; -+ interrupts = <25 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -191,14 +191,14 @@ - macb0: ethernet@fffc4000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xfffc4000 0x100>; -- interrupts = <21 4>; -+ interrupts = <21 4 3>; - status = "disabled"; - }; - - usb1: gadget@fffa4000 { - compatible = "atmel,at91rm9200-udc"; - reg = <0xfffa4000 0x4000>; -- interrupts = <10 4>; -+ interrupts = <10 4 2>; - status = "disabled"; - }; - }; -@@ -222,7 +222,7 @@ - usb0: ohci@00500000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; - reg = <0x00500000 0x100000>; -- interrupts = <20 4>; -+ interrupts = <20 4 2>; - status = "disabled"; - }; - }; -diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi -index 78b2808..195019b 100644 ---- a/arch/arm/boot/dts/at91sam9263.dtsi -+++ b/arch/arm/boot/dts/at91sam9263.dtsi -@@ -48,7 +48,7 @@ - ranges; - - aic: interrupt-controller@fffff000 { -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -@@ -69,13 +69,13 @@ - pit: timer@fffffd30 { - compatible = "atmel,at91sam9260-pit"; - reg = <0xfffffd30 0xf>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - }; - - tcb0: timer@fff7c000 { - compatible = "atmel,at91rm9200-tcb"; - reg = <0xfff7c000 0x100>; -- interrupts = <19 4>; -+ interrupts = <19 4 0>; - }; - - rstc@fffffd00 { -@@ -91,7 +91,7 @@ - pioA: gpio@fffff200 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff200 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -101,7 +101,7 @@ - pioB: gpio@fffff400 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -111,7 +111,7 @@ - pioC: gpio@fffff600 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; -- interrupts = <4 4>; -+ interrupts = <4 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -121,7 +121,7 @@ - pioD: gpio@fffff800 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; -- interrupts = <4 4>; -+ interrupts = <4 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -131,7 +131,7 @@ - pioE: gpio@fffffa00 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffffa00 0x100>; -- interrupts = <4 4>; -+ interrupts = <4 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -141,14 +141,14 @@ - dbgu: serial@ffffee00 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xffffee00 0x200>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - status = "disabled"; - }; - - usart0: serial@fff8c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff8c000 0x200>; -- interrupts = <7 4>; -+ interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -157,7 +157,7 @@ - usart1: serial@fff90000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff90000 0x200>; -- interrupts = <8 4>; -+ interrupts = <8 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -166,7 +166,7 @@ - usart2: serial@fff94000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff94000 0x200>; -- interrupts = <9 4>; -+ interrupts = <9 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -175,14 +175,14 @@ - macb0: ethernet@fffbc000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xfffbc000 0x100>; -- interrupts = <21 4>; -+ interrupts = <21 4 3>; - status = "disabled"; - }; - - usb1: gadget@fff78000 { - compatible = "atmel,at91rm9200-udc"; - reg = <0xfff78000 0x4000>; -- interrupts = <24 4>; -+ interrupts = <24 4 2>; - status = "disabled"; - }; - }; -@@ -206,7 +206,7 @@ - usb0: ohci@00a00000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; - reg = <0x00a00000 0x100000>; -- interrupts = <29 4>; -+ interrupts = <29 4 2>; - status = "disabled"; - }; - }; -diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi -index 779ffca..6a3ed54 100644 ---- a/arch/arm/boot/dts/at91sam9g45.dtsi -+++ b/arch/arm/boot/dts/at91sam9g45.dtsi -@@ -53,7 +53,7 @@ - ranges; - - aic: interrupt-controller@fffff000 { -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -@@ -79,7 +79,7 @@ - pit: timer@fffffd30 { - compatible = "atmel,at91sam9260-pit"; - reg = <0xfffffd30 0xf>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - }; - - -@@ -91,25 +91,25 @@ - tcb0: timer@fff7c000 { - compatible = "atmel,at91rm9200-tcb"; - reg = <0xfff7c000 0x100>; -- interrupts = <18 4>; -+ interrupts = <18 4 0>; - }; - - tcb1: timer@fffd4000 { - compatible = "atmel,at91rm9200-tcb"; - reg = <0xfffd4000 0x100>; -- interrupts = <18 4>; -+ interrupts = <18 4 0>; - }; - - dma: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; -- interrupts = <21 4>; -+ interrupts = <21 4 0>; - }; - - pioA: gpio@fffff200 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff200 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -119,7 +119,7 @@ - pioB: gpio@fffff400 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -129,7 +129,7 @@ - pioC: gpio@fffff600 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; -- interrupts = <4 4>; -+ interrupts = <4 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -139,7 +139,7 @@ - pioD: gpio@fffff800 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; -- interrupts = <5 4>; -+ interrupts = <5 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -149,7 +149,7 @@ - pioE: gpio@fffffa00 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffffa00 0x100>; -- interrupts = <5 4>; -+ interrupts = <5 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -159,14 +159,14 @@ - dbgu: serial@ffffee00 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xffffee00 0x200>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - status = "disabled"; - }; - - usart0: serial@fff8c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff8c000 0x200>; -- interrupts = <7 4>; -+ interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -175,7 +175,7 @@ - usart1: serial@fff90000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff90000 0x200>; -- interrupts = <8 4>; -+ interrupts = <8 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -184,7 +184,7 @@ - usart2: serial@fff94000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff94000 0x200>; -- interrupts = <9 4>; -+ interrupts = <9 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -193,7 +193,7 @@ - usart3: serial@fff98000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff98000 0x200>; -- interrupts = <10 4>; -+ interrupts = <10 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -202,7 +202,7 @@ - macb0: ethernet@fffbc000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xfffbc000 0x100>; -- interrupts = <25 4>; -+ interrupts = <25 4 3>; - status = "disabled"; - }; - }; -@@ -226,14 +226,14 @@ - usb0: ohci@00700000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; - reg = <0x00700000 0x100000>; -- interrupts = <22 4>; -+ interrupts = <22 4 2>; - status = "disabled"; - }; - - usb1: ehci@00800000 { - compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; - reg = <0x00800000 0x100000>; -- interrupts = <22 4>; -+ interrupts = <22 4 2>; - status = "disabled"; - }; - }; -diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi -index a69e89a..ef9336a 100644 ---- a/arch/arm/boot/dts/at91sam9n12.dtsi -+++ b/arch/arm/boot/dts/at91sam9n12.dtsi -@@ -50,7 +50,7 @@ - ranges; - - aic: interrupt-controller@fffff000 { -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -@@ -74,7 +74,7 @@ - pit: timer@fffffe30 { - compatible = "atmel,at91sam9260-pit"; - reg = <0xfffffe30 0xf>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - }; - - shdwc@fffffe10 { -@@ -85,25 +85,25 @@ - tcb0: timer@f8008000 { - compatible = "atmel,at91sam9x5-tcb"; - reg = <0xf8008000 0x100>; -- interrupts = <17 4>; -+ interrupts = <17 4 0>; - }; - - tcb1: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb"; - reg = <0xf800c000 0x100>; -- interrupts = <17 4>; -+ interrupts = <17 4 0>; - }; - - dma: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; -- interrupts = <20 4>; -+ interrupts = <20 4 0>; - }; - - pioA: gpio@fffff400 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -113,7 +113,7 @@ - pioB: gpio@fffff600 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -123,7 +123,7 @@ - pioC: gpio@fffff800 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -133,7 +133,7 @@ - pioD: gpio@fffffa00 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffffa00 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -143,14 +143,14 @@ - dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffff200 0x200>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - status = "disabled"; - }; - - usart0: serial@f801c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf801c000 0x4000>; -- interrupts = <5 4>; -+ interrupts = <5 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -159,7 +159,7 @@ - usart1: serial@f8020000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8020000 0x4000>; -- interrupts = <6 4>; -+ interrupts = <6 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -168,7 +168,7 @@ - usart2: serial@f8024000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8024000 0x4000>; -- interrupts = <7 4>; -+ interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -177,7 +177,7 @@ - usart3: serial@f8028000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8028000 0x4000>; -- interrupts = <8 4>; -+ interrupts = <8 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -205,7 +205,7 @@ - usb0: ohci@00500000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; - reg = <0x00500000 0x00100000>; -- interrupts = <22 4>; -+ interrupts = <22 4 2>; - status = "disabled"; - }; - }; -diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi -index 170b6f8..fc38d21 100644 ---- a/arch/arm/boot/dts/at91sam9x5.dtsi -+++ b/arch/arm/boot/dts/at91sam9x5.dtsi -@@ -51,7 +51,7 @@ - ranges; - - aic: interrupt-controller@fffff000 { -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - reg = <0xfffff000 0x200>; -@@ -81,37 +81,37 @@ - pit: timer@fffffe30 { - compatible = "atmel,at91sam9260-pit"; - reg = <0xfffffe30 0xf>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - }; - - tcb0: timer@f8008000 { - compatible = "atmel,at91sam9x5-tcb"; - reg = <0xf8008000 0x100>; -- interrupts = <17 4>; -+ interrupts = <17 4 0>; - }; - - tcb1: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb"; - reg = <0xf800c000 0x100>; -- interrupts = <17 4>; -+ interrupts = <17 4 0>; - }; - - dma0: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; -- interrupts = <20 4>; -+ interrupts = <20 4 0>; - }; - - dma1: dma-controller@ffffee00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffee00 0x200>; -- interrupts = <21 4>; -+ interrupts = <21 4 0>; - }; - - pioA: gpio@fffff400 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -121,7 +121,7 @@ - pioB: gpio@fffff600 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; -- interrupts = <2 4>; -+ interrupts = <2 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -131,7 +131,7 @@ - pioC: gpio@fffff800 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -141,7 +141,7 @@ - pioD: gpio@fffffa00 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffffa00 0x100>; -- interrupts = <3 4>; -+ interrupts = <3 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; -@@ -151,14 +151,14 @@ - dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfffff200 0x200>; -- interrupts = <1 4>; -+ interrupts = <1 4 7>; - status = "disabled"; - }; - - usart0: serial@f801c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf801c000 0x200>; -- interrupts = <5 4>; -+ interrupts = <5 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -167,7 +167,7 @@ - usart1: serial@f8020000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8020000 0x200>; -- interrupts = <6 4>; -+ interrupts = <6 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -176,7 +176,7 @@ - usart2: serial@f8024000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8024000 0x200>; -- interrupts = <7 4>; -+ interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; -@@ -185,14 +185,14 @@ - macb0: ethernet@f802c000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xf802c000 0x100>; -- interrupts = <24 4>; -+ interrupts = <24 4 3>; - status = "disabled"; - }; - - macb1: ethernet@f8030000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xf8030000 0x100>; -- interrupts = <27 4>; -+ interrupts = <27 4 3>; - status = "disabled"; - }; - }; -@@ -215,14 +215,14 @@ - usb0: ohci@00600000 { - compatible = "atmel,at91rm9200-ohci", "usb-ohci"; - reg = <0x00600000 0x100000>; -- interrupts = <22 4>; -+ interrupts = <22 4 2>; - status = "disabled"; - }; - - usb1: ehci@00700000 { - compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; - reg = <0x00700000 0x100000>; -- interrupts = <22 4>; -+ interrupts = <22 4 2>; - status = "disabled"; - }; - }; -diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h -index c1413ed..3af7272 100644 ---- a/arch/arm/mach-at91/include/mach/at91_aic.h -+++ b/arch/arm/mach-at91/include/mach/at91_aic.h -@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; - .extern at91_aic_base - #endif - -+#define AT91_AIC_IRQ_MIN_PRIORITY 0 -+#define AT91_AIC_IRQ_MAX_PRIORITY 7 -+ - #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ - #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ - #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index df8605f..db8e141 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -42,6 +43,7 @@ - void __iomem *at91_aic_base; - static struct irq_domain *at91_aic_domain; - static struct device_node *at91_aic_np; -+static unsigned int *at91_aic_irq_priorities; - - static void at91_aic_mask_irq(struct irq_data *d) - { -@@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - /* Put virq number in Source Vector Register */ - at91_aic_write(AT91_AIC_SVR(hw), virq); - -- /* Active Low interrupt, without priority */ -- at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); -+ /* Active Low interrupt, with priority */ -+ at91_aic_write(AT91_AIC_SMR(hw), -+ AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); - - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); -@@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - return 0; - } - -+static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, -+ const u32 *intspec, unsigned int intsize, -+ irq_hw_number_t *out_hwirq, unsigned int *out_type) -+{ -+ if (WARN_ON(intsize < 3)) -+ return -EINVAL; -+ if (WARN_ON(intspec[0] >= NR_AIC_IRQS)) -+ return -EINVAL; -+ if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) -+ || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) -+ return -EINVAL; -+ -+ *out_hwirq = intspec[0]; -+ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; -+ at91_aic_irq_priorities[*out_hwirq] = intspec[2]; -+ -+ return 0; -+} -+ - static struct irq_domain_ops at91_aic_irq_ops = { - .map = at91_aic_irq_map, -- .xlate = irq_domain_xlate_twocell, -+ .xlate = at91_aic_irq_domain_xlate, - }; - - int __init at91_aic_of_init(struct device_node *node, -@@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node, - const __be32 *p; - u32 val; - -+ at91_aic_irq_priorities = kzalloc(NR_AIC_IRQS -+ * sizeof(*at91_aic_irq_priorities), -+ GFP_KERNEL); -+ if (!at91_aic_irq_priorities) -+ return -ENOMEM; -+ - at91_aic_base = of_iomap(node, 0); - at91_aic_np = node; - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0055-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch b/patches.at91/0055-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch new file mode 100644 index 000000000000..053cf1f3240b --- /dev/null +++ b/patches.at91/0055-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch @@ -0,0 +1,71 @@ +From 3513672c75cce07bc51cc8e433b18c238490e05f Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Fri, 22 Jun 2012 11:41:34 +0200 +Subject: ARM: at91: remove static irq priorities for sam9x5 + +commit 3a6b37134c71be1b085be7fe5234f364dc68e2de upstream. + +Since irq priorites are managed in DT, static ones are no more required for +sam9x5 which only has DT support. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/at91sam9x5.c | 38 -------------------------------------- + 1 file changed, 38 deletions(-) + +diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c +index dce3ff3..c949dc7 100644 +--- a/arch/arm/mach-at91/at91sam9x5.c ++++ b/arch/arm/mach-at91/at91sam9x5.c +@@ -313,47 +313,9 @@ void __init at91sam9x5_initialize(void) + /* -------------------------------------------------------------------- + * Interrupt initialization + * -------------------------------------------------------------------- */ +-/* +- * The default interrupt priority levels (0 = lowest, 7 = highest). +- */ +-static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { +- 7, /* Advanced Interrupt Controller (FIQ) */ +- 7, /* System Peripherals */ +- 1, /* Parallel IO Controller A and B */ +- 1, /* Parallel IO Controller C and D */ +- 4, /* Soft Modem */ +- 5, /* USART 0 */ +- 5, /* USART 1 */ +- 5, /* USART 2 */ +- 5, /* USART 3 */ +- 6, /* Two-Wire Interface 0 */ +- 6, /* Two-Wire Interface 1 */ +- 6, /* Two-Wire Interface 2 */ +- 0, /* Multimedia Card Interface 0 */ +- 5, /* Serial Peripheral Interface 0 */ +- 5, /* Serial Peripheral Interface 1 */ +- 5, /* UART 0 */ +- 5, /* UART 1 */ +- 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +- 0, /* Pulse Width Modulation Controller */ +- 0, /* ADC Controller */ +- 0, /* DMA Controller 0 */ +- 0, /* DMA Controller 1 */ +- 2, /* USB Host High Speed port */ +- 2, /* USB Device High speed port */ +- 3, /* Ethernet MAC 0 */ +- 3, /* LDC Controller or Image Sensor Interface */ +- 0, /* Multimedia Card Interface 1 */ +- 3, /* Ethernet MAC 1 */ +- 4, /* Synchronous Serial Interface */ +- 4, /* CAN Controller 0 */ +- 4, /* CAN Controller 1 */ +- 0, /* Advanced Interrupt Controller (IRQ0) */ +-}; + + struct at91_init_soc __initdata at91sam9x5_soc = { + .map_io = at91sam9x5_map_io, +- .default_irq_priority = at91sam9x5_default_irq_priority, + .register_clocks = at91sam9x5_register_clocks, + .init = at91sam9x5_initialize, + }; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0056-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch b/patches.at91/0056-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch new file mode 100644 index 000000000000..6a003f843eaf --- /dev/null +++ b/patches.at91/0056-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch @@ -0,0 +1,905 @@ +From 567e7d20c108ffb8974c7294ec0263da01ce419d Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Mon, 11 Jun 2012 15:38:03 +0200 +Subject: ARM: at91: at91 based machines specify their own irq handler at run + time + +commit 3e135466745a62b1814edef74c7b4a25e6bda707 upstream. + +SOC_AT91SAM9 selects MULTI_IRQ_HANDLER in order to let machines specify their +own IRQ handler at run time. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/Kconfig | 1 + + arch/arm/mach-at91/board-1arm.c | 2 ++ + arch/arm/mach-at91/board-afeb-9260v1.c | 2 ++ + arch/arm/mach-at91/board-cam60.c | 2 ++ + arch/arm/mach-at91/board-carmeva.c | 2 ++ + arch/arm/mach-at91/board-cpu9krea.c | 2 ++ + arch/arm/mach-at91/board-cpuat91.c | 2 ++ + arch/arm/mach-at91/board-csb337.c | 2 ++ + arch/arm/mach-at91/board-csb637.c | 2 ++ + arch/arm/mach-at91/board-dt.c | 2 ++ + arch/arm/mach-at91/board-eb01.c | 2 ++ + arch/arm/mach-at91/board-eb9200.c | 2 ++ + arch/arm/mach-at91/board-ecbat91.c | 2 ++ + arch/arm/mach-at91/board-eco920.c | 2 ++ + arch/arm/mach-at91/board-flexibity.c | 2 ++ + arch/arm/mach-at91/board-foxg20.c | 2 ++ + arch/arm/mach-at91/board-gsia18s.c | 2 ++ + arch/arm/mach-at91/board-kafa.c | 2 ++ + arch/arm/mach-at91/board-kb9202.c | 2 ++ + arch/arm/mach-at91/board-neocore926.c | 2 ++ + arch/arm/mach-at91/board-pcontrol-g20.c | 2 ++ + arch/arm/mach-at91/board-picotux200.c | 2 ++ + arch/arm/mach-at91/board-qil-a9260.c | 2 ++ + arch/arm/mach-at91/board-rm9200dk.c | 2 ++ + arch/arm/mach-at91/board-rm9200ek.c | 2 ++ + arch/arm/mach-at91/board-rsi-ews.c | 2 ++ + arch/arm/mach-at91/board-sam9-l9260.c | 2 ++ + arch/arm/mach-at91/board-sam9260ek.c | 2 ++ + arch/arm/mach-at91/board-sam9261ek.c | 2 ++ + arch/arm/mach-at91/board-sam9263ek.c | 2 ++ + arch/arm/mach-at91/board-sam9g20ek.c | 3 +++ + arch/arm/mach-at91/board-sam9m10g45ek.c | 2 ++ + arch/arm/mach-at91/board-sam9rlek.c | 2 ++ + arch/arm/mach-at91/board-snapper9260.c | 2 ++ + arch/arm/mach-at91/board-stamp9g20.c | 3 +++ + arch/arm/mach-at91/board-usb-a926x.c | 4 ++++ + arch/arm/mach-at91/board-yl-9200.c | 2 ++ + arch/arm/mach-at91/include/mach/at91_aic.h | 2 ++ + arch/arm/mach-at91/include/mach/entry-macro.S | 27 --------------------------- + arch/arm/mach-at91/irq.c | 19 +++++++++++++++++++ + 40 files changed, 98 insertions(+), 27 deletions(-) + delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.S + +diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig +index 19505c0..e401dea 100644 +--- a/arch/arm/mach-at91/Kconfig ++++ b/arch/arm/mach-at91/Kconfig +@@ -29,6 +29,7 @@ comment "Atmel AT91 Processor" + config SOC_AT91SAM9 + bool + select CPU_ARM926T ++ select MULTI_IRQ_HANDLER + select AT91_SAM9_TIME + select AT91_SAM9_SMC + +diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c +index 271f994..22d8856 100644 +--- a/arch/arm/mach-at91/board-1arm.c ++++ b/arch/arm/mach-at91/board-1arm.c +@@ -36,6 +36,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") + /* Maintainer: Lennert Buytenhek */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = onearm_init_early, + .init_irq = at91_init_irq_default, + .init_machine = onearm_board_init, +diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c +index b7d8aa7..de7be19 100644 +--- a/arch/arm/mach-at91/board-afeb-9260v1.c ++++ b/arch/arm/mach-at91/board-afeb-9260v1.c +@@ -44,6 +44,7 @@ + #include + + #include ++#include + + #include "generic.h" + +@@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board") + /* Maintainer: Sergey Lapin */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = afeb9260_init_early, + .init_irq = at91_init_irq_default, + .init_machine = afeb9260_board_init, +diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c +index 29d3ef0..477e708 100644 +--- a/arch/arm/mach-at91/board-cam60.c ++++ b/arch/arm/mach-at91/board-cam60.c +@@ -39,6 +39,7 @@ + #include + + #include ++#include + #include + + #include "sam9_smc.h" +@@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60") + /* Maintainer: KwikByte */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = cam60_init_early, + .init_irq = at91_init_irq_default, + .init_machine = cam60_board_init, +diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c +index 44328a6..a5b002f 100644 +--- a/arch/arm/mach-at91/board-carmeva.c ++++ b/arch/arm/mach-at91/board-carmeva.c +@@ -36,6 +36,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva") + /* Maintainer: Conitec Datasystems */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = carmeva_init_early, + .init_irq = at91_init_irq_default, + .init_machine = carmeva_board_init, +diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c +index ece0d76..7ddc219 100644 +--- a/arch/arm/mach-at91/board-cpu9krea.c ++++ b/arch/arm/mach-at91/board-cpu9krea.c +@@ -41,6 +41,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -375,6 +376,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") + /* Maintainer: Eric Benard - EUKREA Electromatique */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = cpu9krea_init_early, + .init_irq = at91_init_irq_default, + .init_machine = cpu9krea_board_init, +diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c +index 895cf2d..2e6d043 100644 +--- a/arch/arm/mach-at91/board-cpuat91.c ++++ b/arch/arm/mach-at91/board-cpuat91.c +@@ -37,6 +37,7 @@ + #include + + #include ++#include + #include + #include + #include +@@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea") + /* Maintainer: Eric Benard - EUKREA Electromatique */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = cpuat91_init_early, + .init_irq = at91_init_irq_default, + .init_machine = cpuat91_board_init, +diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c +index cd81336..462bc31 100644 +--- a/arch/arm/mach-at91/board-csb337.c ++++ b/arch/arm/mach-at91/board-csb337.c +@@ -39,6 +39,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337") + /* Maintainer: Bill Gatliff */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = csb337_init_early, + .init_irq = at91_init_irq_default, + .init_machine = csb337_board_init, +diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c +index 7c8b05a..872871a 100644 +--- a/arch/arm/mach-at91/board-csb637.c ++++ b/arch/arm/mach-at91/board-csb637.c +@@ -36,6 +36,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637") + /* Maintainer: Bill Gatliff */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = csb637_init_early, + .init_irq = at91_init_irq_default, + .init_machine = csb637_board_init, +diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c +index a1fce05..e8f45c4 100644 +--- a/arch/arm/mach-at91/board-dt.c ++++ b/arch/arm/mach-at91/board-dt.c +@@ -16,6 +16,7 @@ + #include + + #include ++#include + + #include + #include +@@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = at91_dt_initialize, + .init_irq = at91_dt_init_irq, + .init_machine = at91_dt_device_init, +diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c +index d2023f2..01f66e9 100644 +--- a/arch/arm/mach-at91/board-eb01.c ++++ b/arch/arm/mach-at91/board-eb01.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include "generic.h" + + static void __init at91eb01_init_irq(void) +@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void) + MACHINE_START(AT91EB01, "Atmel AT91 EB01") + /* Maintainer: Greg Ungerer */ + .timer = &at91x40_timer, ++ .handle_irq = at91_aic_handle_irq, + .init_early = at91eb01_init_early, + .init_irq = at91eb01_init_irq, + MACHINE_END +diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c +index bd10172..d1e1f3f 100644 +--- a/arch/arm/mach-at91/board-eb9200.c ++++ b/arch/arm/mach-at91/board-eb9200.c +@@ -36,6 +36,7 @@ + #include + + #include ++#include + + #include "generic.h" + +@@ -118,6 +119,7 @@ static void __init eb9200_board_init(void) + MACHINE_START(ATEB9200, "Embest ATEB9200") + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = eb9200_init_early, + .init_irq = at91_init_irq_default, + .init_machine = eb9200_board_init, +diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c +index 89cc372..9c24cb2 100644 +--- a/arch/arm/mach-at91/board-ecbat91.c ++++ b/arch/arm/mach-at91/board-ecbat91.c +@@ -39,6 +39,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91") + /* Maintainer: emQbit.com */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ecb_at91init_early, + .init_irq = at91_init_irq_default, + .init_machine = ecb_at91board_init, +diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c +index 558546c..82bdfde 100644 +--- a/arch/arm/mach-at91/board-eco920.c ++++ b/arch/arm/mach-at91/board-eco920.c +@@ -25,6 +25,7 @@ + #include + + #include ++#include + #include + #include + #include +@@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920") + /* Maintainer: Sascha Hauer */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = eco920_init_early, + .init_irq = at91_init_irq_default, + .init_machine = eco920_board_init, +diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c +index 47658f7..6cc83a8 100644 +--- a/arch/arm/mach-at91/board-flexibity.c ++++ b/arch/arm/mach-at91/board-flexibity.c +@@ -34,6 +34,7 @@ + + #include + #include ++#include + + #include "generic.h" + +@@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect") + /* Maintainer: Maxim Osipov */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = flexibity_init_early, + .init_irq = at91_init_irq_default, + .init_machine = flexibity_board_init, +diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c +index 33411e6..69ab124 100644 +--- a/arch/arm/mach-at91/board-foxg20.c ++++ b/arch/arm/mach-at91/board-foxg20.c +@@ -42,6 +42,7 @@ + #include + + #include ++#include + #include + + #include "sam9_smc.h" +@@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") + /* Maintainer: Sergio Tanzilli */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = foxg20_init_early, + .init_irq = at91_init_irq_default, + .init_machine = foxg20_board_init, +diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c +index 3e0dfa6..a9d5e78 100644 +--- a/arch/arm/mach-at91/board-gsia18s.c ++++ b/arch/arm/mach-at91/board-gsia18s.c +@@ -31,6 +31,7 @@ + #include + + #include ++#include + #include + #include + #include +@@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void) + MACHINE_START(GSIA18S, "GS_IA18_S") + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = gsia18s_init_early, + .init_irq = at91_init_irq_default, + .init_machine = gsia18s_board_init, +diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c +index f260657..64c1dbf 100644 +--- a/arch/arm/mach-at91/board-kafa.c ++++ b/arch/arm/mach-at91/board-kafa.c +@@ -35,6 +35,7 @@ + #include + + #include ++#include + #include + + #include "generic.h" +@@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA") + /* Maintainer: Sergei Sharonov */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = kafa_init_early, + .init_irq = at91_init_irq_default, + .init_machine = kafa_board_init, +diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c +index ba39db5..5d96cb8 100644 +--- a/arch/arm/mach-at91/board-kb9202.c ++++ b/arch/arm/mach-at91/board-kb9202.c +@@ -37,6 +37,7 @@ + + #include + #include ++#include + #include + #include + +@@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x") + /* Maintainer: KwikByte, Inc. */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = kb9202_init_early, + .init_irq = at91_init_irq_default, + .init_machine = kb9202_board_init, +diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c +index d2f4cc1..18103c5d 100644 +--- a/arch/arm/mach-at91/board-neocore926.c ++++ b/arch/arm/mach-at91/board-neocore926.c +@@ -45,6 +45,7 @@ + + #include + #include ++#include + #include + + #include "sam9_smc.h" +@@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") + /* Maintainer: ADENEO */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = neocore926_init_early, + .init_irq = at91_init_irq_default, + .init_machine = neocore926_board_init, +diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c +index 7fe6383..9ca3e32 100644 +--- a/arch/arm/mach-at91/board-pcontrol-g20.c ++++ b/arch/arm/mach-at91/board-pcontrol-g20.c +@@ -30,6 +30,7 @@ + #include + + #include ++#include + #include + #include + +@@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20") + /* Maintainer: pgsellmann@portner-elektronik.at */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = pcontrol_g20_init_early, + .init_irq = at91_init_irq_default, + .init_machine = pcontrol_g20_board_init, +diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c +index b45c0a5..1270655 100644 +--- a/arch/arm/mach-at91/board-picotux200.c ++++ b/arch/arm/mach-at91/board-picotux200.c +@@ -38,6 +38,7 @@ + #include + + #include ++#include + #include + #include + +@@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200") + /* Maintainer: Kleinhenz Elektronik GmbH */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = picotux200_init_early, + .init_irq = at91_init_irq_default, + .init_machine = picotux200_board_init, +diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c +index 0c61bf0..bf351e2 100644 +--- a/arch/arm/mach-at91/board-qil-a9260.c ++++ b/arch/arm/mach-at91/board-qil-a9260.c +@@ -41,6 +41,7 @@ + + #include + #include ++#include + #include + #include + +@@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260") + /* Maintainer: calao-systems */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c +index afd7a47..cc2bf97 100644 +--- a/arch/arm/mach-at91/board-rm9200dk.c ++++ b/arch/arm/mach-at91/board-rm9200dk.c +@@ -40,6 +40,7 @@ + + #include + #include ++#include + #include + #include + +@@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") + /* Maintainer: SAN People/Atmel */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = dk_init_early, + .init_irq = at91_init_irq_default, + .init_machine = dk_board_init, +diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c +index 2b15b8a..62e19e6 100644 +--- a/arch/arm/mach-at91/board-rm9200ek.c ++++ b/arch/arm/mach-at91/board-rm9200ek.c +@@ -40,6 +40,7 @@ + + #include + #include ++#include + #include + #include + +@@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") + /* Maintainer: SAN People/Atmel */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c +index 24ab9be..c3b43ae 100644 +--- a/arch/arm/mach-at91/board-rsi-ews.c ++++ b/arch/arm/mach-at91/board-rsi-ews.c +@@ -26,6 +26,7 @@ + + #include + #include ++#include + + #include + +@@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS") + /* Maintainer: Josef Holzmayr */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = rsi_ews_init_early, + .init_irq = at91_init_irq_default, + .init_machine = rsi_ews_board_init, +diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c +index cdd21f2..7bf6da7 100644 +--- a/arch/arm/mach-at91/board-sam9-l9260.c ++++ b/arch/arm/mach-at91/board-sam9-l9260.c +@@ -38,6 +38,7 @@ + #include + + #include ++#include + #include + + #include "sam9_smc.h" +@@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") + /* Maintainer: Olimex */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c +index 7b3c391..889c1bf 100644 +--- a/arch/arm/mach-at91/board-sam9260ek.c ++++ b/arch/arm/mach-at91/board-sam9260ek.c +@@ -42,6 +42,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c +index 2736453..2269be5 100644 +--- a/arch/arm/mach-at91/board-sam9261ek.c ++++ b/arch/arm/mach-at91/board-sam9261ek.c +@@ -46,6 +46,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c +index 983cb98..82adf58 100644 +--- a/arch/arm/mach-at91/board-sam9263ek.c ++++ b/arch/arm/mach-at91/board-sam9263ek.c +@@ -45,6 +45,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c +index 3d61553..da6d019 100644 +--- a/arch/arm/mach-at91/board-sam9g20ek.c ++++ b/arch/arm/mach-at91/board-sam9g20ek.c +@@ -42,6 +42,7 @@ + #include + + #include ++#include + #include + #include + +@@ -399,6 +400,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +@@ -408,6 +410,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c +index 9a87f0b..d1882d5 100644 +--- a/arch/arm/mach-at91/board-sam9m10g45ek.c ++++ b/arch/arm/mach-at91/board-sam9m10g45ek.c +@@ -41,6 +41,7 @@ + #include + + #include ++#include + #include + #include + #include +@@ -491,6 +492,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c +index be3239f..e7dc3ea 100644 +--- a/arch/arm/mach-at91/board-sam9rlek.c ++++ b/arch/arm/mach-at91/board-sam9rlek.c +@@ -31,6 +31,7 @@ + + #include + #include ++#include + #include + #include + +@@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") + /* Maintainer: Atmel */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c +index 9d446f1..a4e031a 100644 +--- a/arch/arm/mach-at91/board-snapper9260.c ++++ b/arch/arm/mach-at91/board-snapper9260.c +@@ -33,6 +33,7 @@ + + #include + #include ++#include + #include + + #include "sam9_smc.h" +@@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void) + MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = snapper9260_init_early, + .init_irq = at91_init_irq_default, + .init_machine = snapper9260_board_init, +diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c +index ee86f9d..29eae16 100644 +--- a/arch/arm/mach-at91/board-stamp9g20.c ++++ b/arch/arm/mach-at91/board-stamp9g20.c +@@ -26,6 +26,7 @@ + #include + + #include ++#include + #include + + #include "sam9_smc.h" +@@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") + /* Maintainer: taskit GmbH */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = stamp9g20_init_early, + .init_irq = at91_init_irq_default, + .init_machine = portuxg20_board_init, +@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") + /* Maintainer: taskit GmbH */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = stamp9g20_init_early, + .init_irq = at91_init_irq_default, + .init_machine = stamp9g20evb_board_init, +diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c +index 95393fc..c1476b9 100644 +--- a/arch/arm/mach-at91/board-usb-a926x.c ++++ b/arch/arm/mach-at91/board-usb-a926x.c +@@ -42,6 +42,7 @@ + + #include + #include ++#include + #include + #include + +@@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") + /* Maintainer: calao-systems */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260") + /* Maintainer: calao-systems */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0") + /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c +index d56665e..516d340 100644 +--- a/arch/arm/mach-at91/board-yl-9200.c ++++ b/arch/arm/mach-at91/board-yl-9200.c +@@ -44,6 +44,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200") + /* Maintainer: S.Birtles */ + .timer = &at91rm9200_timer, + .map_io = at91_map_io, ++ .handle_irq = at91_aic_handle_irq, + .init_early = yl9200_init_early, + .init_irq = at91_init_irq_default, + .init_machine = yl9200_board_init, +diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h +index 3af7272..7867378 100644 +--- a/arch/arm/mach-at91/include/mach/at91_aic.h ++++ b/arch/arm/mach-at91/include/mach/at91_aic.h +@@ -65,4 +65,6 @@ extern void __iomem *at91_aic_base; + #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ + #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ + ++void at91_aic_handle_irq(struct pt_regs *regs); ++ + #endif +diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S +deleted file mode 100644 +index 903bf20..0000000 +--- a/arch/arm/mach-at91/include/mach/entry-macro.S ++++ /dev/null +@@ -1,27 +0,0 @@ +-/* +- * arch/arm/mach-at91/include/mach/entry-macro.S +- * +- * Copyright (C) 2003-2005 SAN People +- * +- * Low-level IRQ helper macros for AT91RM9200 platforms +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#include +-#include +- +- .macro get_irqnr_preamble, base, tmp +- ldr \base, =at91_aic_base @ base virtual address of AIC peripheral +- ldr \base, [\base] +- .endm +- +- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp +- ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) +- ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number +- teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt +- streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. +- .endm +- +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index db8e141..390d4df 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -36,6 +36,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -45,6 +46,24 @@ static struct irq_domain *at91_aic_domain; + static struct device_node *at91_aic_np; + static unsigned int *at91_aic_irq_priorities; + ++asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) ++{ ++ u32 irqnr; ++ u32 irqstat; ++ ++ irqnr = at91_aic_read(AT91_AIC_IVR); ++ irqstat = at91_aic_read(AT91_AIC_ISR); ++ ++ /* ++ * ISR value is 0 when there is no current interrupt or when there is ++ * a spurious interrupt ++ */ ++ if (!irqstat) ++ at91_aic_write(AT91_AIC_EOICR, 0); ++ else ++ handle_IRQ(irqnr, regs); ++} ++ + static void at91_aic_mask_irq(struct irq_data *d) + { + /* Disable interrupt on AIC */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0056-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch b/patches.at91/0056-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch deleted file mode 100644 index 395295b3151b..000000000000 --- a/patches.at91/0056-ARM-at91-remove-static-irq-priorities-for-sam9x5.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 253f40569228efcd947997772f9e913aef4e8dec Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Fri, 22 Jun 2012 11:41:34 +0200 -Subject: ARM: at91: remove static irq priorities for sam9x5 - -Since irq priorites are managed in DT, static ones are no more required for -sam9x5 which only has DT support. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/at91sam9x5.c | 38 -------------------------------------- - 1 file changed, 38 deletions(-) - -diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c -index dce3ff3..c949dc7 100644 ---- a/arch/arm/mach-at91/at91sam9x5.c -+++ b/arch/arm/mach-at91/at91sam9x5.c -@@ -313,47 +313,9 @@ void __init at91sam9x5_initialize(void) - /* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ --/* -- * The default interrupt priority levels (0 = lowest, 7 = highest). -- */ --static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { -- 7, /* Advanced Interrupt Controller (FIQ) */ -- 7, /* System Peripherals */ -- 1, /* Parallel IO Controller A and B */ -- 1, /* Parallel IO Controller C and D */ -- 4, /* Soft Modem */ -- 5, /* USART 0 */ -- 5, /* USART 1 */ -- 5, /* USART 2 */ -- 5, /* USART 3 */ -- 6, /* Two-Wire Interface 0 */ -- 6, /* Two-Wire Interface 1 */ -- 6, /* Two-Wire Interface 2 */ -- 0, /* Multimedia Card Interface 0 */ -- 5, /* Serial Peripheral Interface 0 */ -- 5, /* Serial Peripheral Interface 1 */ -- 5, /* UART 0 */ -- 5, /* UART 1 */ -- 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ -- 0, /* Pulse Width Modulation Controller */ -- 0, /* ADC Controller */ -- 0, /* DMA Controller 0 */ -- 0, /* DMA Controller 1 */ -- 2, /* USB Host High Speed port */ -- 2, /* USB Device High speed port */ -- 3, /* Ethernet MAC 0 */ -- 3, /* LDC Controller or Image Sensor Interface */ -- 0, /* Multimedia Card Interface 1 */ -- 3, /* Ethernet MAC 1 */ -- 4, /* Synchronous Serial Interface */ -- 4, /* CAN Controller 0 */ -- 4, /* CAN Controller 1 */ -- 0, /* Advanced Interrupt Controller (IRQ0) */ --}; - - struct at91_init_soc __initdata at91sam9x5_soc = { - .map_io = at91sam9x5_map_io, -- .default_irq_priority = at91sam9x5_default_irq_priority, - .register_clocks = at91sam9x5_register_clocks, - .init = at91sam9x5_initialize, - }; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0057-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch b/patches.at91/0057-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch deleted file mode 100644 index a02a21ce88c4..000000000000 --- a/patches.at91/0057-ARM-at91-at91-based-machines-specify-their-own-irq-h.patch +++ /dev/null @@ -1,903 +0,0 @@ -From 4d4e7847287b4ad784ac97768d4768bbbfabe8a1 Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Mon, 11 Jun 2012 15:38:03 +0200 -Subject: ARM: at91: at91 based machines specify their own irq handler at run - time - -SOC_AT91SAM9 selects MULTI_IRQ_HANDLER in order to let machines specify their -own IRQ handler at run time. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/Kconfig | 1 + - arch/arm/mach-at91/board-1arm.c | 2 ++ - arch/arm/mach-at91/board-afeb-9260v1.c | 2 ++ - arch/arm/mach-at91/board-cam60.c | 2 ++ - arch/arm/mach-at91/board-carmeva.c | 2 ++ - arch/arm/mach-at91/board-cpu9krea.c | 2 ++ - arch/arm/mach-at91/board-cpuat91.c | 2 ++ - arch/arm/mach-at91/board-csb337.c | 2 ++ - arch/arm/mach-at91/board-csb637.c | 2 ++ - arch/arm/mach-at91/board-dt.c | 2 ++ - arch/arm/mach-at91/board-eb01.c | 2 ++ - arch/arm/mach-at91/board-eb9200.c | 2 ++ - arch/arm/mach-at91/board-ecbat91.c | 2 ++ - arch/arm/mach-at91/board-eco920.c | 2 ++ - arch/arm/mach-at91/board-flexibity.c | 2 ++ - arch/arm/mach-at91/board-foxg20.c | 2 ++ - arch/arm/mach-at91/board-gsia18s.c | 2 ++ - arch/arm/mach-at91/board-kafa.c | 2 ++ - arch/arm/mach-at91/board-kb9202.c | 2 ++ - arch/arm/mach-at91/board-neocore926.c | 2 ++ - arch/arm/mach-at91/board-pcontrol-g20.c | 2 ++ - arch/arm/mach-at91/board-picotux200.c | 2 ++ - arch/arm/mach-at91/board-qil-a9260.c | 2 ++ - arch/arm/mach-at91/board-rm9200dk.c | 2 ++ - arch/arm/mach-at91/board-rm9200ek.c | 2 ++ - arch/arm/mach-at91/board-rsi-ews.c | 2 ++ - arch/arm/mach-at91/board-sam9-l9260.c | 2 ++ - arch/arm/mach-at91/board-sam9260ek.c | 2 ++ - arch/arm/mach-at91/board-sam9261ek.c | 2 ++ - arch/arm/mach-at91/board-sam9263ek.c | 2 ++ - arch/arm/mach-at91/board-sam9g20ek.c | 3 +++ - arch/arm/mach-at91/board-sam9m10g45ek.c | 2 ++ - arch/arm/mach-at91/board-sam9rlek.c | 2 ++ - arch/arm/mach-at91/board-snapper9260.c | 2 ++ - arch/arm/mach-at91/board-stamp9g20.c | 3 +++ - arch/arm/mach-at91/board-usb-a926x.c | 4 ++++ - arch/arm/mach-at91/board-yl-9200.c | 2 ++ - arch/arm/mach-at91/include/mach/at91_aic.h | 2 ++ - arch/arm/mach-at91/include/mach/entry-macro.S | 27 --------------------------- - arch/arm/mach-at91/irq.c | 19 +++++++++++++++++++ - 40 files changed, 98 insertions(+), 27 deletions(-) - delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.S - -diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig -index 19505c0..e401dea 100644 ---- a/arch/arm/mach-at91/Kconfig -+++ b/arch/arm/mach-at91/Kconfig -@@ -29,6 +29,7 @@ comment "Atmel AT91 Processor" - config SOC_AT91SAM9 - bool - select CPU_ARM926T -+ select MULTI_IRQ_HANDLER - select AT91_SAM9_TIME - select AT91_SAM9_SMC - -diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c -index 271f994..22d8856 100644 ---- a/arch/arm/mach-at91/board-1arm.c -+++ b/arch/arm/mach-at91/board-1arm.c -@@ -36,6 +36,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") - /* Maintainer: Lennert Buytenhek */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = onearm_init_early, - .init_irq = at91_init_irq_default, - .init_machine = onearm_board_init, -diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c -index b7d8aa7..de7be19 100644 ---- a/arch/arm/mach-at91/board-afeb-9260v1.c -+++ b/arch/arm/mach-at91/board-afeb-9260v1.c -@@ -44,6 +44,7 @@ - #include - - #include -+#include - - #include "generic.h" - -@@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board") - /* Maintainer: Sergey Lapin */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = afeb9260_init_early, - .init_irq = at91_init_irq_default, - .init_machine = afeb9260_board_init, -diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c -index 29d3ef0..477e708 100644 ---- a/arch/arm/mach-at91/board-cam60.c -+++ b/arch/arm/mach-at91/board-cam60.c -@@ -39,6 +39,7 @@ - #include - - #include -+#include - #include - - #include "sam9_smc.h" -@@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60") - /* Maintainer: KwikByte */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = cam60_init_early, - .init_irq = at91_init_irq_default, - .init_machine = cam60_board_init, -diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c -index 44328a6..a5b002f 100644 ---- a/arch/arm/mach-at91/board-carmeva.c -+++ b/arch/arm/mach-at91/board-carmeva.c -@@ -36,6 +36,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva") - /* Maintainer: Conitec Datasystems */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = carmeva_init_early, - .init_irq = at91_init_irq_default, - .init_machine = carmeva_board_init, -diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c -index ece0d76..7ddc219 100644 ---- a/arch/arm/mach-at91/board-cpu9krea.c -+++ b/arch/arm/mach-at91/board-cpu9krea.c -@@ -41,6 +41,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -375,6 +376,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") - /* Maintainer: Eric Benard - EUKREA Electromatique */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = cpu9krea_init_early, - .init_irq = at91_init_irq_default, - .init_machine = cpu9krea_board_init, -diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c -index 895cf2d..2e6d043 100644 ---- a/arch/arm/mach-at91/board-cpuat91.c -+++ b/arch/arm/mach-at91/board-cpuat91.c -@@ -37,6 +37,7 @@ - #include - - #include -+#include - #include - #include - #include -@@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea") - /* Maintainer: Eric Benard - EUKREA Electromatique */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = cpuat91_init_early, - .init_irq = at91_init_irq_default, - .init_machine = cpuat91_board_init, -diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c -index cd81336..462bc31 100644 ---- a/arch/arm/mach-at91/board-csb337.c -+++ b/arch/arm/mach-at91/board-csb337.c -@@ -39,6 +39,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337") - /* Maintainer: Bill Gatliff */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = csb337_init_early, - .init_irq = at91_init_irq_default, - .init_machine = csb337_board_init, -diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c -index 7c8b05a..872871a 100644 ---- a/arch/arm/mach-at91/board-csb637.c -+++ b/arch/arm/mach-at91/board-csb637.c -@@ -36,6 +36,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637") - /* Maintainer: Bill Gatliff */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = csb637_init_early, - .init_irq = at91_init_irq_default, - .init_machine = csb637_board_init, -diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c -index a1fce05..e8f45c4 100644 ---- a/arch/arm/mach-at91/board-dt.c -+++ b/arch/arm/mach-at91/board-dt.c -@@ -16,6 +16,7 @@ - #include - - #include -+#include - - #include - #include -@@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = at91_dt_initialize, - .init_irq = at91_dt_init_irq, - .init_machine = at91_dt_device_init, -diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c -index d2023f2..01f66e9 100644 ---- a/arch/arm/mach-at91/board-eb01.c -+++ b/arch/arm/mach-at91/board-eb01.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - #include "generic.h" - - static void __init at91eb01_init_irq(void) -@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void) - MACHINE_START(AT91EB01, "Atmel AT91 EB01") - /* Maintainer: Greg Ungerer */ - .timer = &at91x40_timer, -+ .handle_irq = at91_aic_handle_irq, - .init_early = at91eb01_init_early, - .init_irq = at91eb01_init_irq, - MACHINE_END -diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c -index bd10172..d1e1f3f 100644 ---- a/arch/arm/mach-at91/board-eb9200.c -+++ b/arch/arm/mach-at91/board-eb9200.c -@@ -36,6 +36,7 @@ - #include - - #include -+#include - - #include "generic.h" - -@@ -118,6 +119,7 @@ static void __init eb9200_board_init(void) - MACHINE_START(ATEB9200, "Embest ATEB9200") - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = eb9200_init_early, - .init_irq = at91_init_irq_default, - .init_machine = eb9200_board_init, -diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c -index 89cc372..9c24cb2 100644 ---- a/arch/arm/mach-at91/board-ecbat91.c -+++ b/arch/arm/mach-at91/board-ecbat91.c -@@ -39,6 +39,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91") - /* Maintainer: emQbit.com */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ecb_at91init_early, - .init_irq = at91_init_irq_default, - .init_machine = ecb_at91board_init, -diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c -index 558546c..82bdfde 100644 ---- a/arch/arm/mach-at91/board-eco920.c -+++ b/arch/arm/mach-at91/board-eco920.c -@@ -25,6 +25,7 @@ - #include - - #include -+#include - #include - #include - #include -@@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920") - /* Maintainer: Sascha Hauer */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = eco920_init_early, - .init_irq = at91_init_irq_default, - .init_machine = eco920_board_init, -diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c -index 47658f7..6cc83a8 100644 ---- a/arch/arm/mach-at91/board-flexibity.c -+++ b/arch/arm/mach-at91/board-flexibity.c -@@ -34,6 +34,7 @@ - - #include - #include -+#include - - #include "generic.h" - -@@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect") - /* Maintainer: Maxim Osipov */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = flexibity_init_early, - .init_irq = at91_init_irq_default, - .init_machine = flexibity_board_init, -diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c -index 33411e6..69ab124 100644 ---- a/arch/arm/mach-at91/board-foxg20.c -+++ b/arch/arm/mach-at91/board-foxg20.c -@@ -42,6 +42,7 @@ - #include - - #include -+#include - #include - - #include "sam9_smc.h" -@@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") - /* Maintainer: Sergio Tanzilli */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = foxg20_init_early, - .init_irq = at91_init_irq_default, - .init_machine = foxg20_board_init, -diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c -index 3e0dfa6..a9d5e78 100644 ---- a/arch/arm/mach-at91/board-gsia18s.c -+++ b/arch/arm/mach-at91/board-gsia18s.c -@@ -31,6 +31,7 @@ - #include - - #include -+#include - #include - #include - #include -@@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void) - MACHINE_START(GSIA18S, "GS_IA18_S") - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = gsia18s_init_early, - .init_irq = at91_init_irq_default, - .init_machine = gsia18s_board_init, -diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c -index f260657..64c1dbf 100644 ---- a/arch/arm/mach-at91/board-kafa.c -+++ b/arch/arm/mach-at91/board-kafa.c -@@ -35,6 +35,7 @@ - #include - - #include -+#include - #include - - #include "generic.h" -@@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA") - /* Maintainer: Sergei Sharonov */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = kafa_init_early, - .init_irq = at91_init_irq_default, - .init_machine = kafa_board_init, -diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c -index ba39db5..5d96cb8 100644 ---- a/arch/arm/mach-at91/board-kb9202.c -+++ b/arch/arm/mach-at91/board-kb9202.c -@@ -37,6 +37,7 @@ - - #include - #include -+#include - #include - #include - -@@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x") - /* Maintainer: KwikByte, Inc. */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = kb9202_init_early, - .init_irq = at91_init_irq_default, - .init_machine = kb9202_board_init, -diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c -index d2f4cc1..18103c5d 100644 ---- a/arch/arm/mach-at91/board-neocore926.c -+++ b/arch/arm/mach-at91/board-neocore926.c -@@ -45,6 +45,7 @@ - - #include - #include -+#include - #include - - #include "sam9_smc.h" -@@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") - /* Maintainer: ADENEO */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = neocore926_init_early, - .init_irq = at91_init_irq_default, - .init_machine = neocore926_board_init, -diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c -index 7fe6383..9ca3e32 100644 ---- a/arch/arm/mach-at91/board-pcontrol-g20.c -+++ b/arch/arm/mach-at91/board-pcontrol-g20.c -@@ -30,6 +30,7 @@ - #include - - #include -+#include - #include - #include - -@@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20") - /* Maintainer: pgsellmann@portner-elektronik.at */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = pcontrol_g20_init_early, - .init_irq = at91_init_irq_default, - .init_machine = pcontrol_g20_board_init, -diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c -index b45c0a5..1270655 100644 ---- a/arch/arm/mach-at91/board-picotux200.c -+++ b/arch/arm/mach-at91/board-picotux200.c -@@ -38,6 +38,7 @@ - #include - - #include -+#include - #include - #include - -@@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200") - /* Maintainer: Kleinhenz Elektronik GmbH */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = picotux200_init_early, - .init_irq = at91_init_irq_default, - .init_machine = picotux200_board_init, -diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c -index 0c61bf0..bf351e2 100644 ---- a/arch/arm/mach-at91/board-qil-a9260.c -+++ b/arch/arm/mach-at91/board-qil-a9260.c -@@ -41,6 +41,7 @@ - - #include - #include -+#include - #include - #include - -@@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260") - /* Maintainer: calao-systems */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c -index afd7a47..cc2bf97 100644 ---- a/arch/arm/mach-at91/board-rm9200dk.c -+++ b/arch/arm/mach-at91/board-rm9200dk.c -@@ -40,6 +40,7 @@ - - #include - #include -+#include - #include - #include - -@@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") - /* Maintainer: SAN People/Atmel */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = dk_init_early, - .init_irq = at91_init_irq_default, - .init_machine = dk_board_init, -diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c -index 2b15b8a..62e19e6 100644 ---- a/arch/arm/mach-at91/board-rm9200ek.c -+++ b/arch/arm/mach-at91/board-rm9200ek.c -@@ -40,6 +40,7 @@ - - #include - #include -+#include - #include - #include - -@@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") - /* Maintainer: SAN People/Atmel */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c -index 24ab9be..c3b43ae 100644 ---- a/arch/arm/mach-at91/board-rsi-ews.c -+++ b/arch/arm/mach-at91/board-rsi-ews.c -@@ -26,6 +26,7 @@ - - #include - #include -+#include - - #include - -@@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS") - /* Maintainer: Josef Holzmayr */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = rsi_ews_init_early, - .init_irq = at91_init_irq_default, - .init_machine = rsi_ews_board_init, -diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c -index cdd21f2..7bf6da7 100644 ---- a/arch/arm/mach-at91/board-sam9-l9260.c -+++ b/arch/arm/mach-at91/board-sam9-l9260.c -@@ -38,6 +38,7 @@ - #include - - #include -+#include - #include - - #include "sam9_smc.h" -@@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") - /* Maintainer: Olimex */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c -index 7b3c391..889c1bf 100644 ---- a/arch/arm/mach-at91/board-sam9260ek.c -+++ b/arch/arm/mach-at91/board-sam9260ek.c -@@ -42,6 +42,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c -index 2736453..2269be5 100644 ---- a/arch/arm/mach-at91/board-sam9261ek.c -+++ b/arch/arm/mach-at91/board-sam9261ek.c -@@ -46,6 +46,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c -index 983cb98..82adf58 100644 ---- a/arch/arm/mach-at91/board-sam9263ek.c -+++ b/arch/arm/mach-at91/board-sam9263ek.c -@@ -45,6 +45,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c -index 3d61553..da6d019 100644 ---- a/arch/arm/mach-at91/board-sam9g20ek.c -+++ b/arch/arm/mach-at91/board-sam9g20ek.c -@@ -42,6 +42,7 @@ - #include - - #include -+#include - #include - #include - -@@ -399,6 +400,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -@@ -408,6 +410,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c -index 9a87f0b..d1882d5 100644 ---- a/arch/arm/mach-at91/board-sam9m10g45ek.c -+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c -@@ -41,6 +41,7 @@ - #include - - #include -+#include - #include - #include - #include -@@ -491,6 +492,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c -index be3239f..e7dc3ea 100644 ---- a/arch/arm/mach-at91/board-sam9rlek.c -+++ b/arch/arm/mach-at91/board-sam9rlek.c -@@ -31,6 +31,7 @@ - - #include - #include -+#include - #include - #include - -@@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") - /* Maintainer: Atmel */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c -index 9d446f1..a4e031a 100644 ---- a/arch/arm/mach-at91/board-snapper9260.c -+++ b/arch/arm/mach-at91/board-snapper9260.c -@@ -33,6 +33,7 @@ - - #include - #include -+#include - #include - - #include "sam9_smc.h" -@@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void) - MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = snapper9260_init_early, - .init_irq = at91_init_irq_default, - .init_machine = snapper9260_board_init, -diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c -index ee86f9d..29eae16 100644 ---- a/arch/arm/mach-at91/board-stamp9g20.c -+++ b/arch/arm/mach-at91/board-stamp9g20.c -@@ -26,6 +26,7 @@ - #include - - #include -+#include - #include - - #include "sam9_smc.h" -@@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") - /* Maintainer: taskit GmbH */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = stamp9g20_init_early, - .init_irq = at91_init_irq_default, - .init_machine = portuxg20_board_init, -@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") - /* Maintainer: taskit GmbH */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = stamp9g20_init_early, - .init_irq = at91_init_irq_default, - .init_machine = stamp9g20evb_board_init, -diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c -index 95393fc..c1476b9 100644 ---- a/arch/arm/mach-at91/board-usb-a926x.c -+++ b/arch/arm/mach-at91/board-usb-a926x.c -@@ -42,6 +42,7 @@ - - #include - #include -+#include - #include - #include - -@@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") - /* Maintainer: calao-systems */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260") - /* Maintainer: calao-systems */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0") - /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c -index d56665e..516d340 100644 ---- a/arch/arm/mach-at91/board-yl-9200.c -+++ b/arch/arm/mach-at91/board-yl-9200.c -@@ -44,6 +44,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200") - /* Maintainer: S.Birtles */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, -+ .handle_irq = at91_aic_handle_irq, - .init_early = yl9200_init_early, - .init_irq = at91_init_irq_default, - .init_machine = yl9200_board_init, -diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h -index 3af7272..7867378 100644 ---- a/arch/arm/mach-at91/include/mach/at91_aic.h -+++ b/arch/arm/mach-at91/include/mach/at91_aic.h -@@ -65,4 +65,6 @@ extern void __iomem *at91_aic_base; - #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ - #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ - -+void at91_aic_handle_irq(struct pt_regs *regs); -+ - #endif -diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S -deleted file mode 100644 -index 903bf20..0000000 ---- a/arch/arm/mach-at91/include/mach/entry-macro.S -+++ /dev/null -@@ -1,27 +0,0 @@ --/* -- * arch/arm/mach-at91/include/mach/entry-macro.S -- * -- * Copyright (C) 2003-2005 SAN People -- * -- * Low-level IRQ helper macros for AT91RM9200 platforms -- * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. -- */ -- --#include --#include -- -- .macro get_irqnr_preamble, base, tmp -- ldr \base, =at91_aic_base @ base virtual address of AIC peripheral -- ldr \base, [\base] -- .endm -- -- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp -- ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) -- ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number -- teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt -- streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. -- .endm -- -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index db8e141..390d4df 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -36,6 +36,7 @@ - #include - #include - -+#include - #include - #include - #include -@@ -45,6 +46,24 @@ static struct irq_domain *at91_aic_domain; - static struct device_node *at91_aic_np; - static unsigned int *at91_aic_irq_priorities; - -+asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) -+{ -+ u32 irqnr; -+ u32 irqstat; -+ -+ irqnr = at91_aic_read(AT91_AIC_IVR); -+ irqstat = at91_aic_read(AT91_AIC_ISR); -+ -+ /* -+ * ISR value is 0 when there is no current interrupt or when there is -+ * a spurious interrupt -+ */ -+ if (!irqstat) -+ at91_aic_write(AT91_AIC_EOICR, 0); -+ else -+ handle_IRQ(irqnr, regs); -+} -+ - static void at91_aic_mask_irq(struct irq_data *d) - { - /* Disable interrupt on AIC */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0057-ARM-at91-sparse-irq-support.patch b/patches.at91/0057-ARM-at91-sparse-irq-support.patch new file mode 100644 index 000000000000..56eb5b0e77cc --- /dev/null +++ b/patches.at91/0057-ARM-at91-sparse-irq-support.patch @@ -0,0 +1,1580 @@ +From f53355af7dda7196da453539fae26457c459dfb2 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Thu, 21 Jun 2012 14:47:27 +0200 +Subject: ARM: at91: sparse irq support + +commit 8fe82a5550a8e97b3f59c74f994b88ed6b3544a3 upstream. + +Enable sparse irq support for multisoc image. It involves to add the +NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY +irq descs are allocated before AIC requests irq descs allocation. +Move NR_AIC_IRQS macro to a more appropiate place with the purpose to +remove mach/irqs.h later. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Nicolas Ferre + +Conflicts: + arch/arm/mach-at91/at91sam9260_devices.c + arch/arm/mach-at91/at91sam9g45_devices.c +--- + arch/arm/mach-at91/Kconfig | 1 + + arch/arm/mach-at91/at91rm9200.c | 1 + + arch/arm/mach-at91/at91rm9200_devices.c | 84 +++++++++++------------ + arch/arm/mach-at91/at91sam9260.c | 1 + + arch/arm/mach-at91/at91sam9260_devices.c | 88 ++++++++++++------------ + arch/arm/mach-at91/at91sam9261.c | 1 + + arch/arm/mach-at91/at91sam9261_devices.c | 68 +++++++++---------- + arch/arm/mach-at91/at91sam9263.c | 1 + + arch/arm/mach-at91/at91sam9263_devices.c | 80 +++++++++++----------- + arch/arm/mach-at91/at91sam926x_time.c | 2 +- + arch/arm/mach-at91/at91sam9g45.c | 1 + + arch/arm/mach-at91/at91sam9g45_devices.c | 104 ++++++++++++++--------------- + arch/arm/mach-at91/at91sam9rl.c | 1 + + arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++++++++++----------- + arch/arm/mach-at91/at91x40.c | 1 + + arch/arm/mach-at91/include/mach/at91_aic.h | 3 + + arch/arm/mach-at91/include/mach/irqs.h | 12 ---- + arch/arm/mach-at91/irq.c | 6 +- + arch/arm/mach-at91/pm.c | 1 + + 19 files changed, 267 insertions(+), 265 deletions(-) + +diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig +index e401dea..7d0c40a 100644 +--- a/arch/arm/mach-at91/Kconfig ++++ b/arch/arm/mach-at91/Kconfig +@@ -30,6 +30,7 @@ config SOC_AT91SAM9 + bool + select CPU_ARM926T + select MULTI_IRQ_HANDLER ++ select SPARSE_IRQ + select AT91_SAM9_TIME + select AT91_SAM9_SMC + +diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c +index d50da1a..801c30b 100644 +--- a/arch/arm/mach-at91/at91rm9200.c ++++ b/arch/arm/mach-at91/at91rm9200.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c +index 99affb5..04d69d3 100644 +--- a/arch/arm/mach-at91/at91rm9200_devices.c ++++ b/arch/arm/mach-at91/at91rm9200_devices.c +@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_UHP, +- .end = AT91RM9200_ID_UHP, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -94,8 +94,8 @@ static struct resource udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_UDP, +- .end = AT91RM9200_ID_UDP, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -145,8 +145,8 @@ static struct resource eth_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_EMAC, +- .end = AT91RM9200_ID_EMAC, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_MCI, +- .end = AT91RM9200_ID_MCI, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -488,8 +488,8 @@ static struct resource twi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_TWI, +- .end = AT91RM9200_ID_TWI, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -532,8 +532,8 @@ static struct resource spi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_SPI, +- .end = AT91RM9200_ID_SPI, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_TC0, +- .end = AT91RM9200_ID_TC0, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91RM9200_ID_TC1, +- .end = AT91RM9200_ID_TC1, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91RM9200_ID_TC2, +- .end = AT91RM9200_ID_TC2, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_TC3, +- .end = AT91RM9200_ID_TC3, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91RM9200_ID_TC4, +- .end = AT91RM9200_ID_TC4, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91RM9200_ID_TC5, +- .end = AT91RM9200_ID_TC5, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_SSC0, +- .end = AT91RM9200_ID_SSC0, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_SSC1, +- .end = AT91RM9200_ID_SSC1, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_SSC2, +- .end = AT91RM9200_ID_SSC2, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_US0, +- .end = AT91RM9200_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_US1, +- .end = AT91RM9200_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_US2, +- .end = AT91RM9200_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91RM9200_ID_US3, +- .end = AT91RM9200_ID_US3, ++ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, ++ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c +index a27bbec..c644131 100644 +--- a/arch/arm/mach-at91/at91sam9260.c ++++ b/arch/arm/mach-at91/at91sam9260.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + #include + +diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c +index d556de1..43e60fb 100644 +--- a/arch/arm/mach-at91/at91sam9260_devices.c ++++ b/arch/arm/mach-at91/at91sam9260_devices.c +@@ -42,8 +42,8 @@ static struct resource usbh_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_UHP, +- .end = AT91SAM9260_ID_UHP, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -95,8 +95,8 @@ static struct resource udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_UDP, +- .end = AT91SAM9260_ID_UDP, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -146,8 +146,8 @@ static struct resource eth_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_EMAC, +- .end = AT91SAM9260_ID_EMAC, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -220,8 +220,8 @@ static struct resource mmc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_MCI, +- .end = AT91SAM9260_ID_MCI, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -302,8 +302,8 @@ static struct resource mmc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_MCI, +- .end = AT91SAM9260_ID_MCI, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -493,8 +493,8 @@ static struct resource twi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_TWI, +- .end = AT91SAM9260_ID_TWI, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -537,8 +537,8 @@ static struct resource spi0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_SPI0, +- .end = AT91SAM9260_ID_SPI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -563,8 +563,8 @@ static struct resource spi1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_SPI1, +- .end = AT91SAM9260_ID_SPI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -649,18 +649,18 @@ static struct resource tcb0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_TC0, +- .end = AT91SAM9260_ID_TC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91SAM9260_ID_TC1, +- .end = AT91SAM9260_ID_TC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91SAM9260_ID_TC2, +- .end = AT91SAM9260_ID_TC2, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -679,18 +679,18 @@ static struct resource tcb1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_TC3, +- .end = AT91SAM9260_ID_TC3, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91SAM9260_ID_TC4, +- .end = AT91SAM9260_ID_TC4, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91SAM9260_ID_TC5, +- .end = AT91SAM9260_ID_TC5, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -804,8 +804,8 @@ static struct resource ssc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_SSC, +- .end = AT91SAM9260_ID_SSC, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -879,8 +879,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -917,8 +917,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US0, +- .end = AT91SAM9260_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -968,8 +968,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US1, +- .end = AT91SAM9260_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1011,8 +1011,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US2, +- .end = AT91SAM9260_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1054,8 +1054,8 @@ static struct resource uart3_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US3, +- .end = AT91SAM9260_ID_US3, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1097,8 +1097,8 @@ static struct resource uart4_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US4, +- .end = AT91SAM9260_ID_US4, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1135,8 +1135,8 @@ static struct resource uart5_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9260_ID_US5, +- .end = AT91SAM9260_ID_US5, ++ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, ++ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c +index c77d503..f40762c 100644 +--- a/arch/arm/mach-at91/at91sam9261.c ++++ b/arch/arm/mach-at91/at91sam9261.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + +diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c +index 9295e90..8df5c1b 100644 +--- a/arch/arm/mach-at91/at91sam9261_devices.c ++++ b/arch/arm/mach-at91/at91sam9261_devices.c +@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_UHP, +- .end = AT91SAM9261_ID_UHP, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_UDP, +- .end = AT91SAM9261_ID_UDP, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_MCI, +- .end = AT91SAM9261_ID_MCI, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -310,8 +310,8 @@ static struct resource twi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_TWI, +- .end = AT91SAM9261_ID_TWI, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_SPI0, +- .end = AT91SAM9261_ID_SPI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_SPI1, +- .end = AT91SAM9261_ID_SPI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_LCDC, +- .end = AT91SAM9261_ID_LCDC, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, + #if defined(CONFIG_FB_INTSRAM) +@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_TC0, +- .end = AT91SAM9261_ID_TC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91SAM9261_ID_TC1, +- .end = AT91SAM9261_ID_TC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91SAM9261_ID_TC2, +- .end = AT91SAM9261_ID_TC2, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_SSC0, +- .end = AT91SAM9261_ID_SSC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_SSC1, +- .end = AT91SAM9261_ID_SSC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_SSC2, +- .end = AT91SAM9261_ID_SSC2, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_US0, +- .end = AT91SAM9261_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_US1, +- .end = AT91SAM9261_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9261_ID_US2, +- .end = AT91SAM9261_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c +index ed91c7e..84b3810 100644 +--- a/arch/arm/mach-at91/at91sam9263.c ++++ b/arch/arm/mach-at91/at91sam9263.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + #include + #include + +diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c +index 175e000..eb6bbf8 100644 +--- a/arch/arm/mach-at91/at91sam9263_devices.c ++++ b/arch/arm/mach-at91/at91sam9263_devices.c +@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_UHP, +- .end = AT91SAM9263_ID_UHP, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -104,8 +104,8 @@ static struct resource udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_UDP, +- .end = AT91SAM9263_ID_UDP, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -155,8 +155,8 @@ static struct resource eth_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_EMAC, +- .end = AT91SAM9263_ID_EMAC, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_MCI0, +- .end = AT91SAM9263_ID_MCI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_MCI1, +- .end = AT91SAM9263_ID_MCI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -567,8 +567,8 @@ static struct resource twi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_TWI, +- .end = AT91SAM9263_ID_TWI, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_SPI0, +- .end = AT91SAM9263_ID_SPI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_SPI1, +- .end = AT91SAM9263_ID_SPI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_AC97C, +- .end = AT91SAM9263_ID_AC97C, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -776,8 +776,8 @@ static struct resource can_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_CAN, +- .end = AT91SAM9263_ID_CAN, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_LCDC, +- .end = AT91SAM9263_ID_LCDC, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -883,8 +883,8 @@ struct resource isi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_ISI, +- .end = AT91SAM9263_ID_ISI, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_TCB, +- .end = AT91SAM9263_ID_TCB, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_PWMC, +- .end = AT91SAM9263_ID_PWMC, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_SSC0, +- .end = AT91SAM9263_ID_SSC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_SSC1, +- .end = AT91SAM9263_ID_SSC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_US0, +- .end = AT91SAM9263_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_US1, +- .end = AT91SAM9263_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9263_ID_US2, +- .end = AT91SAM9263_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c +index a94758b..ffc0957 100644 +--- a/arch/arm/mach-at91/at91sam926x_time.c ++++ b/arch/arm/mach-at91/at91sam926x_time.c +@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { + .name = "at91_tick", + .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = at91sam926x_pit_interrupt, +- .irq = AT91_ID_SYS, ++ .irq = NR_IRQS_LEGACY + AT91_ID_SYS, + }; + + static void at91sam926x_pit_reset(void) +diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c +index f205449..55d2959 100644 +--- a/arch/arm/mach-at91/at91sam9g45.c ++++ b/arch/arm/mach-at91/at91sam9g45.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + #include + #include + +diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c +index 35bd42d..7a3f0b3 100644 +--- a/arch/arm/mach-at91/at91sam9g45_devices.c ++++ b/arch/arm/mach-at91/at91sam9g45_devices.c +@@ -50,8 +50,8 @@ static struct resource hdmac_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_DMA, +- .end = AT91SAM9G45_ID_DMA, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -91,8 +91,8 @@ static struct resource usbh_ohci_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_UHPHS, +- .end = AT91SAM9G45_ID_UHPHS, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -153,8 +153,8 @@ static struct resource usbh_ehci_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_UHPHS, +- .end = AT91SAM9G45_ID_UHPHS, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -210,8 +210,8 @@ static struct resource usba_udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [2] = { +- .start = AT91SAM9G45_ID_UDPHS, +- .end = AT91SAM9G45_ID_UDPHS, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -293,8 +293,8 @@ static struct resource eth_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_EMAC, +- .end = AT91SAM9G45_ID_EMAC, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -367,8 +367,8 @@ static struct resource mmc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_MCI0, +- .end = AT91SAM9G45_ID_MCI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -392,8 +392,8 @@ static struct resource mmc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_MCI1, +- .end = AT91SAM9G45_ID_MCI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -643,8 +643,8 @@ static struct resource twi0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_TWI0, +- .end = AT91SAM9G45_ID_TWI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -663,8 +663,8 @@ static struct resource twi1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_TWI1, +- .end = AT91SAM9G45_ID_TWI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -718,8 +718,8 @@ static struct resource spi0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_SPI0, +- .end = AT91SAM9G45_ID_SPI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -744,8 +744,8 @@ static struct resource spi1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_SPI1, +- .end = AT91SAM9G45_ID_SPI1, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -832,8 +832,8 @@ static struct resource ac97_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_AC97C, +- .end = AT91SAM9G45_ID_AC97C, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -885,8 +885,8 @@ struct resource isi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_ISI, +- .end = AT91SAM9G45_ID_ISI, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -977,8 +977,8 @@ static struct resource lcdc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_LCDC, +- .end = AT91SAM9G45_ID_LCDC, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1052,8 +1052,8 @@ static struct resource tcb0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_TCB, +- .end = AT91SAM9G45_ID_TCB, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1073,8 +1073,8 @@ static struct resource tcb1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_TCB, +- .end = AT91SAM9G45_ID_TCB, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1108,8 +1108,8 @@ static struct resource rtc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1145,8 +1145,8 @@ static struct resource tsadcc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_TSC, +- .end = AT91SAM9G45_ID_TSC, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .flags = IORESOURCE_IRQ, + } + }; +@@ -1300,8 +1300,8 @@ static struct resource pwm_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_PWMC, +- .end = AT91SAM9G45_ID_PWMC, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1353,8 +1353,8 @@ static struct resource ssc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_SSC0, +- .end = AT91SAM9G45_ID_SSC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1395,8 +1395,8 @@ static struct resource ssc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_SSC1, +- .end = AT91SAM9G45_ID_SSC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1475,8 +1475,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1513,8 +1513,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_US0, +- .end = AT91SAM9G45_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1556,8 +1556,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_US1, +- .end = AT91SAM9G45_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1599,8 +1599,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_US2, +- .end = AT91SAM9G45_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1642,8 +1642,8 @@ static struct resource uart3_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9G45_ID_US3, +- .end = AT91SAM9G45_ID_US3, ++ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, ++ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c +index e420085..72ce50a 100644 +--- a/arch/arm/mach-at91/at91sam9rl.c ++++ b/arch/arm/mach-at91/at91sam9rl.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + +diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c +index 9c0b148..f09fff9 100644 +--- a/arch/arm/mach-at91/at91sam9rl_devices.c ++++ b/arch/arm/mach-at91/at91sam9rl_devices.c +@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { + .flags = IORESOURCE_MEM, + }, + [2] = { +- .start = AT91SAM9RL_ID_DMA, +- .end = AT91SAM9RL_ID_DMA, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [2] = { +- .start = AT91SAM9RL_ID_UDPHS, +- .end = AT91SAM9RL_ID_UDPHS, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_MCI, +- .end = AT91SAM9RL_ID_MCI, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -339,8 +339,8 @@ static struct resource twi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_TWI0, +- .end = AT91SAM9RL_ID_TWI0, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -383,8 +383,8 @@ static struct resource spi_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_SPI, +- .end = AT91SAM9RL_ID_SPI, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_AC97C, +- .end = AT91SAM9RL_ID_AC97C, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_LCDC, +- .end = AT91SAM9RL_ID_LCDC, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_TC0, +- .end = AT91SAM9RL_ID_TC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, + .flags = IORESOURCE_IRQ, + }, + [2] = { +- .start = AT91SAM9RL_ID_TC1, +- .end = AT91SAM9RL_ID_TC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, + .flags = IORESOURCE_IRQ, + }, + [3] = { +- .start = AT91SAM9RL_ID_TC2, +- .end = AT91SAM9RL_ID_TC2, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_TSC, +- .end = AT91SAM9RL_ID_TSC, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, + .flags = IORESOURCE_IRQ, + } + }; +@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_PWMC, +- .end = AT91SAM9RL_ID_PWMC, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_SSC0, +- .end = AT91SAM9RL_ID_SSC0, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_SSC1, +- .end = AT91SAM9RL_ID_SSC1, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91_ID_SYS, +- .end = AT91_ID_SYS, ++ .start = NR_IRQS_LEGACY + AT91_ID_SYS, ++ .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_US0, +- .end = AT91SAM9RL_ID_US0, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_US1, +- .end = AT91SAM9RL_ID_US1, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_US2, +- .end = AT91SAM9RL_ID_US2, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = AT91SAM9RL_ID_US3, +- .end = AT91SAM9RL_ID_US3, ++ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, ++ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, + .flags = IORESOURCE_IRQ, + }, + }; +diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c +index d62fe09..4c0f5fd 100644 +--- a/arch/arm/mach-at91/at91x40.c ++++ b/arch/arm/mach-at91/at91x40.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include "generic.h" +diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h +index 7867378..fd42a85 100644 +--- a/arch/arm/mach-at91/include/mach/at91_aic.h ++++ b/arch/arm/mach-at91/include/mach/at91_aic.h +@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; + .extern at91_aic_base + #endif + ++/* Number of irq lines managed by AIC */ ++#define NR_AIC_IRQS 32 ++ + #define AT91_AIC_IRQ_MIN_PRIORITY 0 + #define AT91_AIC_IRQ_MAX_PRIORITY 7 + +diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h +index 2d510ee..cab60d5 100644 +--- a/arch/arm/mach-at91/include/mach/irqs.h ++++ b/arch/arm/mach-at91/include/mach/irqs.h +@@ -22,18 +22,6 @@ + #define __ASM_ARCH_IRQS_H + + #include +-#include +- +-#define NR_AIC_IRQS 32 +- +- +-/* +- * IRQ interrupt symbols are the AT91xxx_ID_* symbols +- * for IRQs handled directly through the AIC, or else the AT91_PIN_* +- * symbols in gpio.h for ones handled indirectly as GPIOs. +- * We make provision for 5 banks of GPIO. +- */ +-#define NR_IRQS (NR_AIC_IRQS + (5 * 32)) + + /* FIQ is AIC source 0. */ + #define FIQ_START AT91_ID_FIQ +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index 390d4df..75ca2f4 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -41,6 +41,8 @@ + #include + #include + ++#include ++ + void __iomem *at91_aic_base; + static struct irq_domain *at91_aic_domain; + static struct device_node *at91_aic_np; +@@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) + */ + for (i = 0; i < NR_AIC_IRQS; i++) { + /* Put hardware irq number in Source Vector Register: */ +- at91_aic_write(AT91_AIC_SVR(i), i); ++ at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); + /* Active Low interrupt, with the specified priority */ + at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); + +- irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); ++ irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + +diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c +index 1bfaad6..2c2d865 100644 +--- a/arch/arm/mach-at91/pm.c ++++ b/arch/arm/mach-at91/pm.c +@@ -25,6 +25,7 @@ + #include + #include + ++#include + #include + #include + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0058-ARM-at91-remove-mach-irqs.h.patch b/patches.at91/0058-ARM-at91-remove-mach-irqs.h.patch new file mode 100644 index 000000000000..98e736c421c8 --- /dev/null +++ b/patches.at91/0058-ARM-at91-remove-mach-irqs.h.patch @@ -0,0 +1,55 @@ +From eb023f54611256fb88f23973139adb9c7c0b4c7f Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Thu, 14 Jun 2012 15:41:04 +0200 +Subject: ARM: at91: remove mach/irqs.h + +commit 4c6971a6debb340d487cf6189f15a1332702330f upstream. + +mach/irqs only defines FIQ_START which doesn't appear to be used anywhere +so remove it. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/include/mach/irqs.h | 29 ----------------------------- + 1 file changed, 29 deletions(-) + delete mode 100644 arch/arm/mach-at91/include/mach/irqs.h + +diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h +deleted file mode 100644 +index cab60d5..0000000 +--- a/arch/arm/mach-at91/include/mach/irqs.h ++++ /dev/null +@@ -1,29 +0,0 @@ +-/* +- * arch/arm/mach-at91/include/mach/irqs.h +- * +- * Copyright (C) 2004 SAN People +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +- */ +- +-#ifndef __ASM_ARCH_IRQS_H +-#define __ASM_ARCH_IRQS_H +- +-#include +- +-/* FIQ is AIC source 0. */ +-#define FIQ_START AT91_ID_FIQ +- +-#endif +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0058-ARM-at91-sparse-irq-support.patch b/patches.at91/0058-ARM-at91-sparse-irq-support.patch deleted file mode 100644 index 0947785f2886..000000000000 --- a/patches.at91/0058-ARM-at91-sparse-irq-support.patch +++ /dev/null @@ -1,1578 +0,0 @@ -From 6fdddfc0d9b97a191bf49bb1b180822f156c515c Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Thu, 21 Jun 2012 14:47:27 +0200 -Subject: ARM: at91: sparse irq support - -Enable sparse irq support for multisoc image. It involves to add the -NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY -irq descs are allocated before AIC requests irq descs allocation. -Move NR_AIC_IRQS macro to a more appropiate place with the purpose to -remove mach/irqs.h later. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Nicolas Ferre - -Conflicts: - arch/arm/mach-at91/at91sam9260_devices.c - arch/arm/mach-at91/at91sam9g45_devices.c ---- - arch/arm/mach-at91/Kconfig | 1 + - arch/arm/mach-at91/at91rm9200.c | 1 + - arch/arm/mach-at91/at91rm9200_devices.c | 84 +++++++++++------------ - arch/arm/mach-at91/at91sam9260.c | 1 + - arch/arm/mach-at91/at91sam9260_devices.c | 88 ++++++++++++------------ - arch/arm/mach-at91/at91sam9261.c | 1 + - arch/arm/mach-at91/at91sam9261_devices.c | 68 +++++++++---------- - arch/arm/mach-at91/at91sam9263.c | 1 + - arch/arm/mach-at91/at91sam9263_devices.c | 80 +++++++++++----------- - arch/arm/mach-at91/at91sam926x_time.c | 2 +- - arch/arm/mach-at91/at91sam9g45.c | 1 + - arch/arm/mach-at91/at91sam9g45_devices.c | 104 ++++++++++++++--------------- - arch/arm/mach-at91/at91sam9rl.c | 1 + - arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++++++++++----------- - arch/arm/mach-at91/at91x40.c | 1 + - arch/arm/mach-at91/include/mach/at91_aic.h | 3 + - arch/arm/mach-at91/include/mach/irqs.h | 12 ---- - arch/arm/mach-at91/irq.c | 6 +- - arch/arm/mach-at91/pm.c | 1 + - 19 files changed, 267 insertions(+), 265 deletions(-) - -diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig -index e401dea..7d0c40a 100644 ---- a/arch/arm/mach-at91/Kconfig -+++ b/arch/arm/mach-at91/Kconfig -@@ -30,6 +30,7 @@ config SOC_AT91SAM9 - bool - select CPU_ARM926T - select MULTI_IRQ_HANDLER -+ select SPARSE_IRQ - select AT91_SAM9_TIME - select AT91_SAM9_SMC - -diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c -index d50da1a..801c30b 100644 ---- a/arch/arm/mach-at91/at91rm9200.c -+++ b/arch/arm/mach-at91/at91rm9200.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c -index 99affb5..04d69d3 100644 ---- a/arch/arm/mach-at91/at91rm9200_devices.c -+++ b/arch/arm/mach-at91/at91rm9200_devices.c -@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_UHP, -- .end = AT91RM9200_ID_UHP, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -94,8 +94,8 @@ static struct resource udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_UDP, -- .end = AT91RM9200_ID_UDP, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -145,8 +145,8 @@ static struct resource eth_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_EMAC, -- .end = AT91RM9200_ID_EMAC, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_MCI, -- .end = AT91RM9200_ID_MCI, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -488,8 +488,8 @@ static struct resource twi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_TWI, -- .end = AT91RM9200_ID_TWI, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -532,8 +532,8 @@ static struct resource spi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_SPI, -- .end = AT91RM9200_ID_SPI, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_TC0, -- .end = AT91RM9200_ID_TC0, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91RM9200_ID_TC1, -- .end = AT91RM9200_ID_TC1, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91RM9200_ID_TC2, -- .end = AT91RM9200_ID_TC2, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_TC3, -- .end = AT91RM9200_ID_TC3, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91RM9200_ID_TC4, -- .end = AT91RM9200_ID_TC4, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91RM9200_ID_TC5, -- .end = AT91RM9200_ID_TC5, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_SSC0, -- .end = AT91RM9200_ID_SSC0, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_SSC1, -- .end = AT91RM9200_ID_SSC1, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_SSC2, -- .end = AT91RM9200_ID_SSC2, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_US0, -- .end = AT91RM9200_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_US1, -- .end = AT91RM9200_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_US2, -- .end = AT91RM9200_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91RM9200_ID_US3, -- .end = AT91RM9200_ID_US3, -+ .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, -+ .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c -index a27bbec..c644131 100644 ---- a/arch/arm/mach-at91/at91sam9260.c -+++ b/arch/arm/mach-at91/at91sam9260.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - #include - #include - -diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c -index d556de1..43e60fb 100644 ---- a/arch/arm/mach-at91/at91sam9260_devices.c -+++ b/arch/arm/mach-at91/at91sam9260_devices.c -@@ -42,8 +42,8 @@ static struct resource usbh_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_UHP, -- .end = AT91SAM9260_ID_UHP, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -95,8 +95,8 @@ static struct resource udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_UDP, -- .end = AT91SAM9260_ID_UDP, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -146,8 +146,8 @@ static struct resource eth_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_EMAC, -- .end = AT91SAM9260_ID_EMAC, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -220,8 +220,8 @@ static struct resource mmc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_MCI, -- .end = AT91SAM9260_ID_MCI, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -302,8 +302,8 @@ static struct resource mmc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_MCI, -- .end = AT91SAM9260_ID_MCI, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -493,8 +493,8 @@ static struct resource twi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_TWI, -- .end = AT91SAM9260_ID_TWI, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -537,8 +537,8 @@ static struct resource spi0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_SPI0, -- .end = AT91SAM9260_ID_SPI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -563,8 +563,8 @@ static struct resource spi1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_SPI1, -- .end = AT91SAM9260_ID_SPI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -649,18 +649,18 @@ static struct resource tcb0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_TC0, -- .end = AT91SAM9260_ID_TC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91SAM9260_ID_TC1, -- .end = AT91SAM9260_ID_TC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91SAM9260_ID_TC2, -- .end = AT91SAM9260_ID_TC2, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -679,18 +679,18 @@ static struct resource tcb1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_TC3, -- .end = AT91SAM9260_ID_TC3, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91SAM9260_ID_TC4, -- .end = AT91SAM9260_ID_TC4, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91SAM9260_ID_TC5, -- .end = AT91SAM9260_ID_TC5, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -804,8 +804,8 @@ static struct resource ssc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_SSC, -- .end = AT91SAM9260_ID_SSC, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -879,8 +879,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -917,8 +917,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US0, -- .end = AT91SAM9260_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -968,8 +968,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US1, -- .end = AT91SAM9260_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1011,8 +1011,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US2, -- .end = AT91SAM9260_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1054,8 +1054,8 @@ static struct resource uart3_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US3, -- .end = AT91SAM9260_ID_US3, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1097,8 +1097,8 @@ static struct resource uart4_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US4, -- .end = AT91SAM9260_ID_US4, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1135,8 +1135,8 @@ static struct resource uart5_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9260_ID_US5, -- .end = AT91SAM9260_ID_US5, -+ .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, -+ .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c -index c77d503..f40762c 100644 ---- a/arch/arm/mach-at91/at91sam9261.c -+++ b/arch/arm/mach-at91/at91sam9261.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - -diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c -index 9295e90..8df5c1b 100644 ---- a/arch/arm/mach-at91/at91sam9261_devices.c -+++ b/arch/arm/mach-at91/at91sam9261_devices.c -@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_UHP, -- .end = AT91SAM9261_ID_UHP, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_UDP, -- .end = AT91SAM9261_ID_UDP, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_MCI, -- .end = AT91SAM9261_ID_MCI, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -310,8 +310,8 @@ static struct resource twi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_TWI, -- .end = AT91SAM9261_ID_TWI, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_SPI0, -- .end = AT91SAM9261_ID_SPI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_SPI1, -- .end = AT91SAM9261_ID_SPI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_LCDC, -- .end = AT91SAM9261_ID_LCDC, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, - .flags = IORESOURCE_IRQ, - }, - #if defined(CONFIG_FB_INTSRAM) -@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_TC0, -- .end = AT91SAM9261_ID_TC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91SAM9261_ID_TC1, -- .end = AT91SAM9261_ID_TC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91SAM9261_ID_TC2, -- .end = AT91SAM9261_ID_TC2, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_SSC0, -- .end = AT91SAM9261_ID_SSC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_SSC1, -- .end = AT91SAM9261_ID_SSC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_SSC2, -- .end = AT91SAM9261_ID_SSC2, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_US0, -- .end = AT91SAM9261_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_US1, -- .end = AT91SAM9261_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9261_ID_US2, -- .end = AT91SAM9261_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c -index ed91c7e..84b3810 100644 ---- a/arch/arm/mach-at91/at91sam9263.c -+++ b/arch/arm/mach-at91/at91sam9263.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include - #include - -diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c -index 175e000..eb6bbf8 100644 ---- a/arch/arm/mach-at91/at91sam9263_devices.c -+++ b/arch/arm/mach-at91/at91sam9263_devices.c -@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_UHP, -- .end = AT91SAM9263_ID_UHP, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -104,8 +104,8 @@ static struct resource udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_UDP, -- .end = AT91SAM9263_ID_UDP, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -155,8 +155,8 @@ static struct resource eth_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_EMAC, -- .end = AT91SAM9263_ID_EMAC, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_MCI0, -- .end = AT91SAM9263_ID_MCI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_MCI1, -- .end = AT91SAM9263_ID_MCI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -567,8 +567,8 @@ static struct resource twi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_TWI, -- .end = AT91SAM9263_ID_TWI, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_SPI0, -- .end = AT91SAM9263_ID_SPI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_SPI1, -- .end = AT91SAM9263_ID_SPI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_AC97C, -- .end = AT91SAM9263_ID_AC97C, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -776,8 +776,8 @@ static struct resource can_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_CAN, -- .end = AT91SAM9263_ID_CAN, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_LCDC, -- .end = AT91SAM9263_ID_LCDC, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -883,8 +883,8 @@ struct resource isi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_ISI, -- .end = AT91SAM9263_ID_ISI, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_TCB, -- .end = AT91SAM9263_ID_TCB, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_PWMC, -- .end = AT91SAM9263_ID_PWMC, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_SSC0, -- .end = AT91SAM9263_ID_SSC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_SSC1, -- .end = AT91SAM9263_ID_SSC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_US0, -- .end = AT91SAM9263_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_US1, -- .end = AT91SAM9263_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9263_ID_US2, -- .end = AT91SAM9263_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c -index a94758b..ffc0957 100644 ---- a/arch/arm/mach-at91/at91sam926x_time.c -+++ b/arch/arm/mach-at91/at91sam926x_time.c -@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { - .name = "at91_tick", - .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = at91sam926x_pit_interrupt, -- .irq = AT91_ID_SYS, -+ .irq = NR_IRQS_LEGACY + AT91_ID_SYS, - }; - - static void at91sam926x_pit_reset(void) -diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c -index f205449..55d2959 100644 ---- a/arch/arm/mach-at91/at91sam9g45.c -+++ b/arch/arm/mach-at91/at91sam9g45.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include - #include - -diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c -index 35bd42d..7a3f0b3 100644 ---- a/arch/arm/mach-at91/at91sam9g45_devices.c -+++ b/arch/arm/mach-at91/at91sam9g45_devices.c -@@ -50,8 +50,8 @@ static struct resource hdmac_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_DMA, -- .end = AT91SAM9G45_ID_DMA, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -91,8 +91,8 @@ static struct resource usbh_ohci_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_UHPHS, -- .end = AT91SAM9G45_ID_UHPHS, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -153,8 +153,8 @@ static struct resource usbh_ehci_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_UHPHS, -- .end = AT91SAM9G45_ID_UHPHS, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -210,8 +210,8 @@ static struct resource usba_udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [2] = { -- .start = AT91SAM9G45_ID_UDPHS, -- .end = AT91SAM9G45_ID_UDPHS, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -293,8 +293,8 @@ static struct resource eth_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_EMAC, -- .end = AT91SAM9G45_ID_EMAC, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -367,8 +367,8 @@ static struct resource mmc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_MCI0, -- .end = AT91SAM9G45_ID_MCI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -392,8 +392,8 @@ static struct resource mmc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_MCI1, -- .end = AT91SAM9G45_ID_MCI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -643,8 +643,8 @@ static struct resource twi0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_TWI0, -- .end = AT91SAM9G45_ID_TWI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -663,8 +663,8 @@ static struct resource twi1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_TWI1, -- .end = AT91SAM9G45_ID_TWI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -718,8 +718,8 @@ static struct resource spi0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_SPI0, -- .end = AT91SAM9G45_ID_SPI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -744,8 +744,8 @@ static struct resource spi1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_SPI1, -- .end = AT91SAM9G45_ID_SPI1, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -832,8 +832,8 @@ static struct resource ac97_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_AC97C, -- .end = AT91SAM9G45_ID_AC97C, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -885,8 +885,8 @@ struct resource isi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_ISI, -- .end = AT91SAM9G45_ID_ISI, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -977,8 +977,8 @@ static struct resource lcdc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_LCDC, -- .end = AT91SAM9G45_ID_LCDC, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1052,8 +1052,8 @@ static struct resource tcb0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_TCB, -- .end = AT91SAM9G45_ID_TCB, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1073,8 +1073,8 @@ static struct resource tcb1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_TCB, -- .end = AT91SAM9G45_ID_TCB, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1108,8 +1108,8 @@ static struct resource rtc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1145,8 +1145,8 @@ static struct resource tsadcc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_TSC, -- .end = AT91SAM9G45_ID_TSC, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, - .flags = IORESOURCE_IRQ, - } - }; -@@ -1300,8 +1300,8 @@ static struct resource pwm_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_PWMC, -- .end = AT91SAM9G45_ID_PWMC, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1353,8 +1353,8 @@ static struct resource ssc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_SSC0, -- .end = AT91SAM9G45_ID_SSC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1395,8 +1395,8 @@ static struct resource ssc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_SSC1, -- .end = AT91SAM9G45_ID_SSC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1475,8 +1475,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1513,8 +1513,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_US0, -- .end = AT91SAM9G45_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1556,8 +1556,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_US1, -- .end = AT91SAM9G45_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1599,8 +1599,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_US2, -- .end = AT91SAM9G45_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1642,8 +1642,8 @@ static struct resource uart3_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9G45_ID_US3, -- .end = AT91SAM9G45_ID_US3, -+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, -+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c -index e420085..72ce50a 100644 ---- a/arch/arm/mach-at91/at91sam9rl.c -+++ b/arch/arm/mach-at91/at91sam9rl.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - -diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c -index 9c0b148..f09fff9 100644 ---- a/arch/arm/mach-at91/at91sam9rl_devices.c -+++ b/arch/arm/mach-at91/at91sam9rl_devices.c -@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { - .flags = IORESOURCE_MEM, - }, - [2] = { -- .start = AT91SAM9RL_ID_DMA, -- .end = AT91SAM9RL_ID_DMA, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [2] = { -- .start = AT91SAM9RL_ID_UDPHS, -- .end = AT91SAM9RL_ID_UDPHS, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_MCI, -- .end = AT91SAM9RL_ID_MCI, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -339,8 +339,8 @@ static struct resource twi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_TWI0, -- .end = AT91SAM9RL_ID_TWI0, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -383,8 +383,8 @@ static struct resource spi_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_SPI, -- .end = AT91SAM9RL_ID_SPI, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_AC97C, -- .end = AT91SAM9RL_ID_AC97C, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_LCDC, -- .end = AT91SAM9RL_ID_LCDC, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_TC0, -- .end = AT91SAM9RL_ID_TC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, - .flags = IORESOURCE_IRQ, - }, - [2] = { -- .start = AT91SAM9RL_ID_TC1, -- .end = AT91SAM9RL_ID_TC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, - .flags = IORESOURCE_IRQ, - }, - [3] = { -- .start = AT91SAM9RL_ID_TC2, -- .end = AT91SAM9RL_ID_TC2, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_TSC, -- .end = AT91SAM9RL_ID_TSC, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, - .flags = IORESOURCE_IRQ, - } - }; -@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_PWMC, -- .end = AT91SAM9RL_ID_PWMC, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_SSC0, -- .end = AT91SAM9RL_ID_SSC0, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_SSC1, -- .end = AT91SAM9RL_ID_SSC1, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -+ .start = NR_IRQS_LEGACY + AT91_ID_SYS, -+ .end = NR_IRQS_LEGACY + AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_US0, -- .end = AT91SAM9RL_ID_US0, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_US1, -- .end = AT91SAM9RL_ID_US1, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_US2, -- .end = AT91SAM9RL_ID_US2, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, - .flags = IORESOURCE_IRQ, - }, - }; -@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { - .flags = IORESOURCE_MEM, - }, - [1] = { -- .start = AT91SAM9RL_ID_US3, -- .end = AT91SAM9RL_ID_US3, -+ .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, -+ .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, - .flags = IORESOURCE_IRQ, - }, - }; -diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c -index d62fe09..4c0f5fd 100644 ---- a/arch/arm/mach-at91/at91x40.c -+++ b/arch/arm/mach-at91/at91x40.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - #include - #include "generic.h" -diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h -index 7867378..fd42a85 100644 ---- a/arch/arm/mach-at91/include/mach/at91_aic.h -+++ b/arch/arm/mach-at91/include/mach/at91_aic.h -@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; - .extern at91_aic_base - #endif - -+/* Number of irq lines managed by AIC */ -+#define NR_AIC_IRQS 32 -+ - #define AT91_AIC_IRQ_MIN_PRIORITY 0 - #define AT91_AIC_IRQ_MAX_PRIORITY 7 - -diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h -index 2d510ee..cab60d5 100644 ---- a/arch/arm/mach-at91/include/mach/irqs.h -+++ b/arch/arm/mach-at91/include/mach/irqs.h -@@ -22,18 +22,6 @@ - #define __ASM_ARCH_IRQS_H - - #include --#include -- --#define NR_AIC_IRQS 32 -- -- --/* -- * IRQ interrupt symbols are the AT91xxx_ID_* symbols -- * for IRQs handled directly through the AIC, or else the AT91_PIN_* -- * symbols in gpio.h for ones handled indirectly as GPIOs. -- * We make provision for 5 banks of GPIO. -- */ --#define NR_IRQS (NR_AIC_IRQS + (5 * 32)) - - /* FIQ is AIC source 0. */ - #define FIQ_START AT91_ID_FIQ -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index 390d4df..75ca2f4 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -41,6 +41,8 @@ - #include - #include - -+#include -+ - void __iomem *at91_aic_base; - static struct irq_domain *at91_aic_domain; - static struct device_node *at91_aic_np; -@@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) - */ - for (i = 0; i < NR_AIC_IRQS; i++) { - /* Put hardware irq number in Source Vector Register: */ -- at91_aic_write(AT91_AIC_SVR(i), i); -+ at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); - /* Active Low interrupt, with the specified priority */ - at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - -- irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); -+ irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - -diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c -index 1bfaad6..2c2d865 100644 ---- a/arch/arm/mach-at91/pm.c -+++ b/arch/arm/mach-at91/pm.c -@@ -25,6 +25,7 @@ - #include - #include - -+#include - #include - #include - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0059-ARM-at91-add-AIC5-support.patch b/patches.at91/0059-ARM-at91-add-AIC5-support.patch new file mode 100644 index 000000000000..3b9623fc3537 --- /dev/null +++ b/patches.at91/0059-ARM-at91-add-AIC5-support.patch @@ -0,0 +1,608 @@ +From 908da403154b9fc68fdefdca20cc4049cd13c7b9 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Wed, 30 May 2012 10:01:09 +0200 +Subject: ARM: at91: add AIC5 support + +commit c4b68520dc0ec96153bc0d87bca5ffba508edfcf upstream. + +The number of lines of AIC5 has increased from 32 to 128. Due to this +increase, a source select register has been introduced for the interrupt +line selection. Moreover, register mapping has been changed. For that reasons, +we need some dedicated callbacks for AIC5. +Power management is also concerned by these changes. On suspend, we can't get +the whole interrupt mask register as before, we have to read this register 128 +times. To reduce this overhead, a snapshot of the whole IMR is maintained. + +Signed-off-by: Ludovic Desroches +Signed-off-by: Nicolas Ferre +--- + arch/arm/mach-at91/generic.h | 2 + + arch/arm/mach-at91/include/mach/at91_aic.h | 26 +++ + arch/arm/mach-at91/irq.c | 343 ++++++++++++++++++++++++----- + 3 files changed, 314 insertions(+), 57 deletions(-) + +diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h +index 0a60bf8..f496506 100644 +--- a/arch/arm/mach-at91/generic.h ++++ b/arch/arm/mach-at91/generic.h +@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]); + extern void __init at91_aic_init(unsigned int priority[]); + extern int __init at91_aic_of_init(struct device_node *node, + struct device_node *parent); ++extern int __init at91_aic5_of_init(struct device_node *node, ++ struct device_node *parent); + + + /* Timer */ +diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h +index fd42a85..eaea661 100644 +--- a/arch/arm/mach-at91/include/mach/at91_aic.h ++++ b/arch/arm/mach-at91/include/mach/at91_aic.h +@@ -30,11 +30,16 @@ extern void __iomem *at91_aic_base; + + /* Number of irq lines managed by AIC */ + #define NR_AIC_IRQS 32 ++#define NR_AIC5_IRQS 128 ++ ++#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */ ++#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */ + + #define AT91_AIC_IRQ_MIN_PRIORITY 0 + #define AT91_AIC_IRQ_MAX_PRIORITY 7 + + #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ ++#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */ + #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ + #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ + #define AT91_AIC_SRCTYPE_LOW (0 << 5) +@@ -43,31 +48,52 @@ extern void __iomem *at91_aic_base; + #define AT91_AIC_SRCTYPE_RISING (3 << 5) + + #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ ++#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */ + #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ ++#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */ + #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ ++#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */ + #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ ++#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */ + #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ + + #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ ++#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */ ++#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */ ++#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */ ++#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */ + #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ ++#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */ + #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ ++#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */ + #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ + #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ + + #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ ++#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */ + #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ ++#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */ + #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ ++#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */ + #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ ++#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */ + #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ ++#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */ + #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ ++#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */ + #define AT91_AIC_DCR 0x138 /* Debug Control Register */ ++#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */ + #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ + #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ + + #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ ++#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */ + #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ ++#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */ + #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ ++#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */ + + void at91_aic_handle_irq(struct pt_regs *regs); ++void at91_aic5_handle_irq(struct pt_regs *regs); + + #endif +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index 75ca2f4..c5eaaa0 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -46,9 +47,116 @@ + void __iomem *at91_aic_base; + static struct irq_domain *at91_aic_domain; + static struct device_node *at91_aic_np; ++static unsigned int n_irqs = NR_AIC_IRQS; ++static unsigned long at91_aic_caps = 0; + static unsigned int *at91_aic_irq_priorities; + +-asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) ++/* AIC5 introduces a Source Select Register */ ++#define AT91_AIC_CAP_AIC5 (1 << 0) ++#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) ++ ++#ifdef CONFIG_PM ++ ++static unsigned long *wakeups; ++static unsigned long *backups; ++ ++#define set_backup(bit) set_bit(bit, backups) ++#define clear_backup(bit) clear_bit(bit, backups) ++ ++static int at91_aic_pm_init(void) ++{ ++ backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); ++ if (!backups) ++ return -ENOMEM; ++ ++ wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); ++ if (!wakeups) { ++ kfree(backups); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static int at91_aic_set_wake(struct irq_data *d, unsigned value) ++{ ++ if (unlikely(d->hwirq >= n_irqs)) ++ return -EINVAL; ++ ++ if (value) ++ set_bit(d->hwirq, wakeups); ++ else ++ clear_bit(d->hwirq, wakeups); ++ ++ return 0; ++} ++ ++void at91_irq_suspend(void) ++{ ++ int i = 0, bit; ++ ++ if (has_aic5()) { ++ /* disable enabled irqs */ ++ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { ++ at91_aic_write(AT91_AIC5_SSR, ++ bit & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IDCR, 1); ++ i = bit; ++ } ++ /* enable wakeup irqs */ ++ i = 0; ++ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { ++ at91_aic_write(AT91_AIC5_SSR, ++ bit & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IECR, 1); ++ i = bit; ++ } ++ } else { ++ at91_aic_write(AT91_AIC_IDCR, *backups); ++ at91_aic_write(AT91_AIC_IECR, *wakeups); ++ } ++} ++ ++void at91_irq_resume(void) ++{ ++ int i = 0, bit; ++ ++ if (has_aic5()) { ++ /* disable wakeup irqs */ ++ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { ++ at91_aic_write(AT91_AIC5_SSR, ++ bit & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IDCR, 1); ++ i = bit; ++ } ++ /* enable irqs disabled for suspend */ ++ i = 0; ++ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { ++ at91_aic_write(AT91_AIC5_SSR, ++ bit & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IECR, 1); ++ i = bit; ++ } ++ } else { ++ at91_aic_write(AT91_AIC_IDCR, *wakeups); ++ at91_aic_write(AT91_AIC_IECR, *backups); ++ } ++} ++ ++#else ++static inline int at91_aic_pm_init(void) ++{ ++ return 0; ++} ++ ++#define set_backup(bit) ++#define clear_backup(bit) ++#define at91_aic_set_wake NULL ++ ++#endif /* CONFIG_PM */ ++ ++asmlinkage void __exception_irq_entry ++at91_aic_handle_irq(struct pt_regs *regs) + { + u32 irqnr; + u32 irqstat; +@@ -66,16 +174,53 @@ asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) + handle_IRQ(irqnr, regs); + } + ++asmlinkage void __exception_irq_entry ++at91_aic5_handle_irq(struct pt_regs *regs) ++{ ++ u32 irqnr; ++ u32 irqstat; ++ ++ irqnr = at91_aic_read(AT91_AIC5_IVR); ++ irqstat = at91_aic_read(AT91_AIC5_ISR); ++ ++ if (!irqstat) ++ at91_aic_write(AT91_AIC5_EOICR, 0); ++ else ++ handle_IRQ(irqnr, regs); ++} ++ + static void at91_aic_mask_irq(struct irq_data *d) + { + /* Disable interrupt on AIC */ + at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); ++ /* Update ISR cache */ ++ clear_backup(d->hwirq); ++} ++ ++static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) ++{ ++ /* Disable interrupt on AIC5 */ ++ at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IDCR, 1); ++ /* Update ISR cache */ ++ clear_backup(d->hwirq); + } + + static void at91_aic_unmask_irq(struct irq_data *d) + { + /* Enable interrupt on AIC */ + at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); ++ /* Update ISR cache */ ++ set_backup(d->hwirq); ++} ++ ++static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) ++{ ++ /* Enable interrupt on AIC5 */ ++ at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IECR, 1); ++ /* Update ISR cache */ ++ set_backup(d->hwirq); + } + + static void at91_aic_eoi(struct irq_data *d) +@@ -87,13 +232,18 @@ static void at91_aic_eoi(struct irq_data *d) + at91_aic_write(AT91_AIC_EOICR, 0); + } + +-unsigned int at91_extern_irq; ++static void __maybe_unused at91_aic5_eoi(struct irq_data *d) ++{ ++ at91_aic_write(AT91_AIC5_EOICR, 0); ++} + +-#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) ++unsigned long *at91_extern_irq; + +-static int at91_aic_set_type(struct irq_data *d, unsigned type) ++#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) ++ ++static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) + { +- unsigned int smr, srctype; ++ int srctype; + + switch (type) { + case IRQ_TYPE_LEVEL_HIGH: +@@ -106,58 +256,44 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) + if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ + srctype = AT91_AIC_SRCTYPE_LOW; + else +- return -EINVAL; ++ srctype = -EINVAL; + break; + case IRQ_TYPE_EDGE_FALLING: + if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ + srctype = AT91_AIC_SRCTYPE_FALLING; + else +- return -EINVAL; ++ srctype = -EINVAL; + break; + default: +- return -EINVAL; ++ srctype = -EINVAL; + } + +- smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; +- at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); +- return 0; ++ return srctype; + } + +-#ifdef CONFIG_PM +- +-static u32 wakeups; +-static u32 backups; +- +-static int at91_aic_set_wake(struct irq_data *d, unsigned value) ++static int at91_aic_set_type(struct irq_data *d, unsigned type) + { +- if (unlikely(d->hwirq >= NR_AIC_IRQS)) +- return -EINVAL; +- +- if (value) +- wakeups |= (1 << d->hwirq); +- else +- wakeups &= ~(1 << d->hwirq); ++ unsigned int smr; ++ int srctype; ++ ++ srctype = at91_aic_compute_srctype(d, type); ++ if (srctype < 0) ++ return srctype; ++ ++ if (has_aic5()) { ++ at91_aic_write(AT91_AIC5_SSR, ++ d->hwirq & AT91_AIC5_INTSEL_MSK); ++ smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; ++ at91_aic_write(AT91_AIC5_SMR, smr | srctype); ++ } else { ++ smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) ++ & ~AT91_AIC_SRCTYPE; ++ at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); ++ } + + return 0; + } + +-void at91_irq_suspend(void) +-{ +- backups = at91_aic_read(AT91_AIC_IMR); +- at91_aic_write(AT91_AIC_IDCR, backups); +- at91_aic_write(AT91_AIC_IECR, wakeups); +-} +- +-void at91_irq_resume(void) +-{ +- at91_aic_write(AT91_AIC_IDCR, wakeups); +- at91_aic_write(AT91_AIC_IECR, backups); +-} +- +-#else +-#define at91_aic_set_wake NULL +-#endif +- + static struct irq_chip at91_aic_chip = { + .name = "AIC", + .irq_mask = at91_aic_mask_irq, +@@ -193,6 +329,35 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) + at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); + } + ++static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) ++{ ++ int i; ++ ++ /* ++ * Perform 8 End Of Interrupt Command to make sure AIC ++ * will not Lock out nIRQ ++ */ ++ for (i = 0; i < 8; i++) ++ at91_aic_write(AT91_AIC5_EOICR, 0); ++ ++ /* ++ * Spurious Interrupt ID in Spurious Vector Register. ++ * When there is no current interrupt, the IRQ Vector Register ++ * reads the value stored in AIC_SPU ++ */ ++ at91_aic_write(AT91_AIC5_SPU, spu_vector); ++ ++ /* No debugging in AIC: Debug (Protect) Control Register */ ++ at91_aic_write(AT91_AIC5_DCR, 0); ++ ++ /* Disable and clear all interrupts initially */ ++ for (i = 0; i < n_irqs; i++) { ++ at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); ++ at91_aic_write(AT91_AIC5_IDCR, 1); ++ at91_aic_write(AT91_AIC5_ICCR, 1); ++ } ++} ++ + #if defined(CONFIG_OF) + static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +@@ -210,13 +375,31 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + return 0; + } + ++static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, ++ irq_hw_number_t hw) ++{ ++ at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); ++ ++ /* Put virq number in Source Vector Register */ ++ at91_aic_write(AT91_AIC5_SVR, virq); ++ ++ /* Active Low interrupt, with priority */ ++ at91_aic_write(AT91_AIC5_SMR, ++ AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); ++ ++ irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); ++ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); ++ ++ return 0; ++} ++ + static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, + const u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_type) + { + if (WARN_ON(intsize < 3)) + return -EINVAL; +- if (WARN_ON(intspec[0] >= NR_AIC_IRQS)) ++ if (WARN_ON(intspec[0] >= n_irqs)) + return -EINVAL; + if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) + || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) +@@ -234,14 +417,24 @@ static struct irq_domain_ops at91_aic_irq_ops = { + .xlate = at91_aic_irq_domain_xlate, + }; + +-int __init at91_aic_of_init(struct device_node *node, +- struct device_node *parent) ++int __init at91_aic_of_common_init(struct device_node *node, ++ struct device_node *parent) + { + struct property *prop; + const __be32 *p; + u32 val; + +- at91_aic_irq_priorities = kzalloc(NR_AIC_IRQS ++ at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) ++ * sizeof(*at91_extern_irq), GFP_KERNEL); ++ if (!at91_extern_irq) ++ return -ENOMEM; ++ ++ if (at91_aic_pm_init()) { ++ kfree(at91_extern_irq); ++ return -ENOMEM; ++ } ++ ++ at91_aic_irq_priorities = kzalloc(n_irqs + * sizeof(*at91_aic_irq_priorities), + GFP_KERNEL); + if (!at91_aic_irq_priorities) +@@ -250,22 +443,56 @@ int __init at91_aic_of_init(struct device_node *node, + at91_aic_base = of_iomap(node, 0); + at91_aic_np = node; + +- at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, ++ at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, + &at91_aic_irq_ops, NULL); + if (!at91_aic_domain) + panic("Unable to add AIC irq domain (DT)\n"); + +- at91_extern_irq = 0; + of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { +- if (val > 31) +- pr_warn("AIC: external irq %d > 31 skip it\n", val); ++ if (val >= n_irqs) ++ pr_warn("AIC: external irq %d >= %d skip it\n", ++ val, n_irqs); + else +- at91_extern_irq |= (1 << val); ++ set_bit(val, at91_extern_irq); + } + + irq_set_default_host(at91_aic_domain); + +- at91_aic_hw_init(NR_AIC_IRQS); ++ return 0; ++} ++ ++int __init at91_aic_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int err; ++ ++ err = at91_aic_of_common_init(node, parent); ++ if (err) ++ return err; ++ ++ at91_aic_hw_init(n_irqs); ++ ++ return 0; ++} ++ ++int __init at91_aic5_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int err; ++ ++ at91_aic_caps |= AT91_AIC_CAP_AIC5; ++ n_irqs = NR_AIC5_IRQS; ++ at91_aic_chip.irq_ack = at91_aic5_mask_irq; ++ at91_aic_chip.irq_mask = at91_aic5_mask_irq; ++ at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; ++ at91_aic_chip.irq_eoi = at91_aic5_eoi; ++ at91_aic_irq_ops.map = at91_aic5_irq_map; ++ ++ err = at91_aic_of_common_init(node, parent); ++ if (err) ++ return err; ++ ++ at91_aic5_hw_init(n_irqs); + + return 0; + } +@@ -274,22 +501,25 @@ int __init at91_aic_of_init(struct device_node *node, + /* + * Initialize the AIC interrupt controller. + */ +-void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) ++void __init at91_aic_init(unsigned int *priority) + { + unsigned int i; + int irq_base; + ++ if (at91_aic_pm_init()) ++ panic("Unable to allocate bit maps\n"); ++ + at91_aic_base = ioremap(AT91_AIC, 512); + if (!at91_aic_base) + panic("Unable to ioremap AIC registers\n"); + + /* Add irq domain for AIC */ +- irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); ++ irq_base = irq_alloc_descs(-1, 0, n_irqs, 0); + if (irq_base < 0) { + WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); + irq_base = 0; + } +- at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, ++ at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs, + irq_base, 0, + &irq_domain_simple_ops, NULL); + +@@ -302,15 +532,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) + * The IVR is used by macro get_irqnr_and_base to read and verify. + * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. + */ +- for (i = 0; i < NR_AIC_IRQS; i++) { ++ for (i = 0; i < n_irqs; i++) { + /* Put hardware irq number in Source Vector Register: */ + at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); + /* Active Low interrupt, with the specified priority */ + at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); +- + irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + +- at91_aic_hw_init(NR_AIC_IRQS); ++ at91_aic_hw_init(n_irqs); + } +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0059-ARM-at91-remove-mach-irqs.h.patch b/patches.at91/0059-ARM-at91-remove-mach-irqs.h.patch deleted file mode 100644 index 17aa40e9ef30..000000000000 --- a/patches.at91/0059-ARM-at91-remove-mach-irqs.h.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 45fba6f03c7b2ec9fd1b0d37715c6e8b9ebb3a4d Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Thu, 14 Jun 2012 15:41:04 +0200 -Subject: ARM: at91: remove mach/irqs.h - -mach/irqs only defines FIQ_START which doesn't appear to be used anywhere -so remove it. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/include/mach/irqs.h | 29 ----------------------------- - 1 file changed, 29 deletions(-) - delete mode 100644 arch/arm/mach-at91/include/mach/irqs.h - -diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h -deleted file mode 100644 -index cab60d5..0000000 ---- a/arch/arm/mach-at91/include/mach/irqs.h -+++ /dev/null -@@ -1,29 +0,0 @@ --/* -- * arch/arm/mach-at91/include/mach/irqs.h -- * -- * Copyright (C) 2004 SAN People -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -- */ -- --#ifndef __ASM_ARCH_IRQS_H --#define __ASM_ARCH_IRQS_H -- --#include -- --/* FIQ is AIC source 0. */ --#define FIQ_START AT91_ID_FIQ -- --#endif --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0060-ARM-at91-add-AIC5-support.patch b/patches.at91/0060-ARM-at91-add-AIC5-support.patch deleted file mode 100644 index feaacd1db0f4..000000000000 --- a/patches.at91/0060-ARM-at91-add-AIC5-support.patch +++ /dev/null @@ -1,606 +0,0 @@ -From 2ab4fd505a722e59d1a7b02d4b8fe5a89bc2f761 Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Wed, 30 May 2012 10:01:09 +0200 -Subject: ARM: at91: add AIC5 support - -The number of lines of AIC5 has increased from 32 to 128. Due to this -increase, a source select register has been introduced for the interrupt -line selection. Moreover, register mapping has been changed. For that reasons, -we need some dedicated callbacks for AIC5. -Power management is also concerned by these changes. On suspend, we can't get -the whole interrupt mask register as before, we have to read this register 128 -times. To reduce this overhead, a snapshot of the whole IMR is maintained. - -Signed-off-by: Ludovic Desroches -Signed-off-by: Nicolas Ferre ---- - arch/arm/mach-at91/generic.h | 2 + - arch/arm/mach-at91/include/mach/at91_aic.h | 26 +++ - arch/arm/mach-at91/irq.c | 343 ++++++++++++++++++++++++----- - 3 files changed, 314 insertions(+), 57 deletions(-) - -diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h -index 0a60bf8..f496506 100644 ---- a/arch/arm/mach-at91/generic.h -+++ b/arch/arm/mach-at91/generic.h -@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]); - extern void __init at91_aic_init(unsigned int priority[]); - extern int __init at91_aic_of_init(struct device_node *node, - struct device_node *parent); -+extern int __init at91_aic5_of_init(struct device_node *node, -+ struct device_node *parent); - - - /* Timer */ -diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h -index fd42a85..eaea661 100644 ---- a/arch/arm/mach-at91/include/mach/at91_aic.h -+++ b/arch/arm/mach-at91/include/mach/at91_aic.h -@@ -30,11 +30,16 @@ extern void __iomem *at91_aic_base; - - /* Number of irq lines managed by AIC */ - #define NR_AIC_IRQS 32 -+#define NR_AIC5_IRQS 128 -+ -+#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */ -+#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */ - - #define AT91_AIC_IRQ_MIN_PRIORITY 0 - #define AT91_AIC_IRQ_MAX_PRIORITY 7 - - #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ -+#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */ - #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ - #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ - #define AT91_AIC_SRCTYPE_LOW (0 << 5) -@@ -43,31 +48,52 @@ extern void __iomem *at91_aic_base; - #define AT91_AIC_SRCTYPE_RISING (3 << 5) - - #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -+#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */ - #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ -+#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */ - #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ -+#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */ - #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ -+#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */ - #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ - - #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ -+#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */ -+#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */ -+#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */ -+#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */ - #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ -+#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */ - #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ -+#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */ - #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ - #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ - - #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ -+#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */ - #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ -+#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */ - #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ -+#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */ - #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ -+#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */ - #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ -+#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */ - #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ -+#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */ - #define AT91_AIC_DCR 0x138 /* Debug Control Register */ -+#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */ - #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ - #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ - - #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ -+#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */ - #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ -+#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */ - #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ -+#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */ - - void at91_aic_handle_irq(struct pt_regs *regs); -+void at91_aic5_handle_irq(struct pt_regs *regs); - - #endif -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index 75ca2f4..c5eaaa0 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -46,9 +47,116 @@ - void __iomem *at91_aic_base; - static struct irq_domain *at91_aic_domain; - static struct device_node *at91_aic_np; -+static unsigned int n_irqs = NR_AIC_IRQS; -+static unsigned long at91_aic_caps = 0; - static unsigned int *at91_aic_irq_priorities; - --asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) -+/* AIC5 introduces a Source Select Register */ -+#define AT91_AIC_CAP_AIC5 (1 << 0) -+#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) -+ -+#ifdef CONFIG_PM -+ -+static unsigned long *wakeups; -+static unsigned long *backups; -+ -+#define set_backup(bit) set_bit(bit, backups) -+#define clear_backup(bit) clear_bit(bit, backups) -+ -+static int at91_aic_pm_init(void) -+{ -+ backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); -+ if (!backups) -+ return -ENOMEM; -+ -+ wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); -+ if (!wakeups) { -+ kfree(backups); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+static int at91_aic_set_wake(struct irq_data *d, unsigned value) -+{ -+ if (unlikely(d->hwirq >= n_irqs)) -+ return -EINVAL; -+ -+ if (value) -+ set_bit(d->hwirq, wakeups); -+ else -+ clear_bit(d->hwirq, wakeups); -+ -+ return 0; -+} -+ -+void at91_irq_suspend(void) -+{ -+ int i = 0, bit; -+ -+ if (has_aic5()) { -+ /* disable enabled irqs */ -+ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { -+ at91_aic_write(AT91_AIC5_SSR, -+ bit & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IDCR, 1); -+ i = bit; -+ } -+ /* enable wakeup irqs */ -+ i = 0; -+ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { -+ at91_aic_write(AT91_AIC5_SSR, -+ bit & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IECR, 1); -+ i = bit; -+ } -+ } else { -+ at91_aic_write(AT91_AIC_IDCR, *backups); -+ at91_aic_write(AT91_AIC_IECR, *wakeups); -+ } -+} -+ -+void at91_irq_resume(void) -+{ -+ int i = 0, bit; -+ -+ if (has_aic5()) { -+ /* disable wakeup irqs */ -+ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { -+ at91_aic_write(AT91_AIC5_SSR, -+ bit & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IDCR, 1); -+ i = bit; -+ } -+ /* enable irqs disabled for suspend */ -+ i = 0; -+ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { -+ at91_aic_write(AT91_AIC5_SSR, -+ bit & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IECR, 1); -+ i = bit; -+ } -+ } else { -+ at91_aic_write(AT91_AIC_IDCR, *wakeups); -+ at91_aic_write(AT91_AIC_IECR, *backups); -+ } -+} -+ -+#else -+static inline int at91_aic_pm_init(void) -+{ -+ return 0; -+} -+ -+#define set_backup(bit) -+#define clear_backup(bit) -+#define at91_aic_set_wake NULL -+ -+#endif /* CONFIG_PM */ -+ -+asmlinkage void __exception_irq_entry -+at91_aic_handle_irq(struct pt_regs *regs) - { - u32 irqnr; - u32 irqstat; -@@ -66,16 +174,53 @@ asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) - handle_IRQ(irqnr, regs); - } - -+asmlinkage void __exception_irq_entry -+at91_aic5_handle_irq(struct pt_regs *regs) -+{ -+ u32 irqnr; -+ u32 irqstat; -+ -+ irqnr = at91_aic_read(AT91_AIC5_IVR); -+ irqstat = at91_aic_read(AT91_AIC5_ISR); -+ -+ if (!irqstat) -+ at91_aic_write(AT91_AIC5_EOICR, 0); -+ else -+ handle_IRQ(irqnr, regs); -+} -+ - static void at91_aic_mask_irq(struct irq_data *d) - { - /* Disable interrupt on AIC */ - at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); -+ /* Update ISR cache */ -+ clear_backup(d->hwirq); -+} -+ -+static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) -+{ -+ /* Disable interrupt on AIC5 */ -+ at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IDCR, 1); -+ /* Update ISR cache */ -+ clear_backup(d->hwirq); - } - - static void at91_aic_unmask_irq(struct irq_data *d) - { - /* Enable interrupt on AIC */ - at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); -+ /* Update ISR cache */ -+ set_backup(d->hwirq); -+} -+ -+static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) -+{ -+ /* Enable interrupt on AIC5 */ -+ at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IECR, 1); -+ /* Update ISR cache */ -+ set_backup(d->hwirq); - } - - static void at91_aic_eoi(struct irq_data *d) -@@ -87,13 +232,18 @@ static void at91_aic_eoi(struct irq_data *d) - at91_aic_write(AT91_AIC_EOICR, 0); - } - --unsigned int at91_extern_irq; -+static void __maybe_unused at91_aic5_eoi(struct irq_data *d) -+{ -+ at91_aic_write(AT91_AIC5_EOICR, 0); -+} - --#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) -+unsigned long *at91_extern_irq; - --static int at91_aic_set_type(struct irq_data *d, unsigned type) -+#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) -+ -+static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) - { -- unsigned int smr, srctype; -+ int srctype; - - switch (type) { - case IRQ_TYPE_LEVEL_HIGH: -@@ -106,58 +256,44 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) - if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ - srctype = AT91_AIC_SRCTYPE_LOW; - else -- return -EINVAL; -+ srctype = -EINVAL; - break; - case IRQ_TYPE_EDGE_FALLING: - if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ - srctype = AT91_AIC_SRCTYPE_FALLING; - else -- return -EINVAL; -+ srctype = -EINVAL; - break; - default: -- return -EINVAL; -+ srctype = -EINVAL; - } - -- smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; -- at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); -- return 0; -+ return srctype; - } - --#ifdef CONFIG_PM -- --static u32 wakeups; --static u32 backups; -- --static int at91_aic_set_wake(struct irq_data *d, unsigned value) -+static int at91_aic_set_type(struct irq_data *d, unsigned type) - { -- if (unlikely(d->hwirq >= NR_AIC_IRQS)) -- return -EINVAL; -- -- if (value) -- wakeups |= (1 << d->hwirq); -- else -- wakeups &= ~(1 << d->hwirq); -+ unsigned int smr; -+ int srctype; -+ -+ srctype = at91_aic_compute_srctype(d, type); -+ if (srctype < 0) -+ return srctype; -+ -+ if (has_aic5()) { -+ at91_aic_write(AT91_AIC5_SSR, -+ d->hwirq & AT91_AIC5_INTSEL_MSK); -+ smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; -+ at91_aic_write(AT91_AIC5_SMR, smr | srctype); -+ } else { -+ smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) -+ & ~AT91_AIC_SRCTYPE; -+ at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); -+ } - - return 0; - } - --void at91_irq_suspend(void) --{ -- backups = at91_aic_read(AT91_AIC_IMR); -- at91_aic_write(AT91_AIC_IDCR, backups); -- at91_aic_write(AT91_AIC_IECR, wakeups); --} -- --void at91_irq_resume(void) --{ -- at91_aic_write(AT91_AIC_IDCR, wakeups); -- at91_aic_write(AT91_AIC_IECR, backups); --} -- --#else --#define at91_aic_set_wake NULL --#endif -- - static struct irq_chip at91_aic_chip = { - .name = "AIC", - .irq_mask = at91_aic_mask_irq, -@@ -193,6 +329,35 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) - at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); - } - -+static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) -+{ -+ int i; -+ -+ /* -+ * Perform 8 End Of Interrupt Command to make sure AIC -+ * will not Lock out nIRQ -+ */ -+ for (i = 0; i < 8; i++) -+ at91_aic_write(AT91_AIC5_EOICR, 0); -+ -+ /* -+ * Spurious Interrupt ID in Spurious Vector Register. -+ * When there is no current interrupt, the IRQ Vector Register -+ * reads the value stored in AIC_SPU -+ */ -+ at91_aic_write(AT91_AIC5_SPU, spu_vector); -+ -+ /* No debugging in AIC: Debug (Protect) Control Register */ -+ at91_aic_write(AT91_AIC5_DCR, 0); -+ -+ /* Disable and clear all interrupts initially */ -+ for (i = 0; i < n_irqs; i++) { -+ at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); -+ at91_aic_write(AT91_AIC5_IDCR, 1); -+ at91_aic_write(AT91_AIC5_ICCR, 1); -+ } -+} -+ - #if defined(CONFIG_OF) - static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -@@ -210,13 +375,31 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - return 0; - } - -+static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, -+ irq_hw_number_t hw) -+{ -+ at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); -+ -+ /* Put virq number in Source Vector Register */ -+ at91_aic_write(AT91_AIC5_SVR, virq); -+ -+ /* Active Low interrupt, with priority */ -+ at91_aic_write(AT91_AIC5_SMR, -+ AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); -+ -+ irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); -+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); -+ -+ return 0; -+} -+ - static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, - const u32 *intspec, unsigned int intsize, - irq_hw_number_t *out_hwirq, unsigned int *out_type) - { - if (WARN_ON(intsize < 3)) - return -EINVAL; -- if (WARN_ON(intspec[0] >= NR_AIC_IRQS)) -+ if (WARN_ON(intspec[0] >= n_irqs)) - return -EINVAL; - if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) - || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) -@@ -234,14 +417,24 @@ static struct irq_domain_ops at91_aic_irq_ops = { - .xlate = at91_aic_irq_domain_xlate, - }; - --int __init at91_aic_of_init(struct device_node *node, -- struct device_node *parent) -+int __init at91_aic_of_common_init(struct device_node *node, -+ struct device_node *parent) - { - struct property *prop; - const __be32 *p; - u32 val; - -- at91_aic_irq_priorities = kzalloc(NR_AIC_IRQS -+ at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) -+ * sizeof(*at91_extern_irq), GFP_KERNEL); -+ if (!at91_extern_irq) -+ return -ENOMEM; -+ -+ if (at91_aic_pm_init()) { -+ kfree(at91_extern_irq); -+ return -ENOMEM; -+ } -+ -+ at91_aic_irq_priorities = kzalloc(n_irqs - * sizeof(*at91_aic_irq_priorities), - GFP_KERNEL); - if (!at91_aic_irq_priorities) -@@ -250,22 +443,56 @@ int __init at91_aic_of_init(struct device_node *node, - at91_aic_base = of_iomap(node, 0); - at91_aic_np = node; - -- at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, -+ at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, - &at91_aic_irq_ops, NULL); - if (!at91_aic_domain) - panic("Unable to add AIC irq domain (DT)\n"); - -- at91_extern_irq = 0; - of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { -- if (val > 31) -- pr_warn("AIC: external irq %d > 31 skip it\n", val); -+ if (val >= n_irqs) -+ pr_warn("AIC: external irq %d >= %d skip it\n", -+ val, n_irqs); - else -- at91_extern_irq |= (1 << val); -+ set_bit(val, at91_extern_irq); - } - - irq_set_default_host(at91_aic_domain); - -- at91_aic_hw_init(NR_AIC_IRQS); -+ return 0; -+} -+ -+int __init at91_aic_of_init(struct device_node *node, -+ struct device_node *parent) -+{ -+ int err; -+ -+ err = at91_aic_of_common_init(node, parent); -+ if (err) -+ return err; -+ -+ at91_aic_hw_init(n_irqs); -+ -+ return 0; -+} -+ -+int __init at91_aic5_of_init(struct device_node *node, -+ struct device_node *parent) -+{ -+ int err; -+ -+ at91_aic_caps |= AT91_AIC_CAP_AIC5; -+ n_irqs = NR_AIC5_IRQS; -+ at91_aic_chip.irq_ack = at91_aic5_mask_irq; -+ at91_aic_chip.irq_mask = at91_aic5_mask_irq; -+ at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; -+ at91_aic_chip.irq_eoi = at91_aic5_eoi; -+ at91_aic_irq_ops.map = at91_aic5_irq_map; -+ -+ err = at91_aic_of_common_init(node, parent); -+ if (err) -+ return err; -+ -+ at91_aic5_hw_init(n_irqs); - - return 0; - } -@@ -274,22 +501,25 @@ int __init at91_aic_of_init(struct device_node *node, - /* - * Initialize the AIC interrupt controller. - */ --void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) -+void __init at91_aic_init(unsigned int *priority) - { - unsigned int i; - int irq_base; - -+ if (at91_aic_pm_init()) -+ panic("Unable to allocate bit maps\n"); -+ - at91_aic_base = ioremap(AT91_AIC, 512); - if (!at91_aic_base) - panic("Unable to ioremap AIC registers\n"); - - /* Add irq domain for AIC */ -- irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); -+ irq_base = irq_alloc_descs(-1, 0, n_irqs, 0); - if (irq_base < 0) { - WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); - irq_base = 0; - } -- at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, -+ at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs, - irq_base, 0, - &irq_domain_simple_ops, NULL); - -@@ -302,15 +532,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) - * The IVR is used by macro get_irqnr_and_base to read and verify. - * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. - */ -- for (i = 0; i < NR_AIC_IRQS; i++) { -+ for (i = 0; i < n_irqs; i++) { - /* Put hardware irq number in Source Vector Register: */ - at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); - /* Active Low interrupt, with the specified priority */ - at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); -- - irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - -- at91_aic_hw_init(NR_AIC_IRQS); -+ at91_aic_hw_init(n_irqs); - } --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0060-dt-add-property-iteration-helpers.patch b/patches.at91/0060-dt-add-property-iteration-helpers.patch new file mode 100644 index 000000000000..4abe7a0efc98 --- /dev/null +++ b/patches.at91/0060-dt-add-property-iteration-helpers.patch @@ -0,0 +1,131 @@ +From 269418c20b0c2e0aaa9da1e46b110a4c9f4b90f9 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Wed, 4 Apr 2012 09:27:46 -0600 +Subject: dt: add property iteration helpers + +commit c541adc637066407d4cda9db14dcb0e618966a4c upstream. + +This patch adds macros of_property_for_each_u32() and +of_property_for_each_string(), which iterate over an array of values +within a device-tree property. Usage is for example: + +struct property *prop; +const __be32 *p; +u32 u; +of_property_for_each_u32(np, "propname", prop, p, u) + printk("U32 value: %x\n", u); + +struct property *prop; +const char *s; +of_property_for_each_string(np, "propname", prop, s) + printk("String value: %s\n", s); + +Based on work by Rob Herring + +Cc: Grant Likely +Signed-off-by: Stephen Warren +Acked-by: Rob Herring +Signed-off-by: Linus Walleij +--- + drivers/of/base.c | 41 +++++++++++++++++++++++++++++++++++++++++ + include/linux/of.h | 35 +++++++++++++++++++++++++++++++++++ + 2 files changed, 76 insertions(+) + +--- a/drivers/of/base.c ++++ b/drivers/of/base.c +@@ -1260,3 +1260,44 @@ int of_alias_get_id(struct device_node * + return id; + } + EXPORT_SYMBOL_GPL(of_alias_get_id); ++ ++const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur, ++ u32 *pu) ++{ ++ const void *curv = cur; ++ ++ if (!prop) ++ return NULL; ++ ++ if (!cur) { ++ curv = prop->value; ++ goto out_val; ++ } ++ ++ curv += sizeof(*cur); ++ if (curv >= prop->value + prop->length) ++ return NULL; ++ ++out_val: ++ *pu = be32_to_cpup(curv); ++ return curv; ++} ++EXPORT_SYMBOL_GPL(of_prop_next_u32); ++ ++const char *of_prop_next_string(struct property *prop, const char *cur) ++{ ++ const void *curv = cur; ++ ++ if (!prop) ++ return NULL; ++ ++ if (!cur) ++ return prop->value; ++ ++ curv += strlen(cur) + 1; ++ if (curv >= prop->value + prop->length) ++ return NULL; ++ ++ return curv; ++} ++EXPORT_SYMBOL_GPL(of_prop_next_string); +--- a/include/linux/of.h ++++ b/include/linux/of.h +@@ -260,6 +260,37 @@ extern void of_detach_node(struct device + #endif + + #define of_match_ptr(_ptr) (_ptr) ++ ++/* ++ * struct property *prop; ++ * const __be32 *p; ++ * u32 u; ++ * ++ * of_property_for_each_u32(np, "propname", prop, p, u) ++ * printk("U32 value: %x\n", u); ++ */ ++const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur, ++ u32 *pu); ++#define of_property_for_each_u32(np, propname, prop, p, u) \ ++ for (prop = of_find_property(np, propname, NULL), \ ++ p = of_prop_next_u32(prop, NULL, &u); \ ++ p; \ ++ p = of_prop_next_u32(prop, p, &u)) ++ ++/* ++ * struct property *prop; ++ * const char *s; ++ * ++ * of_property_for_each_string(np, "propname", prop, s) ++ * printk("String value: %s\n", s); ++ */ ++const char *of_prop_next_string(struct property *prop, const char *cur); ++#define of_property_for_each_string(np, propname, prop, s) \ ++ for (prop = of_find_property(np, propname, NULL), \ ++ s = of_prop_next_string(prop, NULL); \ ++ s; \ ++ s = of_prop_next_string(prop, s)) ++ + #else /* CONFIG_OF */ + + static inline const char* of_node_full_name(struct device_node *np) +@@ -355,6 +386,10 @@ static inline int of_machine_is_compatib + + #define of_match_ptr(_ptr) NULL + #define of_match_node(_matches, _node) NULL ++#define of_property_for_each_u32(np, propname, prop, p, u) \ ++ while (0) ++#define of_property_for_each_string(np, propname, prop, s) \ ++ while (0) + #endif /* CONFIG_OF */ + + #ifndef of_node_to_nid diff --git a/patches.at91/0061-ARM-at91-fix-new-build-errors.patch b/patches.at91/0061-ARM-at91-fix-new-build-errors.patch new file mode 100644 index 000000000000..bac177768d28 --- /dev/null +++ b/patches.at91/0061-ARM-at91-fix-new-build-errors.patch @@ -0,0 +1,97 @@ +From b6a60e81276efc7c6aa5f37f50f52ac0d8391187 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Wed, 4 Jul 2012 07:45:16 +0000 +Subject: ARM: at91: fix new build errors + +commit 14070ade02cc378bc30dae383532768a94805988 upstream. + +MULTI_IRQ_HANDLER and SPARSE_IRQ are now required everywhere because +mach/irqs.h and mach/entry-macros.S are gone but the symbols are +only selected for AT91SAM9, not for the NOMMU parts. + +A few files now need to include linux/io.h directly, which used to +be included through other headers that have changed. + +The new at91_aic_irq_priorities variable is only used with CONFIG_OF +enabled and should not be visible otherwise. + +Signed-off-by: Arnd Bergmann +Acked-by: Ludovic Desroches +Acked-by: Nicolas Ferre +--- + arch/arm/mach-at91/Kconfig | 4 ++++ + arch/arm/mach-at91/at91x40.c | 1 + + arch/arm/mach-at91/irq.c | 3 ++- + drivers/rtc/rtc-at91rm9200.c | 1 + + 4 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig +index 7d0c40a..c8050b1 100644 +--- a/arch/arm/mach-at91/Kconfig ++++ b/arch/arm/mach-at91/Kconfig +@@ -37,6 +37,8 @@ config SOC_AT91SAM9 + config SOC_AT91RM9200 + bool "AT91RM9200" + select CPU_ARM920T ++ select MULTI_IRQ_HANDLER ++ select SPARSE_IRQ + select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 + +@@ -142,6 +144,8 @@ config ARCH_AT91SAM9G45 + config ARCH_AT91X40 + bool "AT91x40" + depends on !MMU ++ select MULTI_IRQ_HANDLER ++ select SPARSE_IRQ + select ARCH_USES_GETTIMEOFFSET + + endchoice +diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c +index 4c0f5fd..46090e6 100644 +--- a/arch/arm/mach-at91/at91x40.c ++++ b/arch/arm/mach-at91/at91x40.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c +index c5eaaa0..1e02c0e 100644 +--- a/arch/arm/mach-at91/irq.c ++++ b/arch/arm/mach-at91/irq.c +@@ -49,7 +49,6 @@ static struct irq_domain *at91_aic_domain; + static struct device_node *at91_aic_np; + static unsigned int n_irqs = NR_AIC_IRQS; + static unsigned long at91_aic_caps = 0; +-static unsigned int *at91_aic_irq_priorities; + + /* AIC5 introduces a Source Select Register */ + #define AT91_AIC_CAP_AIC5 (1 << 0) +@@ -359,6 +358,8 @@ static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) + } + + #if defined(CONFIG_OF) ++static unsigned int *at91_aic_irq_priorities; ++ + static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) + { +diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c +index f02acb0..a4c78c0 100644 +--- a/drivers/rtc/rtc-at91rm9200.c ++++ b/drivers/rtc/rtc-at91rm9200.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + #include + #include +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0061-dt-add-property-iteration-helpers.patch b/patches.at91/0061-dt-add-property-iteration-helpers.patch deleted file mode 100644 index 40f12e568a15..000000000000 --- a/patches.at91/0061-dt-add-property-iteration-helpers.patch +++ /dev/null @@ -1,129 +0,0 @@ -From b0a2eb064f2171838c4562f34eb1e492ce0361d5 Mon Sep 17 00:00:00 2001 -From: Stephen Warren -Date: Wed, 4 Apr 2012 09:27:46 -0600 -Subject: dt: add property iteration helpers - -This patch adds macros of_property_for_each_u32() and -of_property_for_each_string(), which iterate over an array of values -within a device-tree property. Usage is for example: - -struct property *prop; -const __be32 *p; -u32 u; -of_property_for_each_u32(np, "propname", prop, p, u) - printk("U32 value: %x\n", u); - -struct property *prop; -const char *s; -of_property_for_each_string(np, "propname", prop, s) - printk("String value: %s\n", s); - -Based on work by Rob Herring - -Cc: Grant Likely -Signed-off-by: Stephen Warren -Acked-by: Rob Herring -Signed-off-by: Linus Walleij ---- - drivers/of/base.c | 41 +++++++++++++++++++++++++++++++++++++++++ - include/linux/of.h | 35 +++++++++++++++++++++++++++++++++++ - 2 files changed, 76 insertions(+) - ---- a/drivers/of/base.c -+++ b/drivers/of/base.c -@@ -1260,3 +1260,44 @@ int of_alias_get_id(struct device_node * - return id; - } - EXPORT_SYMBOL_GPL(of_alias_get_id); -+ -+const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur, -+ u32 *pu) -+{ -+ const void *curv = cur; -+ -+ if (!prop) -+ return NULL; -+ -+ if (!cur) { -+ curv = prop->value; -+ goto out_val; -+ } -+ -+ curv += sizeof(*cur); -+ if (curv >= prop->value + prop->length) -+ return NULL; -+ -+out_val: -+ *pu = be32_to_cpup(curv); -+ return curv; -+} -+EXPORT_SYMBOL_GPL(of_prop_next_u32); -+ -+const char *of_prop_next_string(struct property *prop, const char *cur) -+{ -+ const void *curv = cur; -+ -+ if (!prop) -+ return NULL; -+ -+ if (!cur) -+ return prop->value; -+ -+ curv += strlen(cur) + 1; -+ if (curv >= prop->value + prop->length) -+ return NULL; -+ -+ return curv; -+} -+EXPORT_SYMBOL_GPL(of_prop_next_string); ---- a/include/linux/of.h -+++ b/include/linux/of.h -@@ -260,6 +260,37 @@ extern void of_detach_node(struct device - #endif - - #define of_match_ptr(_ptr) (_ptr) -+ -+/* -+ * struct property *prop; -+ * const __be32 *p; -+ * u32 u; -+ * -+ * of_property_for_each_u32(np, "propname", prop, p, u) -+ * printk("U32 value: %x\n", u); -+ */ -+const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur, -+ u32 *pu); -+#define of_property_for_each_u32(np, propname, prop, p, u) \ -+ for (prop = of_find_property(np, propname, NULL), \ -+ p = of_prop_next_u32(prop, NULL, &u); \ -+ p; \ -+ p = of_prop_next_u32(prop, p, &u)) -+ -+/* -+ * struct property *prop; -+ * const char *s; -+ * -+ * of_property_for_each_string(np, "propname", prop, s) -+ * printk("String value: %s\n", s); -+ */ -+const char *of_prop_next_string(struct property *prop, const char *cur); -+#define of_property_for_each_string(np, propname, prop, s) \ -+ for (prop = of_find_property(np, propname, NULL), \ -+ s = of_prop_next_string(prop, NULL); \ -+ s; \ -+ s = of_prop_next_string(prop, s)) -+ - #else /* CONFIG_OF */ - - static inline const char* of_node_full_name(struct device_node *np) -@@ -355,6 +386,10 @@ static inline int of_machine_is_compatib - - #define of_match_ptr(_ptr) NULL - #define of_match_node(_matches, _node) NULL -+#define of_property_for_each_u32(np, propname, prop, p, u) \ -+ while (0) -+#define of_property_for_each_string(np, propname, prop, s) \ -+ while (0) - #endif /* CONFIG_OF */ - - #ifndef of_node_to_nid diff --git a/patches.at91/0062-ARM-at91-fix-new-build-errors.patch b/patches.at91/0062-ARM-at91-fix-new-build-errors.patch deleted file mode 100644 index b26870b9f081..000000000000 --- a/patches.at91/0062-ARM-at91-fix-new-build-errors.patch +++ /dev/null @@ -1,95 +0,0 @@ -From a00b0ccc24fe0904fa187dd320709da1b6f44c90 Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann -Date: Wed, 4 Jul 2012 07:45:16 +0000 -Subject: ARM: at91: fix new build errors - -MULTI_IRQ_HANDLER and SPARSE_IRQ are now required everywhere because -mach/irqs.h and mach/entry-macros.S are gone but the symbols are -only selected for AT91SAM9, not for the NOMMU parts. - -A few files now need to include linux/io.h directly, which used to -be included through other headers that have changed. - -The new at91_aic_irq_priorities variable is only used with CONFIG_OF -enabled and should not be visible otherwise. - -Signed-off-by: Arnd Bergmann -Acked-by: Ludovic Desroches -Acked-by: Nicolas Ferre ---- - arch/arm/mach-at91/Kconfig | 4 ++++ - arch/arm/mach-at91/at91x40.c | 1 + - arch/arm/mach-at91/irq.c | 3 ++- - drivers/rtc/rtc-at91rm9200.c | 1 + - 4 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig -index 7d0c40a..c8050b1 100644 ---- a/arch/arm/mach-at91/Kconfig -+++ b/arch/arm/mach-at91/Kconfig -@@ -37,6 +37,8 @@ config SOC_AT91SAM9 - config SOC_AT91RM9200 - bool "AT91RM9200" - select CPU_ARM920T -+ select MULTI_IRQ_HANDLER -+ select SPARSE_IRQ - select GENERIC_CLOCKEVENTS - select HAVE_AT91_DBGU0 - -@@ -142,6 +144,8 @@ config ARCH_AT91SAM9G45 - config ARCH_AT91X40 - bool "AT91x40" - depends on !MMU -+ select MULTI_IRQ_HANDLER -+ select SPARSE_IRQ - select ARCH_USES_GETTIMEOFFSET - - endchoice -diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c -index 4c0f5fd..46090e6 100644 ---- a/arch/arm/mach-at91/at91x40.c -+++ b/arch/arm/mach-at91/at91x40.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c -index c5eaaa0..1e02c0e 100644 ---- a/arch/arm/mach-at91/irq.c -+++ b/arch/arm/mach-at91/irq.c -@@ -49,7 +49,6 @@ static struct irq_domain *at91_aic_domain; - static struct device_node *at91_aic_np; - static unsigned int n_irqs = NR_AIC_IRQS; - static unsigned long at91_aic_caps = 0; --static unsigned int *at91_aic_irq_priorities; - - /* AIC5 introduces a Source Select Register */ - #define AT91_AIC_CAP_AIC5 (1 << 0) -@@ -359,6 +358,8 @@ static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) - } - - #if defined(CONFIG_OF) -+static unsigned int *at91_aic_irq_priorities; -+ - static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) - { -diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c -index f02acb0..a4c78c0 100644 ---- a/drivers/rtc/rtc-at91rm9200.c -+++ b/drivers/rtc/rtc-at91rm9200.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - - #include - #include --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0062-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch b/patches.at91/0062-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch new file mode 100644 index 000000000000..3b3be230b1ae --- /dev/null +++ b/patches.at91/0062-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch @@ -0,0 +1,34 @@ +From 8784aa5855d4f4ebc018df2ee43a143c7560ba37 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Thu, 10 May 2012 12:17:39 +0200 +Subject: dmaengine: at_hdmac: remove some at_dma_slave comments + +commit b89a9cb4027a498de7dad12a68b06ae1b254042c upstream. + +These comments were covering removed struct at_dma_slave fields. + +Signed-off-by: Nicolas Ferre +Signed-off-by: Vinod Koul +--- + arch/arm/mach-at91/include/mach/at_hdmac.h | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h +index fff48d1..810a13e 100644 +--- a/arch/arm/mach-at91/include/mach/at_hdmac.h ++++ b/arch/arm/mach-at91/include/mach/at_hdmac.h +@@ -26,11 +26,6 @@ struct at_dma_platform_data { + /** + * struct at_dma_slave - Controller-specific information about a slave + * @dma_dev: required DMA master device +- * @tx_reg: physical address of data register used for +- * memory-to-peripheral transfers +- * @rx_reg: physical address of data register used for +- * peripheral-to-memory transfers +- * @reg_width: peripheral register width + * @cfg: Platform-specific initializer for the CFG register + * @ctrla: Platform-specific initializer for the CTRLA register + */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0063-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch b/patches.at91/0063-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch new file mode 100644 index 000000000000..2d252b185ac8 --- /dev/null +++ b/patches.at91/0063-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch @@ -0,0 +1,68 @@ +From 7d5ebe64bdd79c895951ec7d72425f7806b14fbd Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Thu, 10 May 2012 12:17:40 +0200 +Subject: dmaengine: at_hdmac: remove ATC_DEFAULT_CTRLA constant + +commit b409ebfb14a71b64e11b156dc82ede698480397e upstream. + +Not needed constant that was set to 0. + +Signed-off-by: Nicolas Ferre +Signed-off-by: Vinod Koul +--- + drivers/dma/at_hdmac.c | 12 +++++------- + 1 file changed, 5 insertions(+), 7 deletions(-) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -39,7 +39,6 @@ + */ + + #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) +-#define ATC_DEFAULT_CTRLA (0) + #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ + |ATC_DIF(AT_DMA_MEM_IF)) + +@@ -574,7 +573,6 @@ atc_prep_dma_memcpy(struct dma_chan *cha + return NULL; + } + +- ctrla = ATC_DEFAULT_CTRLA; + ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN + | ATC_SRC_ADDR_MODE_INCR + | ATC_DST_ADDR_MODE_INCR +@@ -585,13 +583,13 @@ atc_prep_dma_memcpy(struct dma_chan *cha + * of the most common optimization. + */ + if (!((src | dest | len) & 3)) { +- ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; ++ ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; + src_width = dst_width = 2; + } else if (!((src | dest | len) & 1)) { +- ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; ++ ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; + src_width = dst_width = 1; + } else { +- ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; ++ ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; + src_width = dst_width = 0; + } + +@@ -668,7 +666,7 @@ atc_prep_slave_sg(struct dma_chan *chan, + return NULL; + } + +- ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; ++ ctrla = atslave->ctrla; + ctrlb = ATC_IEN; + + switch (direction) { +@@ -812,7 +810,7 @@ atc_dma_cyclic_fill_desc(struct dma_chan + u32 ctrla; + + /* prepare common CRTLA value */ +- ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla ++ ctrla = atslave->ctrla + | ATC_DST_WIDTH(reg_width) + | ATC_SRC_WIDTH(reg_width) + | period_len >> reg_width; diff --git a/patches.at91/0063-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch b/patches.at91/0063-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch deleted file mode 100644 index 64a2b3ea490b..000000000000 --- a/patches.at91/0063-dmaengine-at_hdmac-remove-some-at_dma_slave-comments.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 0144b540ede14f0e1c1f3d084e4d48552a347b6a Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 10 May 2012 12:17:39 +0200 -Subject: dmaengine: at_hdmac: remove some at_dma_slave comments - -These comments were covering removed struct at_dma_slave fields. - -Signed-off-by: Nicolas Ferre -Signed-off-by: Vinod Koul ---- - arch/arm/mach-at91/include/mach/at_hdmac.h | 5 ----- - 1 file changed, 5 deletions(-) - -diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h -index fff48d1..810a13e 100644 ---- a/arch/arm/mach-at91/include/mach/at_hdmac.h -+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h -@@ -26,11 +26,6 @@ struct at_dma_platform_data { - /** - * struct at_dma_slave - Controller-specific information about a slave - * @dma_dev: required DMA master device -- * @tx_reg: physical address of data register used for -- * memory-to-peripheral transfers -- * @rx_reg: physical address of data register used for -- * peripheral-to-memory transfers -- * @reg_width: peripheral register width - * @cfg: Platform-specific initializer for the CFG register - * @ctrla: Platform-specific initializer for the CTRLA register - */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0064-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch b/patches.at91/0064-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch deleted file mode 100644 index ff3c21c85f24..000000000000 --- a/patches.at91/0064-dmaengine-at_hdmac-remove-ATC_DEFAULT_CTRLA-constant.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 6a24ecd4c954856980e2c5be94c85d97bf6a47d6 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 10 May 2012 12:17:40 +0200 -Subject: dmaengine: at_hdmac: remove ATC_DEFAULT_CTRLA constant - -Not needed constant that was set to 0. - -Signed-off-by: Nicolas Ferre -Signed-off-by: Vinod Koul ---- - drivers/dma/at_hdmac.c | 12 +++++------- - 1 file changed, 5 insertions(+), 7 deletions(-) - ---- a/drivers/dma/at_hdmac.c -+++ b/drivers/dma/at_hdmac.c -@@ -39,7 +39,6 @@ - */ - - #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) --#define ATC_DEFAULT_CTRLA (0) - #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ - |ATC_DIF(AT_DMA_MEM_IF)) - -@@ -574,7 +573,6 @@ atc_prep_dma_memcpy(struct dma_chan *cha - return NULL; - } - -- ctrla = ATC_DEFAULT_CTRLA; - ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN - | ATC_SRC_ADDR_MODE_INCR - | ATC_DST_ADDR_MODE_INCR -@@ -585,13 +583,13 @@ atc_prep_dma_memcpy(struct dma_chan *cha - * of the most common optimization. - */ - if (!((src | dest | len) & 3)) { -- ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; -+ ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; - src_width = dst_width = 2; - } else if (!((src | dest | len) & 1)) { -- ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; -+ ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; - src_width = dst_width = 1; - } else { -- ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; -+ ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; - src_width = dst_width = 0; - } - -@@ -668,7 +666,7 @@ atc_prep_slave_sg(struct dma_chan *chan, - return NULL; - } - -- ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; -+ ctrla = atslave->ctrla; - ctrlb = ATC_IEN; - - switch (direction) { -@@ -812,7 +810,7 @@ atc_dma_cyclic_fill_desc(struct dma_chan - u32 ctrla; - - /* prepare common CRTLA value */ -- ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla -+ ctrla = atslave->ctrla - | ATC_DST_WIDTH(reg_width) - | ATC_SRC_WIDTH(reg_width) - | period_len >> reg_width; diff --git a/patches.at91/0064-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch b/patches.at91/0064-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch new file mode 100644 index 000000000000..36840fd090b5 --- /dev/null +++ b/patches.at91/0064-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch @@ -0,0 +1,131 @@ +From dc894a3e43407b912568b2c3a1fc83585994be14 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Thu, 10 May 2012 12:17:41 +0200 +Subject: dmaengine: at_hdmac: take maxburst from slave configuration + +commit 1dd1ea8eb46a71201943148cc0ed3182cd04e288 upstream. + +The maxburst/chunk size was taken from the private slave DMA data structure. +Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst +values. +The ctrla field is not needed anymore in the slave private structure nor the +header constants that were located in an architecture specific directory. +The at91sam9g45_devices.c file that was using this platform data is also +modified to remove this now useless data. + +Signed-off-by: Nicolas Ferre +Signed-off-by: Vinod Koul +--- + arch/arm/mach-at91/at91sam9g45_devices.c | 1 - + arch/arm/mach-at91/include/mach/at_hdmac.h | 21 --------------------- + drivers/dma/at_hdmac.c | 7 ++++--- + drivers/dma/at_hdmac_regs.h | 21 ++++++++++++++++++++- + 4 files changed, 24 insertions(+), 26 deletions(-) + +--- a/arch/arm/mach-at91/at91sam9g45_devices.c ++++ b/arch/arm/mach-at91/at91sam9g45_devices.c +@@ -433,7 +433,6 @@ void __init at91_add_device_mci(short mm + atslave->dma_dev = &at_hdmac_device.dev; + atslave->cfg = ATC_FIFOCFG_HALFFIFO + | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW; +- atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16; + if (mmc_id == 0) /* MCI0 */ + atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0) + | ATC_DST_PER(AT_DMA_ID_MCI0); +--- a/arch/arm/mach-at91/include/mach/at_hdmac.h ++++ b/arch/arm/mach-at91/include/mach/at_hdmac.h +@@ -27,12 +27,10 @@ struct at_dma_platform_data { + * struct at_dma_slave - Controller-specific information about a slave + * @dma_dev: required DMA master device + * @cfg: Platform-specific initializer for the CFG register +- * @ctrla: Platform-specific initializer for the CTRLA register + */ + struct at_dma_slave { + struct device *dma_dev; + u32 cfg; +- u32 ctrla; + }; + + +@@ -59,24 +57,5 @@ struct at_dma_slave { + #define ATC_FIFOCFG_HALFFIFO (0x1 << 28) + #define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28) + +-/* Platform-configurable bits in CTRLA */ +-#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */ +-#define ATC_SCSIZE_1 (0x0 << 16) +-#define ATC_SCSIZE_4 (0x1 << 16) +-#define ATC_SCSIZE_8 (0x2 << 16) +-#define ATC_SCSIZE_16 (0x3 << 16) +-#define ATC_SCSIZE_32 (0x4 << 16) +-#define ATC_SCSIZE_64 (0x5 << 16) +-#define ATC_SCSIZE_128 (0x6 << 16) +-#define ATC_SCSIZE_256 (0x7 << 16) +-#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */ +-#define ATC_DCSIZE_1 (0x0 << 20) +-#define ATC_DCSIZE_4 (0x1 << 20) +-#define ATC_DCSIZE_8 (0x2 << 20) +-#define ATC_DCSIZE_16 (0x3 << 20) +-#define ATC_DCSIZE_32 (0x4 << 20) +-#define ATC_DCSIZE_64 (0x5 << 20) +-#define ATC_DCSIZE_128 (0x6 << 20) +-#define ATC_DCSIZE_256 (0x7 << 20) + + #endif /* AT_HDMAC_H */ +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -666,7 +666,8 @@ atc_prep_slave_sg(struct dma_chan *chan, + return NULL; + } + +- ctrla = atslave->ctrla; ++ ctrla = ATC_SCSIZE(sconfig->src_maxburst) ++ | ATC_DCSIZE(sconfig->dst_maxburst); + ctrlb = ATC_IEN; + + switch (direction) { +@@ -805,12 +806,12 @@ atc_dma_cyclic_fill_desc(struct dma_chan + enum dma_transfer_direction direction) + { + struct at_dma_chan *atchan = to_at_dma_chan(chan); +- struct at_dma_slave *atslave = chan->private; + struct dma_slave_config *sconfig = &atchan->dma_sconfig; + u32 ctrla; + + /* prepare common CRTLA value */ +- ctrla = atslave->ctrla ++ ctrla = ATC_SCSIZE(sconfig->src_maxburst) ++ | ATC_DCSIZE(sconfig->dst_maxburst) + | ATC_DST_WIDTH(reg_width) + | ATC_SRC_WIDTH(reg_width) + | period_len >> reg_width; +--- a/drivers/dma/at_hdmac_regs.h ++++ b/drivers/dma/at_hdmac_regs.h +@@ -87,7 +87,26 @@ + /* Bitfields in CTRLA */ + #define ATC_BTSIZE_MAX 0xFFFFUL /* Maximum Buffer Transfer Size */ + #define ATC_BTSIZE(x) (ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */ +-/* Chunck Tranfer size definitions are in at_hdmac.h */ ++#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */ ++#define ATC_SCSIZE(x) (ATC_SCSIZE_MASK & ((x) << 16)) ++#define ATC_SCSIZE_1 (0x0 << 16) ++#define ATC_SCSIZE_4 (0x1 << 16) ++#define ATC_SCSIZE_8 (0x2 << 16) ++#define ATC_SCSIZE_16 (0x3 << 16) ++#define ATC_SCSIZE_32 (0x4 << 16) ++#define ATC_SCSIZE_64 (0x5 << 16) ++#define ATC_SCSIZE_128 (0x6 << 16) ++#define ATC_SCSIZE_256 (0x7 << 16) ++#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */ ++#define ATC_DCSIZE(x) (ATC_DCSIZE_MASK & ((x) << 20)) ++#define ATC_DCSIZE_1 (0x0 << 20) ++#define ATC_DCSIZE_4 (0x1 << 20) ++#define ATC_DCSIZE_8 (0x2 << 20) ++#define ATC_DCSIZE_16 (0x3 << 20) ++#define ATC_DCSIZE_32 (0x4 << 20) ++#define ATC_DCSIZE_64 (0x5 << 20) ++#define ATC_DCSIZE_128 (0x6 << 20) ++#define ATC_DCSIZE_256 (0x7 << 20) + #define ATC_SRC_WIDTH_MASK (0x3 << 24) /* Source Single Transfer Size */ + #define ATC_SRC_WIDTH(x) ((x) << 24) + #define ATC_SRC_WIDTH_BYTE (0x0 << 24) diff --git a/patches.at91/0065-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch b/patches.at91/0065-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch deleted file mode 100644 index 2dc96e7fde2f..000000000000 --- a/patches.at91/0065-dmaengine-at_hdmac-take-maxburst-from-slave-configur.patch +++ /dev/null @@ -1,129 +0,0 @@ -From a692d1243e4c2513c96f00b9be1ab36fb65d2992 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 10 May 2012 12:17:41 +0200 -Subject: dmaengine: at_hdmac: take maxburst from slave configuration - -The maxburst/chunk size was taken from the private slave DMA data structure. -Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst -values. -The ctrla field is not needed anymore in the slave private structure nor the -header constants that were located in an architecture specific directory. -The at91sam9g45_devices.c file that was using this platform data is also -modified to remove this now useless data. - -Signed-off-by: Nicolas Ferre -Signed-off-by: Vinod Koul ---- - arch/arm/mach-at91/at91sam9g45_devices.c | 1 - - arch/arm/mach-at91/include/mach/at_hdmac.h | 21 --------------------- - drivers/dma/at_hdmac.c | 7 ++++--- - drivers/dma/at_hdmac_regs.h | 21 ++++++++++++++++++++- - 4 files changed, 24 insertions(+), 26 deletions(-) - ---- a/arch/arm/mach-at91/at91sam9g45_devices.c -+++ b/arch/arm/mach-at91/at91sam9g45_devices.c -@@ -433,7 +433,6 @@ void __init at91_add_device_mci(short mm - atslave->dma_dev = &at_hdmac_device.dev; - atslave->cfg = ATC_FIFOCFG_HALFFIFO - | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW; -- atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16; - if (mmc_id == 0) /* MCI0 */ - atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0) - | ATC_DST_PER(AT_DMA_ID_MCI0); ---- a/arch/arm/mach-at91/include/mach/at_hdmac.h -+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h -@@ -27,12 +27,10 @@ struct at_dma_platform_data { - * struct at_dma_slave - Controller-specific information about a slave - * @dma_dev: required DMA master device - * @cfg: Platform-specific initializer for the CFG register -- * @ctrla: Platform-specific initializer for the CTRLA register - */ - struct at_dma_slave { - struct device *dma_dev; - u32 cfg; -- u32 ctrla; - }; - - -@@ -59,24 +57,5 @@ struct at_dma_slave { - #define ATC_FIFOCFG_HALFFIFO (0x1 << 28) - #define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28) - --/* Platform-configurable bits in CTRLA */ --#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */ --#define ATC_SCSIZE_1 (0x0 << 16) --#define ATC_SCSIZE_4 (0x1 << 16) --#define ATC_SCSIZE_8 (0x2 << 16) --#define ATC_SCSIZE_16 (0x3 << 16) --#define ATC_SCSIZE_32 (0x4 << 16) --#define ATC_SCSIZE_64 (0x5 << 16) --#define ATC_SCSIZE_128 (0x6 << 16) --#define ATC_SCSIZE_256 (0x7 << 16) --#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */ --#define ATC_DCSIZE_1 (0x0 << 20) --#define ATC_DCSIZE_4 (0x1 << 20) --#define ATC_DCSIZE_8 (0x2 << 20) --#define ATC_DCSIZE_16 (0x3 << 20) --#define ATC_DCSIZE_32 (0x4 << 20) --#define ATC_DCSIZE_64 (0x5 << 20) --#define ATC_DCSIZE_128 (0x6 << 20) --#define ATC_DCSIZE_256 (0x7 << 20) - - #endif /* AT_HDMAC_H */ ---- a/drivers/dma/at_hdmac.c -+++ b/drivers/dma/at_hdmac.c -@@ -666,7 +666,8 @@ atc_prep_slave_sg(struct dma_chan *chan, - return NULL; - } - -- ctrla = atslave->ctrla; -+ ctrla = ATC_SCSIZE(sconfig->src_maxburst) -+ | ATC_DCSIZE(sconfig->dst_maxburst); - ctrlb = ATC_IEN; - - switch (direction) { -@@ -805,12 +806,12 @@ atc_dma_cyclic_fill_desc(struct dma_chan - enum dma_transfer_direction direction) - { - struct at_dma_chan *atchan = to_at_dma_chan(chan); -- struct at_dma_slave *atslave = chan->private; - struct dma_slave_config *sconfig = &atchan->dma_sconfig; - u32 ctrla; - - /* prepare common CRTLA value */ -- ctrla = atslave->ctrla -+ ctrla = ATC_SCSIZE(sconfig->src_maxburst) -+ | ATC_DCSIZE(sconfig->dst_maxburst) - | ATC_DST_WIDTH(reg_width) - | ATC_SRC_WIDTH(reg_width) - | period_len >> reg_width; ---- a/drivers/dma/at_hdmac_regs.h -+++ b/drivers/dma/at_hdmac_regs.h -@@ -87,7 +87,26 @@ - /* Bitfields in CTRLA */ - #define ATC_BTSIZE_MAX 0xFFFFUL /* Maximum Buffer Transfer Size */ - #define ATC_BTSIZE(x) (ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */ --/* Chunck Tranfer size definitions are in at_hdmac.h */ -+#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */ -+#define ATC_SCSIZE(x) (ATC_SCSIZE_MASK & ((x) << 16)) -+#define ATC_SCSIZE_1 (0x0 << 16) -+#define ATC_SCSIZE_4 (0x1 << 16) -+#define ATC_SCSIZE_8 (0x2 << 16) -+#define ATC_SCSIZE_16 (0x3 << 16) -+#define ATC_SCSIZE_32 (0x4 << 16) -+#define ATC_SCSIZE_64 (0x5 << 16) -+#define ATC_SCSIZE_128 (0x6 << 16) -+#define ATC_SCSIZE_256 (0x7 << 16) -+#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */ -+#define ATC_DCSIZE(x) (ATC_DCSIZE_MASK & ((x) << 20)) -+#define ATC_DCSIZE_1 (0x0 << 20) -+#define ATC_DCSIZE_4 (0x1 << 20) -+#define ATC_DCSIZE_8 (0x2 << 20) -+#define ATC_DCSIZE_16 (0x3 << 20) -+#define ATC_DCSIZE_32 (0x4 << 20) -+#define ATC_DCSIZE_64 (0x5 << 20) -+#define ATC_DCSIZE_128 (0x6 << 20) -+#define ATC_DCSIZE_256 (0x7 << 20) - #define ATC_SRC_WIDTH_MASK (0x3 << 24) /* Source Single Transfer Size */ - #define ATC_SRC_WIDTH(x) ((x) << 24) - #define ATC_SRC_WIDTH_BYTE (0x0 << 24) diff --git a/patches.at91/0065-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch b/patches.at91/0065-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch new file mode 100644 index 000000000000..1f71b5a3a176 --- /dev/null +++ b/patches.at91/0065-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch @@ -0,0 +1,38 @@ +From cbf60a8fc3f77c39c2612d91a86797c4153ce4fe Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Tue, 12 Jun 2012 10:34:52 +0200 +Subject: dmaengine: at_hdmac: trivial: fix comment in header + +commit 9102d8715e5c10db37d81ab75285a2f6746360b2 upstream. + +Not all Atmel SoCs were pointed out in header comment which was bringing +confusion. Remove the truncated list of supported devices, replace by the +only one that is not supported. + +Reported-by: Elen Song +Signed-off-by: Nicolas Ferre +--- + drivers/dma/at_hdmac.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c +index 7292aa8..bb16013 100644 +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -9,10 +9,9 @@ + * (at your option) any later version. + * + * +- * This supports the Atmel AHB DMA Controller, +- * +- * The driver has currently been tested with the Atmel AT91SAM9RL +- * and AT91SAM9G45 series. ++ * This supports the Atmel AHB DMA Controller found in several Atmel SoCs. ++ * The only Atmel DMA Controller that is not covered by this driver is the one ++ * found on AT91SAM9263. + */ + + #include +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0066-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch b/patches.at91/0066-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch deleted file mode 100644 index 60572dc4f2a8..000000000000 --- a/patches.at91/0066-dmaengine-at_hdmac-trivial-fix-comment-in-header.patch +++ /dev/null @@ -1,36 +0,0 @@ -From e7d260949873bedcc9fe6cd9f60eb1d99359d119 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Tue, 12 Jun 2012 10:34:52 +0200 -Subject: dmaengine: at_hdmac: trivial: fix comment in header - -Not all Atmel SoCs were pointed out in header comment which was bringing -confusion. Remove the truncated list of supported devices, replace by the -only one that is not supported. - -Reported-by: Elen Song -Signed-off-by: Nicolas Ferre ---- - drivers/dma/at_hdmac.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - -diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c -index 7292aa8..bb16013 100644 ---- a/drivers/dma/at_hdmac.c -+++ b/drivers/dma/at_hdmac.c -@@ -9,10 +9,9 @@ - * (at your option) any later version. - * - * -- * This supports the Atmel AHB DMA Controller, -- * -- * The driver has currently been tested with the Atmel AT91SAM9RL -- * and AT91SAM9G45 series. -+ * This supports the Atmel AHB DMA Controller found in several Atmel SoCs. -+ * The only Atmel DMA Controller that is not covered by this driver is the one -+ * found on AT91SAM9263. - */ - - #include --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0068-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch b/patches.at91/0068-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch new file mode 100644 index 000000000000..3186be6701ba --- /dev/null +++ b/patches.at91/0068-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch @@ -0,0 +1,1123 @@ +From 667d21c53f93478f575a888a3258187d401b4305 Mon Sep 17 00:00:00 2001 +From: Andrew Victor +Date: Thu, 26 Apr 2012 00:30:42 +0000 +Subject: AT91: Remove fixed mapping for AT91RM9200 ethernet + +commit c5f0f83c3be4c965c40c78d52000db30c0ceab5d upstream. + +The AT91RM9200 Ethernet controller still has a fixed IO mapping. +So: +* Remove the fixed IO mapping and AT91_VA_BASE_EMAC definition. +* Pass the physical base-address via platform-resources to the driver. +* Convert at91_ether.c driver to perform an ioremap(). +* Ethernet PHY detection needs to be performed during the driver +initialization process, it can no longer be done first. + +Signed-off-by: Andrew Victor +Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD +Signed-off-by: Nicolas Ferre +Signed-off-by: David S. Miller +--- + arch/arm/mach-at91/at91rm9200.c | 10 - + arch/arm/mach-at91/at91rm9200_devices.c | 4 +- + arch/arm/mach-at91/include/mach/hardware.h | 1 - + drivers/net/ethernet/cadence/at91_ether.c | 527 ++++++++++++++++------------- + drivers/net/ethernet/cadence/at91_ether.h | 1 + + 5 files changed, 287 insertions(+), 256 deletions(-) + +diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c +index 801c30b..6f50c67 100644 +--- a/arch/arm/mach-at91/at91rm9200.c ++++ b/arch/arm/mach-at91/at91rm9200.c +@@ -27,15 +27,6 @@ + #include "clock.h" + #include "sam9_smc.h" + +-static struct map_desc at91rm9200_io_desc[] __initdata = { +- { +- .virtual = AT91_VA_BASE_EMAC, +- .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), +- .length = SZ_16K, +- .type = MT_DEVICE, +- }, +-}; +- + /* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ +@@ -304,7 +295,6 @@ static void __init at91rm9200_map_io(void) + { + /* Map peripherals */ + at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE); +- iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); + } + + static void __init at91rm9200_ioremap_registers(void) +diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c +index 04d69d3..01fb732 100644 +--- a/arch/arm/mach-at91/at91rm9200_devices.c ++++ b/arch/arm/mach-at91/at91rm9200_devices.c +@@ -140,8 +140,8 @@ static struct macb_platform_data eth_data; + + static struct resource eth_resources[] = { + [0] = { +- .start = AT91_VA_BASE_EMAC, +- .end = AT91_VA_BASE_EMAC + SZ_16K - 1, ++ .start = AT91RM9200_BASE_EMAC, ++ .end = AT91RM9200_BASE_EMAC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { +diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h +index 24b46bd..09242b6 100644 +--- a/arch/arm/mach-at91/include/mach/hardware.h ++++ b/arch/arm/mach-at91/include/mach/hardware.h +@@ -85,7 +85,6 @@ + * Virtual to Physical Address mapping for IO devices. + */ + #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) +-#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) + + /* Internal SRAM is mapped below the IO devices */ + #define AT91_SRAM_MAX SZ_1M +diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c +index 9061170..62761e1 100644 +--- a/drivers/net/ethernet/cadence/at91_ether.c ++++ b/drivers/net/ethernet/cadence/at91_ether.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -51,21 +52,17 @@ + /* + * Read from a EMAC register. + */ +-static inline unsigned long at91_emac_read(unsigned int reg) ++static inline unsigned long at91_emac_read(struct at91_private *lp, unsigned int reg) + { +- void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC; +- +- return __raw_readl(emac_base + reg); ++ return __raw_readl(lp->emac_base + reg); + } + + /* + * Write to a EMAC register. + */ +-static inline void at91_emac_write(unsigned int reg, unsigned long value) ++static inline void at91_emac_write(struct at91_private *lp, unsigned int reg, unsigned long value) + { +- void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC; +- +- __raw_writel(value, emac_base + reg); ++ __raw_writel(value, lp->emac_base + reg); + } + + /* ........................... PHY INTERFACE ........................... */ +@@ -75,32 +72,33 @@ static inline void at91_emac_write(unsigned int reg, unsigned long value) + * When not called from an interrupt-handler, access to the PHY must be + * protected by a spinlock. + */ +-static void enable_mdi(void) ++static void enable_mdi(struct at91_private *lp) + { + unsigned long ctl; + +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ + } + + /* + * Disable the MDIO bit in the MAC control register + */ +-static void disable_mdi(void) ++static void disable_mdi(struct at91_private *lp) + { + unsigned long ctl; + +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ + } + + /* + * Wait until the PHY operation is complete. + */ +-static inline void at91_phy_wait(void) { ++static inline void at91_phy_wait(struct at91_private *lp) ++{ + unsigned long timeout = jiffies + 2; + +- while (!(at91_emac_read(AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) { ++ while (!(at91_emac_read(lp, AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) { + if (time_after(jiffies, timeout)) { + printk("at91_ether: MIO timeout\n"); + break; +@@ -113,28 +111,28 @@ static inline void at91_phy_wait(void) { + * Write value to the a PHY register + * Note: MDI interface is assumed to already have been enabled. + */ +-static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value) ++static void write_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int value) + { +- at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W ++ at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W + | ((phy_addr & 0x1f) << 23) | (address << 18) | (value & AT91_EMAC_DATA)); + + /* Wait until IDLE bit in Network Status register is cleared */ +- at91_phy_wait(); ++ at91_phy_wait(lp); + } + + /* + * Read value stored in a PHY register. + * Note: MDI interface is assumed to already have been enabled. + */ +-static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value) ++static void read_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int *value) + { +- at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R ++ at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R + | ((phy_addr & 0x1f) << 23) | (address << 18)); + + /* Wait until IDLE bit in Network Status register is cleared */ +- at91_phy_wait(); ++ at91_phy_wait(lp); + +- *value = at91_emac_read(AT91_EMAC_MAN) & AT91_EMAC_DATA; ++ *value = at91_emac_read(lp, AT91_EMAC_MAN) & AT91_EMAC_DATA; + } + + /* ........................... PHY MANAGEMENT .......................... */ +@@ -158,13 +156,13 @@ static void update_linkspeed(struct net_device *dev, int silent) + } + + /* Link up, or auto-negotiation still in progress */ +- read_phy(lp->phy_address, MII_BMSR, &bmsr); +- read_phy(lp->phy_address, MII_BMCR, &bmcr); ++ read_phy(lp, lp->phy_address, MII_BMSR, &bmsr); ++ read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); + if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */ + if (!(bmsr & BMSR_ANEGCOMPLETE)) + return; /* Do nothing - another interrupt generated when negotiation complete */ + +- read_phy(lp->phy_address, MII_LPA, &lpa); ++ read_phy(lp, lp->phy_address, MII_LPA, &lpa); + if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100; + else speed = SPEED_10; + if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) duplex = DUPLEX_FULL; +@@ -175,7 +173,7 @@ static void update_linkspeed(struct net_device *dev, int silent) + } + + /* Update the MAC */ +- mac_cfg = at91_emac_read(AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); ++ mac_cfg = at91_emac_read(lp, AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); + if (speed == SPEED_100) { + if (duplex == DUPLEX_FULL) /* 100 Full Duplex */ + mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD; +@@ -186,7 +184,7 @@ static void update_linkspeed(struct net_device *dev, int silent) + mac_cfg |= AT91_EMAC_FD; + else {} /* 10 Half Duplex */ + } +- at91_emac_write(AT91_EMAC_CFG, mac_cfg); ++ at91_emac_write(lp, AT91_EMAC_CFG, mac_cfg); + + if (!silent) + printk(KERN_INFO "%s: Link now %i-%s\n", dev->name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex"); +@@ -207,34 +205,34 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id) + * level-triggering. We therefore have to check if the PHY actually has + * an IRQ pending. + */ +- enable_mdi(); ++ enable_mdi(lp); + if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { +- read_phy(lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */ ++ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */ + if (!(phy & (1 << 0))) + goto done; + } + else if (lp->phy_type == MII_LXT971A_ID) { +- read_phy(lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */ ++ read_phy(lp, lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */ + if (!(phy & (1 << 2))) + goto done; + } + else if (lp->phy_type == MII_BCM5221_ID) { +- read_phy(lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */ ++ read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */ + if (!(phy & (1 << 0))) + goto done; + } + else if (lp->phy_type == MII_KS8721_ID) { +- read_phy(lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */ ++ read_phy(lp, lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */ + if (!(phy & ((1 << 2) | 1))) + goto done; + } +- else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ +- read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy); ++ else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ ++ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &phy); + if (!(phy & ((1 << 2) | 1))) + goto done; + } + else if (lp->phy_type == MII_DP83848_ID) { +- read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ ++ read_phy(lp, lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ + if (!(phy & (1 << 7))) + goto done; + } +@@ -242,7 +240,7 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id) + update_linkspeed(dev, 0); + + done: +- disable_mdi(); ++ disable_mdi(lp); + + return IRQ_HANDLED; + } +@@ -273,41 +271,41 @@ static void enable_phyirq(struct net_device *dev) + } + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ +- read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); + dsintr = dsintr & ~0xf00; /* clear bits 8..11 */ +- write_phy(lp->phy_address, MII_DSINTR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); + } + else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ +- read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); + dsintr = dsintr | 0xf2; /* set bits 1, 4..7 */ +- write_phy(lp->phy_address, MII_ISINTE_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); + } + else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ + dsintr = (1 << 15) | ( 1 << 14); +- write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); + } + else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ + dsintr = (1 << 10) | ( 1 << 8); +- write_phy(lp->phy_address, MII_TPISTATUS, dsintr); ++ write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); + } + else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ +- read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); + dsintr = dsintr | 0x500; /* set bits 8, 10 */ +- write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); + } + else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ +- read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); + dsintr = dsintr | 0x3c; /* set bits 2..5 */ +- write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); +- read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); ++ write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); ++ read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); + dsintr = dsintr | 0x3; /* set bits 0,1 */ +- write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); + } + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + } + +@@ -326,43 +324,43 @@ static void disable_phyirq(struct net_device *dev) + } + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ +- read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); + dsintr = dsintr | 0xf00; /* set bits 8..11 */ +- write_phy(lp->phy_address, MII_DSINTR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); + } + else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ +- read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); + dsintr = dsintr & ~0xf2; /* clear bits 1, 4..7 */ +- write_phy(lp->phy_address, MII_ISINTE_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); + } + else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ +- read_phy(lp->phy_address, MII_BCMINTR_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &dsintr); + dsintr = ~(1 << 14); +- write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); + } + else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ +- read_phy(lp->phy_address, MII_TPISTATUS, &dsintr); ++ read_phy(lp, lp->phy_address, MII_TPISTATUS, &dsintr); + dsintr = ~((1 << 10) | (1 << 8)); +- write_phy(lp->phy_address, MII_TPISTATUS, dsintr); ++ write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); + } + else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ +- read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); + dsintr = dsintr & ~0x500; /* clear bits 8, 10 */ +- write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); + } + else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ +- read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); ++ read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); + dsintr = dsintr & ~0x3; /* clear bits 0, 1 */ +- write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); +- read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); ++ write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); ++ read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); + dsintr = dsintr & ~0x3c; /* clear bits 2..5 */ +- write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); ++ write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); + } + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + irq_number = lp->board_data.phy_irq_pin; +@@ -379,17 +377,17 @@ static void reset_phy(struct net_device *dev) + unsigned int bmcr; + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + /* Perform PHY reset */ +- write_phy(lp->phy_address, MII_BMCR, BMCR_RESET); ++ write_phy(lp, lp->phy_address, MII_BMCR, BMCR_RESET); + + /* Wait until PHY reset is complete */ + do { +- read_phy(lp->phy_address, MII_BMCR, &bmcr); ++ read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); + } while (!(bmcr & BMCR_RESET)); + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + } + #endif +@@ -399,13 +397,37 @@ static void at91ether_check_link(unsigned long dev_id) + struct net_device *dev = (struct net_device *) dev_id; + struct at91_private *lp = netdev_priv(dev); + +- enable_mdi(); ++ enable_mdi(lp); + update_linkspeed(dev, 1); +- disable_mdi(); ++ disable_mdi(lp); + + mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL); + } + ++/* ++ * Perform any PHY-specific initialization. ++ */ ++static void __init initialize_phy(struct at91_private *lp) ++{ ++ unsigned int val; ++ ++ spin_lock_irq(&lp->lock); ++ enable_mdi(lp); ++ ++ if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { ++ read_phy(lp, lp->phy_address, MII_DSCR_REG, &val); ++ if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */ ++ lp->phy_media = PORT_FIBRE; ++ } else if (machine_is_csb337()) { ++ /* mix link activity status into LED2 link state */ ++ write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x0d22); ++ } else if (machine_is_ecbat91()) ++ write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x156A); ++ ++ disable_mdi(lp); ++ spin_unlock_irq(&lp->lock); ++} ++ + /* ......................... ADDRESS MANAGEMENT ........................ */ + + /* +@@ -454,17 +476,19 @@ static short __init unpack_mac_address(struct net_device *dev, unsigned int hi, + */ + static void __init get_mac_address(struct net_device *dev) + { ++ struct at91_private *lp = netdev_priv(dev); ++ + /* Check Specific-Address 1 */ +- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA1H), at91_emac_read(AT91_EMAC_SA1L))) ++ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA1H), at91_emac_read(lp, AT91_EMAC_SA1L))) + return; + /* Check Specific-Address 2 */ +- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA2H), at91_emac_read(AT91_EMAC_SA2L))) ++ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA2H), at91_emac_read(lp, AT91_EMAC_SA2L))) + return; + /* Check Specific-Address 3 */ +- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA3H), at91_emac_read(AT91_EMAC_SA3L))) ++ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA3H), at91_emac_read(lp, AT91_EMAC_SA3L))) + return; + /* Check Specific-Address 4 */ +- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA4H), at91_emac_read(AT91_EMAC_SA4L))) ++ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA4H), at91_emac_read(lp, AT91_EMAC_SA4L))) + return; + + printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n"); +@@ -475,11 +499,13 @@ static void __init get_mac_address(struct net_device *dev) + */ + static void update_mac_address(struct net_device *dev) + { +- at91_emac_write(AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0])); +- at91_emac_write(AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4])); ++ struct at91_private *lp = netdev_priv(dev); + +- at91_emac_write(AT91_EMAC_SA2L, 0); +- at91_emac_write(AT91_EMAC_SA2H, 0); ++ at91_emac_write(lp, AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0])); ++ at91_emac_write(lp, AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4])); ++ ++ at91_emac_write(lp, AT91_EMAC_SA2L, 0); ++ at91_emac_write(lp, AT91_EMAC_SA2H, 0); + } + + /* +@@ -559,6 +585,7 @@ static int hash_get_index(__u8 *addr) + */ + static void at91ether_sethashtable(struct net_device *dev) + { ++ struct at91_private *lp = netdev_priv(dev); + struct netdev_hw_addr *ha; + unsigned long mc_filter[2]; + unsigned int bitnr; +@@ -570,8 +597,8 @@ static void at91ether_sethashtable(struct net_device *dev) + mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); + } + +- at91_emac_write(AT91_EMAC_HSL, mc_filter[0]); +- at91_emac_write(AT91_EMAC_HSH, mc_filter[1]); ++ at91_emac_write(lp, AT91_EMAC_HSL, mc_filter[0]); ++ at91_emac_write(lp, AT91_EMAC_HSH, mc_filter[1]); + } + + /* +@@ -579,9 +606,10 @@ static void at91ether_sethashtable(struct net_device *dev) + */ + static void at91ether_set_multicast_list(struct net_device *dev) + { ++ struct at91_private *lp = netdev_priv(dev); + unsigned long cfg; + +- cfg = at91_emac_read(AT91_EMAC_CFG); ++ cfg = at91_emac_read(lp, AT91_EMAC_CFG); + + if (dev->flags & IFF_PROMISC) /* Enable promiscuous mode */ + cfg |= AT91_EMAC_CAF; +@@ -589,34 +617,37 @@ static void at91ether_set_multicast_list(struct net_device *dev) + cfg &= ~AT91_EMAC_CAF; + + if (dev->flags & IFF_ALLMULTI) { /* Enable all multicast mode */ +- at91_emac_write(AT91_EMAC_HSH, -1); +- at91_emac_write(AT91_EMAC_HSL, -1); ++ at91_emac_write(lp, AT91_EMAC_HSH, -1); ++ at91_emac_write(lp, AT91_EMAC_HSL, -1); + cfg |= AT91_EMAC_MTI; + } else if (!netdev_mc_empty(dev)) { /* Enable specific multicasts */ + at91ether_sethashtable(dev); + cfg |= AT91_EMAC_MTI; + } else if (dev->flags & (~IFF_ALLMULTI)) { /* Disable all multicast mode */ +- at91_emac_write(AT91_EMAC_HSH, 0); +- at91_emac_write(AT91_EMAC_HSL, 0); ++ at91_emac_write(lp, AT91_EMAC_HSH, 0); ++ at91_emac_write(lp, AT91_EMAC_HSL, 0); + cfg &= ~AT91_EMAC_MTI; + } + +- at91_emac_write(AT91_EMAC_CFG, cfg); ++ at91_emac_write(lp, AT91_EMAC_CFG, cfg); + } + + /* ......................... ETHTOOL SUPPORT ........................... */ + + static int mdio_read(struct net_device *dev, int phy_id, int location) + { ++ struct at91_private *lp = netdev_priv(dev); + unsigned int value; + +- read_phy(phy_id, location, &value); ++ read_phy(lp, phy_id, location, &value); + return value; + } + + static void mdio_write(struct net_device *dev, int phy_id, int location, int value) + { +- write_phy(phy_id, location, value); ++ struct at91_private *lp = netdev_priv(dev); ++ ++ write_phy(lp, phy_id, location, value); + } + + static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +@@ -625,11 +656,11 @@ static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cm + int ret; + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + ret = mii_ethtool_gset(&lp->mii, cmd); + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + if (lp->phy_media == PORT_FIBRE) { /* override media type since mii.c doesn't know */ +@@ -646,11 +677,11 @@ static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cm + int ret; + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + ret = mii_ethtool_sset(&lp->mii, cmd); + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + return ret; +@@ -662,11 +693,11 @@ static int at91ether_nwayreset(struct net_device *dev) + int ret; + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + + ret = mii_nway_restart(&lp->mii); + +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + return ret; +@@ -696,9 +727,9 @@ static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) + return -EINVAL; + + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + res = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + return res; +@@ -731,11 +762,11 @@ static void at91ether_start(struct net_device *dev) + lp->rxBuffIndex = 0; + + /* Program address of descriptor list in Rx Buffer Queue register */ +- at91_emac_write(AT91_EMAC_RBQP, (unsigned long) dlist_phys); ++ at91_emac_write(lp, AT91_EMAC_RBQP, (unsigned long) dlist_phys); + + /* Enable Receive and Transmit */ +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE); ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE); + } + + /* +@@ -752,8 +783,8 @@ static int at91ether_open(struct net_device *dev) + clk_enable(lp->ether_clk); /* Re-enable Peripheral clock */ + + /* Clear internal statistics */ +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); + + /* Update the MAC address (incase user has changed it) */ + update_mac_address(dev); +@@ -762,15 +793,15 @@ static int at91ether_open(struct net_device *dev) + enable_phyirq(dev); + + /* Enable MAC interrupts */ +- at91_emac_write(AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA ++ at91_emac_write(lp, AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA + | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM + | AT91_EMAC_ROVR | AT91_EMAC_ABT); + + /* Determine current link speed */ + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + update_linkspeed(dev, 0); +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + + at91ether_start(dev); +@@ -787,14 +818,14 @@ static int at91ether_close(struct net_device *dev) + unsigned long ctl; + + /* Disable Receiver and Transmitter */ +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE)); ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE)); + + /* Disable PHY interrupt */ + disable_phyirq(dev); + + /* Disable MAC interrupts */ +- at91_emac_write(AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA ++ at91_emac_write(lp, AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA + | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM + | AT91_EMAC_ROVR | AT91_EMAC_ABT); + +@@ -812,7 +843,7 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) + { + struct at91_private *lp = netdev_priv(dev); + +- if (at91_emac_read(AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) { ++ if (at91_emac_read(lp, AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) { + netif_stop_queue(dev); + + /* Store packet information (to free when Tx completed) */ +@@ -822,9 +853,9 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) + dev->stats.tx_bytes += skb->len; + + /* Set address of the data in the Transmit Address register */ +- at91_emac_write(AT91_EMAC_TAR, lp->skb_physaddr); ++ at91_emac_write(lp, AT91_EMAC_TAR, lp->skb_physaddr); + /* Set length of the packet in the Transmit Control register */ +- at91_emac_write(AT91_EMAC_TCR, skb->len); ++ at91_emac_write(lp, AT91_EMAC_TCR, skb->len); + + } else { + printk(KERN_ERR "at91_ether.c: at91ether_start_xmit() called, but device is busy!\n"); +@@ -841,31 +872,32 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) + */ + static struct net_device_stats *at91ether_stats(struct net_device *dev) + { ++ struct at91_private *lp = netdev_priv(dev); + int ale, lenerr, seqe, lcol, ecol; + + if (netif_running(dev)) { +- dev->stats.rx_packets += at91_emac_read(AT91_EMAC_OK); /* Good frames received */ +- ale = at91_emac_read(AT91_EMAC_ALE); ++ dev->stats.rx_packets += at91_emac_read(lp, AT91_EMAC_OK); /* Good frames received */ ++ ale = at91_emac_read(lp, AT91_EMAC_ALE); + dev->stats.rx_frame_errors += ale; /* Alignment errors */ +- lenerr = at91_emac_read(AT91_EMAC_ELR) + at91_emac_read(AT91_EMAC_USF); ++ lenerr = at91_emac_read(lp, AT91_EMAC_ELR) + at91_emac_read(lp, AT91_EMAC_USF); + dev->stats.rx_length_errors += lenerr; /* Excessive Length or Undersize Frame error */ +- seqe = at91_emac_read(AT91_EMAC_SEQE); ++ seqe = at91_emac_read(lp, AT91_EMAC_SEQE); + dev->stats.rx_crc_errors += seqe; /* CRC error */ +- dev->stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC); /* Receive buffer not available */ ++ dev->stats.rx_fifo_errors += at91_emac_read(lp, AT91_EMAC_DRFC);/* Receive buffer not available */ + dev->stats.rx_errors += (ale + lenerr + seqe +- + at91_emac_read(AT91_EMAC_CDE) + at91_emac_read(AT91_EMAC_RJB)); ++ + at91_emac_read(lp, AT91_EMAC_CDE) + at91_emac_read(lp, AT91_EMAC_RJB)); + +- dev->stats.tx_packets += at91_emac_read(AT91_EMAC_FRA); /* Frames successfully transmitted */ +- dev->stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE); /* Transmit FIFO underruns */ +- dev->stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE); /* Carrier Sense errors */ +- dev->stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);/* Heartbeat error */ ++ dev->stats.tx_packets += at91_emac_read(lp, AT91_EMAC_FRA); /* Frames successfully transmitted */ ++ dev->stats.tx_fifo_errors += at91_emac_read(lp, AT91_EMAC_TUE); /* Transmit FIFO underruns */ ++ dev->stats.tx_carrier_errors += at91_emac_read(lp, AT91_EMAC_CSE); /* Carrier Sense errors */ ++ dev->stats.tx_heartbeat_errors += at91_emac_read(lp, AT91_EMAC_SQEE);/* Heartbeat error */ + +- lcol = at91_emac_read(AT91_EMAC_LCOL); +- ecol = at91_emac_read(AT91_EMAC_ECOL); ++ lcol = at91_emac_read(lp, AT91_EMAC_LCOL); ++ ecol = at91_emac_read(lp, AT91_EMAC_ECOL); + dev->stats.tx_window_errors += lcol; /* Late collisions */ + dev->stats.tx_aborted_errors += ecol; /* 16 collisions */ + +- dev->stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + lcol + ecol); ++ dev->stats.collisions += (at91_emac_read(lp, AT91_EMAC_SCOL) + at91_emac_read(lp, AT91_EMAC_MCOL) + lcol + ecol); + } + return &dev->stats; + } +@@ -922,7 +954,7 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) + + /* MAC Interrupt Status register indicates what interrupts are pending. + It is automatically cleared once read. */ +- intstatus = at91_emac_read(AT91_EMAC_ISR); ++ intstatus = at91_emac_read(lp, AT91_EMAC_ISR); + + if (intstatus & AT91_EMAC_RCOM) /* Receive complete */ + at91ether_rx(dev); +@@ -942,9 +974,9 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) + + /* Work-around for Errata #11 */ + if (intstatus & AT91_EMAC_RBNA) { +- ctl = at91_emac_read(AT91_EMAC_CTL); +- at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE); +- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE); ++ ctl = at91_emac_read(lp, AT91_EMAC_CTL); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE); ++ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE); + } + + if (intstatus & AT91_EMAC_ROVR) +@@ -980,189 +1012,199 @@ static const struct net_device_ops at91ether_netdev_ops = { + }; + + /* +- * Initialize the ethernet interface ++ * Detect the PHY type, and its address. + */ +-static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, +- struct platform_device *pdev, struct clk *ether_clk) ++static int __init at91ether_phy_detect(struct at91_private *lp) ++{ ++ unsigned int phyid1, phyid2; ++ unsigned long phy_id; ++ unsigned short phy_address = 0; ++ ++ while (phy_address < PHY_MAX_ADDR) { ++ /* Read the PHY ID registers */ ++ enable_mdi(lp); ++ read_phy(lp, phy_address, MII_PHYSID1, &phyid1); ++ read_phy(lp, phy_address, MII_PHYSID2, &phyid2); ++ disable_mdi(lp); ++ ++ phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); ++ switch (phy_id) { ++ case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ ++ case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ ++ case MII_LXT971A_ID: /* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */ ++ case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ ++ case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ ++ case MII_DP83847_ID: /* National Semiconductor DP83847: */ ++ case MII_DP83848_ID: /* National Semiconductor DP83848: */ ++ case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ ++ case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ ++ case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ ++ case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ ++ /* store detected values */ ++ lp->phy_type = phy_id; /* Type of PHY connected */ ++ lp->phy_address = phy_address; /* MDI address of PHY */ ++ return 1; ++ } ++ ++ phy_address++; ++ } ++ ++ return 0; /* not detected */ ++} ++ ++ ++/* ++ * Detect MAC & PHY and perform ethernet interface initialization ++ */ ++static int __init at91ether_probe(struct platform_device *pdev) + { + struct macb_platform_data *board_data = pdev->dev.platform_data; ++ struct resource *regs; + struct net_device *dev; + struct at91_private *lp; +- unsigned int val; + int res; + ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) ++ return -ENOENT; ++ + dev = alloc_etherdev(sizeof(struct at91_private)); + if (!dev) + return -ENOMEM; + +- dev->base_addr = AT91_VA_BASE_EMAC; +- dev->irq = AT91RM9200_ID_EMAC; ++ lp = netdev_priv(dev); ++ lp->board_data = *board_data; ++ spin_lock_init(&lp->lock); ++ ++ dev->base_addr = regs->start; /* physical base address */ ++ lp->emac_base = ioremap(regs->start, regs->end - regs->start + 1); ++ if (!lp->emac_base) { ++ res = -ENOMEM; ++ goto err_free_dev; ++ } ++ ++ /* Clock */ ++ lp->ether_clk = clk_get(&pdev->dev, "ether_clk"); ++ if (IS_ERR(lp->ether_clk)) { ++ res = -ENODEV; ++ goto err_ioumap; ++ } ++ clk_enable(lp->ether_clk); + + /* Install the interrupt handler */ ++ dev->irq = platform_get_irq(pdev, 0); + if (request_irq(dev->irq, at91ether_interrupt, 0, dev->name, dev)) { +- free_netdev(dev); +- return -EBUSY; ++ res = -EBUSY; ++ goto err_disable_clock; + } + + /* Allocate memory for DMA Receive descriptors */ +- lp = netdev_priv(dev); + lp->dlist = (struct recv_desc_bufs *) dma_alloc_coherent(NULL, sizeof(struct recv_desc_bufs), (dma_addr_t *) &lp->dlist_phys, GFP_KERNEL); + if (lp->dlist == NULL) { +- free_irq(dev->irq, dev); +- free_netdev(dev); +- return -ENOMEM; ++ res = -ENOMEM; ++ goto err_free_irq; + } +- lp->board_data = *board_data; +- lp->ether_clk = ether_clk; +- platform_set_drvdata(pdev, dev); +- +- spin_lock_init(&lp->lock); + + ether_setup(dev); + dev->netdev_ops = &at91ether_netdev_ops; + dev->ethtool_ops = &at91ether_ethtool_ops; +- ++ platform_set_drvdata(pdev, dev); + SET_NETDEV_DEV(dev, &pdev->dev); + + get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */ + update_mac_address(dev); /* Program ethernet address into MAC */ + +- at91_emac_write(AT91_EMAC_CTL, 0); ++ at91_emac_write(lp, AT91_EMAC_CTL, 0); + +- if (lp->board_data.is_rmii) +- at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII); ++ if (board_data->is_rmii) ++ at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII); + else +- at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG); ++ at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG); + +- /* Perform PHY-specific initialization */ +- spin_lock_irq(&lp->lock); +- enable_mdi(); +- if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { +- read_phy(phy_address, MII_DSCR_REG, &val); +- if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */ +- lp->phy_media = PORT_FIBRE; +- } else if (machine_is_csb337()) { +- /* mix link activity status into LED2 link state */ +- write_phy(phy_address, MII_LEDCTRL_REG, 0x0d22); +- } else if (machine_is_ecbat91()) +- write_phy(phy_address, MII_LEDCTRL_REG, 0x156A); ++ /* Detect PHY */ ++ if (!at91ether_phy_detect(lp)) { ++ printk(KERN_ERR "at91_ether: Could not detect ethernet PHY\n"); ++ res = -ENODEV; ++ goto err_free_dmamem; ++ } + +- disable_mdi(); +- spin_unlock_irq(&lp->lock); ++ initialize_phy(lp); + + lp->mii.dev = dev; /* Support for ethtool */ + lp->mii.mdio_read = mdio_read; + lp->mii.mdio_write = mdio_write; +- lp->mii.phy_id = phy_address; ++ lp->mii.phy_id = lp->phy_address; + lp->mii.phy_id_mask = 0x1f; + lp->mii.reg_num_mask = 0x1f; + +- lp->phy_type = phy_type; /* Type of PHY connected */ +- lp->phy_address = phy_address; /* MDI address of PHY */ +- + /* Register the network interface */ + res = register_netdev(dev); +- if (res) { +- free_irq(dev->irq, dev); +- free_netdev(dev); +- dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); +- return res; +- } ++ if (res) ++ goto err_free_dmamem; + + /* Determine current link speed */ + spin_lock_irq(&lp->lock); +- enable_mdi(); ++ enable_mdi(lp); + update_linkspeed(dev, 0); +- disable_mdi(); ++ disable_mdi(lp); + spin_unlock_irq(&lp->lock); + netif_carrier_off(dev); /* will be enabled in open() */ + + /* If board has no PHY IRQ, use a timer to poll the PHY */ +- if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { ++ if (gpio_is_valid(lp->board_data.phy_irq_pin)) { ++ gpio_request(board_data->phy_irq_pin, "ethernet_phy"); ++ } else { ++ /* If board has no PHY IRQ, use a timer to poll the PHY */ + init_timer(&lp->check_timer); + lp->check_timer.data = (unsigned long)dev; + lp->check_timer.function = at91ether_check_link; +- } else if (lp->board_data.phy_irq_pin >= 32) +- gpio_request(lp->board_data.phy_irq_pin, "ethernet_phy"); ++ } + + /* Display ethernet banner */ + printk(KERN_INFO "%s: AT91 ethernet at 0x%08x int=%d %s%s (%pM)\n", + dev->name, (uint) dev->base_addr, dev->irq, +- at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-", +- at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex", ++ at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-", ++ at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex", + dev->dev_addr); +- if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) ++ if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) + printk(KERN_INFO "%s: Davicom 9161 PHY %s\n", dev->name, (lp->phy_media == PORT_FIBRE) ? "(Fiber)" : "(Copper)"); +- else if (phy_type == MII_LXT971A_ID) ++ else if (lp->phy_type == MII_LXT971A_ID) + printk(KERN_INFO "%s: Intel LXT971A PHY\n", dev->name); +- else if (phy_type == MII_RTL8201_ID) ++ else if (lp->phy_type == MII_RTL8201_ID) + printk(KERN_INFO "%s: Realtek RTL8201(B)L PHY\n", dev->name); +- else if (phy_type == MII_BCM5221_ID) ++ else if (lp->phy_type == MII_BCM5221_ID) + printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name); +- else if (phy_type == MII_DP83847_ID) ++ else if (lp->phy_type == MII_DP83847_ID) + printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name); +- else if (phy_type == MII_DP83848_ID) ++ else if (lp->phy_type == MII_DP83848_ID) + printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name); +- else if (phy_type == MII_AC101L_ID) ++ else if (lp->phy_type == MII_AC101L_ID) + printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name); +- else if (phy_type == MII_KS8721_ID) ++ else if (lp->phy_type == MII_KS8721_ID) + printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name); +- else if (phy_type == MII_T78Q21x3_ID) ++ else if (lp->phy_type == MII_T78Q21x3_ID) + printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name); +- else if (phy_type == MII_LAN83C185_ID) ++ else if (lp->phy_type == MII_LAN83C185_ID) + printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name); + +- return 0; +-} +- +-/* +- * Detect MAC and PHY and perform initialization +- */ +-static int __init at91ether_probe(struct platform_device *pdev) +-{ +- unsigned int phyid1, phyid2; +- int detected = -1; +- unsigned long phy_id; +- unsigned short phy_address = 0; +- struct clk *ether_clk; +- +- ether_clk = clk_get(&pdev->dev, "ether_clk"); +- if (IS_ERR(ether_clk)) { +- printk(KERN_ERR "at91_ether: no clock defined\n"); +- return -ENODEV; +- } +- clk_enable(ether_clk); /* Enable Peripheral clock */ +- +- while ((detected != 0) && (phy_address < 32)) { +- /* Read the PHY ID registers */ +- enable_mdi(); +- read_phy(phy_address, MII_PHYSID1, &phyid1); +- read_phy(phy_address, MII_PHYSID2, &phyid2); +- disable_mdi(); +- +- phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); +- switch (phy_id) { +- case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ +- case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ +- case MII_LXT971A_ID: /* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */ +- case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ +- case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ +- case MII_DP83847_ID: /* National Semiconductor DP83847: */ +- case MII_DP83848_ID: /* National Semiconductor DP83848: */ +- case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ +- case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ +- case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ +- case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ +- detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk); +- break; +- } ++ clk_disable(lp->ether_clk); /* Disable Peripheral clock */ + +- phy_address++; +- } ++ return 0; + +- clk_disable(ether_clk); /* Disable Peripheral clock */ + +- return detected; ++err_free_dmamem: ++ platform_set_drvdata(pdev, NULL); ++ dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); ++err_free_irq: ++ free_irq(dev->irq, dev); ++err_disable_clock: ++ clk_disable(lp->ether_clk); ++ clk_put(lp->ether_clk); ++err_ioumap: ++ iounmap(lp->emac_base); ++err_free_dev: ++ free_netdev(dev); ++ return res; + } + + static int __devexit at91ether_remove(struct platform_device *pdev) +@@ -1170,8 +1212,7 @@ static int __devexit at91ether_remove(struct platform_device *pdev) + struct net_device *dev = platform_get_drvdata(pdev); + struct at91_private *lp = netdev_priv(dev); + +- if (gpio_is_valid(lp->board_data.phy_irq_pin) && +- lp->board_data.phy_irq_pin >= 32) ++ if (gpio_is_valid(lp->board_data.phy_irq_pin)) + gpio_free(lp->board_data.phy_irq_pin); + + unregister_netdev(dev); +diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h +index 3725fbb0..0ef6328 100644 +--- a/drivers/net/ethernet/cadence/at91_ether.h ++++ b/drivers/net/ethernet/cadence/at91_ether.h +@@ -88,6 +88,7 @@ struct at91_private + struct macb_platform_data board_data; /* board-specific + * configuration (shared with + * macb for common data */ ++ void __iomem *emac_base; /* base register address */ + struct clk *ether_clk; /* clock */ + + /* PHY */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0069-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch b/patches.at91/0069-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch deleted file mode 100644 index d2942666314b..000000000000 --- a/patches.at91/0069-AT91-Remove-fixed-mapping-for-AT91RM9200-ethernet.patch +++ /dev/null @@ -1,1121 +0,0 @@ -From 272e7886507edd10614cdb998e2374afd122149e Mon Sep 17 00:00:00 2001 -From: Andrew Victor -Date: Thu, 26 Apr 2012 00:30:42 +0000 -Subject: AT91: Remove fixed mapping for AT91RM9200 ethernet - -The AT91RM9200 Ethernet controller still has a fixed IO mapping. -So: -* Remove the fixed IO mapping and AT91_VA_BASE_EMAC definition. -* Pass the physical base-address via platform-resources to the driver. -* Convert at91_ether.c driver to perform an ioremap(). -* Ethernet PHY detection needs to be performed during the driver -initialization process, it can no longer be done first. - -Signed-off-by: Andrew Victor -Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD -Signed-off-by: Nicolas Ferre -Signed-off-by: David S. Miller ---- - arch/arm/mach-at91/at91rm9200.c | 10 - - arch/arm/mach-at91/at91rm9200_devices.c | 4 +- - arch/arm/mach-at91/include/mach/hardware.h | 1 - - drivers/net/ethernet/cadence/at91_ether.c | 527 ++++++++++++++++------------- - drivers/net/ethernet/cadence/at91_ether.h | 1 + - 5 files changed, 287 insertions(+), 256 deletions(-) - -diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c -index 801c30b..6f50c67 100644 ---- a/arch/arm/mach-at91/at91rm9200.c -+++ b/arch/arm/mach-at91/at91rm9200.c -@@ -27,15 +27,6 @@ - #include "clock.h" - #include "sam9_smc.h" - --static struct map_desc at91rm9200_io_desc[] __initdata = { -- { -- .virtual = AT91_VA_BASE_EMAC, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, --}; -- - /* -------------------------------------------------------------------- - * Clocks - * -------------------------------------------------------------------- */ -@@ -304,7 +295,6 @@ static void __init at91rm9200_map_io(void) - { - /* Map peripherals */ - at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE); -- iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); - } - - static void __init at91rm9200_ioremap_registers(void) -diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c -index 04d69d3..01fb732 100644 ---- a/arch/arm/mach-at91/at91rm9200_devices.c -+++ b/arch/arm/mach-at91/at91rm9200_devices.c -@@ -140,8 +140,8 @@ static struct macb_platform_data eth_data; - - static struct resource eth_resources[] = { - [0] = { -- .start = AT91_VA_BASE_EMAC, -- .end = AT91_VA_BASE_EMAC + SZ_16K - 1, -+ .start = AT91RM9200_BASE_EMAC, -+ .end = AT91RM9200_BASE_EMAC + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { -diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h -index 24b46bd..09242b6 100644 ---- a/arch/arm/mach-at91/include/mach/hardware.h -+++ b/arch/arm/mach-at91/include/mach/hardware.h -@@ -85,7 +85,6 @@ - * Virtual to Physical Address mapping for IO devices. - */ - #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) --#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) - - /* Internal SRAM is mapped below the IO devices */ - #define AT91_SRAM_MAX SZ_1M -diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c -index 9061170..62761e1 100644 ---- a/drivers/net/ethernet/cadence/at91_ether.c -+++ b/drivers/net/ethernet/cadence/at91_ether.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -51,21 +52,17 @@ - /* - * Read from a EMAC register. - */ --static inline unsigned long at91_emac_read(unsigned int reg) -+static inline unsigned long at91_emac_read(struct at91_private *lp, unsigned int reg) - { -- void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC; -- -- return __raw_readl(emac_base + reg); -+ return __raw_readl(lp->emac_base + reg); - } - - /* - * Write to a EMAC register. - */ --static inline void at91_emac_write(unsigned int reg, unsigned long value) -+static inline void at91_emac_write(struct at91_private *lp, unsigned int reg, unsigned long value) - { -- void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC; -- -- __raw_writel(value, emac_base + reg); -+ __raw_writel(value, lp->emac_base + reg); - } - - /* ........................... PHY INTERFACE ........................... */ -@@ -75,32 +72,33 @@ static inline void at91_emac_write(unsigned int reg, unsigned long value) - * When not called from an interrupt-handler, access to the PHY must be - * protected by a spinlock. - */ --static void enable_mdi(void) -+static void enable_mdi(struct at91_private *lp) - { - unsigned long ctl; - -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ - } - - /* - * Disable the MDIO bit in the MAC control register - */ --static void disable_mdi(void) -+static void disable_mdi(struct at91_private *lp) - { - unsigned long ctl; - -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ - } - - /* - * Wait until the PHY operation is complete. - */ --static inline void at91_phy_wait(void) { -+static inline void at91_phy_wait(struct at91_private *lp) -+{ - unsigned long timeout = jiffies + 2; - -- while (!(at91_emac_read(AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) { -+ while (!(at91_emac_read(lp, AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) { - if (time_after(jiffies, timeout)) { - printk("at91_ether: MIO timeout\n"); - break; -@@ -113,28 +111,28 @@ static inline void at91_phy_wait(void) { - * Write value to the a PHY register - * Note: MDI interface is assumed to already have been enabled. - */ --static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value) -+static void write_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int value) - { -- at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W -+ at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W - | ((phy_addr & 0x1f) << 23) | (address << 18) | (value & AT91_EMAC_DATA)); - - /* Wait until IDLE bit in Network Status register is cleared */ -- at91_phy_wait(); -+ at91_phy_wait(lp); - } - - /* - * Read value stored in a PHY register. - * Note: MDI interface is assumed to already have been enabled. - */ --static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value) -+static void read_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int *value) - { -- at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R -+ at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R - | ((phy_addr & 0x1f) << 23) | (address << 18)); - - /* Wait until IDLE bit in Network Status register is cleared */ -- at91_phy_wait(); -+ at91_phy_wait(lp); - -- *value = at91_emac_read(AT91_EMAC_MAN) & AT91_EMAC_DATA; -+ *value = at91_emac_read(lp, AT91_EMAC_MAN) & AT91_EMAC_DATA; - } - - /* ........................... PHY MANAGEMENT .......................... */ -@@ -158,13 +156,13 @@ static void update_linkspeed(struct net_device *dev, int silent) - } - - /* Link up, or auto-negotiation still in progress */ -- read_phy(lp->phy_address, MII_BMSR, &bmsr); -- read_phy(lp->phy_address, MII_BMCR, &bmcr); -+ read_phy(lp, lp->phy_address, MII_BMSR, &bmsr); -+ read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); - if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */ - if (!(bmsr & BMSR_ANEGCOMPLETE)) - return; /* Do nothing - another interrupt generated when negotiation complete */ - -- read_phy(lp->phy_address, MII_LPA, &lpa); -+ read_phy(lp, lp->phy_address, MII_LPA, &lpa); - if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100; - else speed = SPEED_10; - if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) duplex = DUPLEX_FULL; -@@ -175,7 +173,7 @@ static void update_linkspeed(struct net_device *dev, int silent) - } - - /* Update the MAC */ -- mac_cfg = at91_emac_read(AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); -+ mac_cfg = at91_emac_read(lp, AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); - if (speed == SPEED_100) { - if (duplex == DUPLEX_FULL) /* 100 Full Duplex */ - mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD; -@@ -186,7 +184,7 @@ static void update_linkspeed(struct net_device *dev, int silent) - mac_cfg |= AT91_EMAC_FD; - else {} /* 10 Half Duplex */ - } -- at91_emac_write(AT91_EMAC_CFG, mac_cfg); -+ at91_emac_write(lp, AT91_EMAC_CFG, mac_cfg); - - if (!silent) - printk(KERN_INFO "%s: Link now %i-%s\n", dev->name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex"); -@@ -207,34 +205,34 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id) - * level-triggering. We therefore have to check if the PHY actually has - * an IRQ pending. - */ -- enable_mdi(); -+ enable_mdi(lp); - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { -- read_phy(lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */ -+ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */ - if (!(phy & (1 << 0))) - goto done; - } - else if (lp->phy_type == MII_LXT971A_ID) { -- read_phy(lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */ -+ read_phy(lp, lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */ - if (!(phy & (1 << 2))) - goto done; - } - else if (lp->phy_type == MII_BCM5221_ID) { -- read_phy(lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */ -+ read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */ - if (!(phy & (1 << 0))) - goto done; - } - else if (lp->phy_type == MII_KS8721_ID) { -- read_phy(lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */ -+ read_phy(lp, lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */ - if (!(phy & ((1 << 2) | 1))) - goto done; - } -- else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ -- read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy); -+ else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ -+ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &phy); - if (!(phy & ((1 << 2) | 1))) - goto done; - } - else if (lp->phy_type == MII_DP83848_ID) { -- read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ -+ read_phy(lp, lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ - if (!(phy & (1 << 7))) - goto done; - } -@@ -242,7 +240,7 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id) - update_linkspeed(dev, 0); - - done: -- disable_mdi(); -+ disable_mdi(lp); - - return IRQ_HANDLED; - } -@@ -273,41 +271,41 @@ static void enable_phyirq(struct net_device *dev) - } - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ -- read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); - dsintr = dsintr & ~0xf00; /* clear bits 8..11 */ -- write_phy(lp->phy_address, MII_DSINTR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); - } - else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ -- read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); - dsintr = dsintr | 0xf2; /* set bits 1, 4..7 */ -- write_phy(lp->phy_address, MII_ISINTE_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); - } - else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ - dsintr = (1 << 15) | ( 1 << 14); -- write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); - } - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ - dsintr = (1 << 10) | ( 1 << 8); -- write_phy(lp->phy_address, MII_TPISTATUS, dsintr); -+ write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); - } - else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ -- read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); - dsintr = dsintr | 0x500; /* set bits 8, 10 */ -- write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); - } - else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ -- read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); - dsintr = dsintr | 0x3c; /* set bits 2..5 */ -- write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); -- read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); -+ write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); -+ read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); - dsintr = dsintr | 0x3; /* set bits 0,1 */ -- write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); - } - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - } - -@@ -326,43 +324,43 @@ static void disable_phyirq(struct net_device *dev) - } - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ -- read_phy(lp->phy_address, MII_DSINTR_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); - dsintr = dsintr | 0xf00; /* set bits 8..11 */ -- write_phy(lp->phy_address, MII_DSINTR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); - } - else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ -- read_phy(lp->phy_address, MII_ISINTE_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); - dsintr = dsintr & ~0xf2; /* clear bits 1, 4..7 */ -- write_phy(lp->phy_address, MII_ISINTE_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); - } - else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ -- read_phy(lp->phy_address, MII_BCMINTR_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &dsintr); - dsintr = ~(1 << 14); -- write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); - } - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ -- read_phy(lp->phy_address, MII_TPISTATUS, &dsintr); -+ read_phy(lp, lp->phy_address, MII_TPISTATUS, &dsintr); - dsintr = ~((1 << 10) | (1 << 8)); -- write_phy(lp->phy_address, MII_TPISTATUS, dsintr); -+ write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); - } - else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ -- read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); - dsintr = dsintr & ~0x500; /* clear bits 8, 10 */ -- write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); - } - else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ -- read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); -+ read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); - dsintr = dsintr & ~0x3; /* clear bits 0, 1 */ -- write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); -- read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); -+ write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); -+ read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); - dsintr = dsintr & ~0x3c; /* clear bits 2..5 */ -- write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); -+ write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); - } - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - irq_number = lp->board_data.phy_irq_pin; -@@ -379,17 +377,17 @@ static void reset_phy(struct net_device *dev) - unsigned int bmcr; - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - /* Perform PHY reset */ -- write_phy(lp->phy_address, MII_BMCR, BMCR_RESET); -+ write_phy(lp, lp->phy_address, MII_BMCR, BMCR_RESET); - - /* Wait until PHY reset is complete */ - do { -- read_phy(lp->phy_address, MII_BMCR, &bmcr); -+ read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); - } while (!(bmcr & BMCR_RESET)); - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - } - #endif -@@ -399,13 +397,37 @@ static void at91ether_check_link(unsigned long dev_id) - struct net_device *dev = (struct net_device *) dev_id; - struct at91_private *lp = netdev_priv(dev); - -- enable_mdi(); -+ enable_mdi(lp); - update_linkspeed(dev, 1); -- disable_mdi(); -+ disable_mdi(lp); - - mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL); - } - -+/* -+ * Perform any PHY-specific initialization. -+ */ -+static void __init initialize_phy(struct at91_private *lp) -+{ -+ unsigned int val; -+ -+ spin_lock_irq(&lp->lock); -+ enable_mdi(lp); -+ -+ if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { -+ read_phy(lp, lp->phy_address, MII_DSCR_REG, &val); -+ if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */ -+ lp->phy_media = PORT_FIBRE; -+ } else if (machine_is_csb337()) { -+ /* mix link activity status into LED2 link state */ -+ write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x0d22); -+ } else if (machine_is_ecbat91()) -+ write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x156A); -+ -+ disable_mdi(lp); -+ spin_unlock_irq(&lp->lock); -+} -+ - /* ......................... ADDRESS MANAGEMENT ........................ */ - - /* -@@ -454,17 +476,19 @@ static short __init unpack_mac_address(struct net_device *dev, unsigned int hi, - */ - static void __init get_mac_address(struct net_device *dev) - { -+ struct at91_private *lp = netdev_priv(dev); -+ - /* Check Specific-Address 1 */ -- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA1H), at91_emac_read(AT91_EMAC_SA1L))) -+ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA1H), at91_emac_read(lp, AT91_EMAC_SA1L))) - return; - /* Check Specific-Address 2 */ -- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA2H), at91_emac_read(AT91_EMAC_SA2L))) -+ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA2H), at91_emac_read(lp, AT91_EMAC_SA2L))) - return; - /* Check Specific-Address 3 */ -- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA3H), at91_emac_read(AT91_EMAC_SA3L))) -+ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA3H), at91_emac_read(lp, AT91_EMAC_SA3L))) - return; - /* Check Specific-Address 4 */ -- if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA4H), at91_emac_read(AT91_EMAC_SA4L))) -+ if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA4H), at91_emac_read(lp, AT91_EMAC_SA4L))) - return; - - printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n"); -@@ -475,11 +499,13 @@ static void __init get_mac_address(struct net_device *dev) - */ - static void update_mac_address(struct net_device *dev) - { -- at91_emac_write(AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0])); -- at91_emac_write(AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4])); -+ struct at91_private *lp = netdev_priv(dev); - -- at91_emac_write(AT91_EMAC_SA2L, 0); -- at91_emac_write(AT91_EMAC_SA2H, 0); -+ at91_emac_write(lp, AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0])); -+ at91_emac_write(lp, AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4])); -+ -+ at91_emac_write(lp, AT91_EMAC_SA2L, 0); -+ at91_emac_write(lp, AT91_EMAC_SA2H, 0); - } - - /* -@@ -559,6 +585,7 @@ static int hash_get_index(__u8 *addr) - */ - static void at91ether_sethashtable(struct net_device *dev) - { -+ struct at91_private *lp = netdev_priv(dev); - struct netdev_hw_addr *ha; - unsigned long mc_filter[2]; - unsigned int bitnr; -@@ -570,8 +597,8 @@ static void at91ether_sethashtable(struct net_device *dev) - mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); - } - -- at91_emac_write(AT91_EMAC_HSL, mc_filter[0]); -- at91_emac_write(AT91_EMAC_HSH, mc_filter[1]); -+ at91_emac_write(lp, AT91_EMAC_HSL, mc_filter[0]); -+ at91_emac_write(lp, AT91_EMAC_HSH, mc_filter[1]); - } - - /* -@@ -579,9 +606,10 @@ static void at91ether_sethashtable(struct net_device *dev) - */ - static void at91ether_set_multicast_list(struct net_device *dev) - { -+ struct at91_private *lp = netdev_priv(dev); - unsigned long cfg; - -- cfg = at91_emac_read(AT91_EMAC_CFG); -+ cfg = at91_emac_read(lp, AT91_EMAC_CFG); - - if (dev->flags & IFF_PROMISC) /* Enable promiscuous mode */ - cfg |= AT91_EMAC_CAF; -@@ -589,34 +617,37 @@ static void at91ether_set_multicast_list(struct net_device *dev) - cfg &= ~AT91_EMAC_CAF; - - if (dev->flags & IFF_ALLMULTI) { /* Enable all multicast mode */ -- at91_emac_write(AT91_EMAC_HSH, -1); -- at91_emac_write(AT91_EMAC_HSL, -1); -+ at91_emac_write(lp, AT91_EMAC_HSH, -1); -+ at91_emac_write(lp, AT91_EMAC_HSL, -1); - cfg |= AT91_EMAC_MTI; - } else if (!netdev_mc_empty(dev)) { /* Enable specific multicasts */ - at91ether_sethashtable(dev); - cfg |= AT91_EMAC_MTI; - } else if (dev->flags & (~IFF_ALLMULTI)) { /* Disable all multicast mode */ -- at91_emac_write(AT91_EMAC_HSH, 0); -- at91_emac_write(AT91_EMAC_HSL, 0); -+ at91_emac_write(lp, AT91_EMAC_HSH, 0); -+ at91_emac_write(lp, AT91_EMAC_HSL, 0); - cfg &= ~AT91_EMAC_MTI; - } - -- at91_emac_write(AT91_EMAC_CFG, cfg); -+ at91_emac_write(lp, AT91_EMAC_CFG, cfg); - } - - /* ......................... ETHTOOL SUPPORT ........................... */ - - static int mdio_read(struct net_device *dev, int phy_id, int location) - { -+ struct at91_private *lp = netdev_priv(dev); - unsigned int value; - -- read_phy(phy_id, location, &value); -+ read_phy(lp, phy_id, location, &value); - return value; - } - - static void mdio_write(struct net_device *dev, int phy_id, int location, int value) - { -- write_phy(phy_id, location, value); -+ struct at91_private *lp = netdev_priv(dev); -+ -+ write_phy(lp, phy_id, location, value); - } - - static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -@@ -625,11 +656,11 @@ static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cm - int ret; - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - ret = mii_ethtool_gset(&lp->mii, cmd); - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - if (lp->phy_media == PORT_FIBRE) { /* override media type since mii.c doesn't know */ -@@ -646,11 +677,11 @@ static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cm - int ret; - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - ret = mii_ethtool_sset(&lp->mii, cmd); - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return ret; -@@ -662,11 +693,11 @@ static int at91ether_nwayreset(struct net_device *dev) - int ret; - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - - ret = mii_nway_restart(&lp->mii); - -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return ret; -@@ -696,9 +727,9 @@ static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) - return -EINVAL; - - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - res = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return res; -@@ -731,11 +762,11 @@ static void at91ether_start(struct net_device *dev) - lp->rxBuffIndex = 0; - - /* Program address of descriptor list in Rx Buffer Queue register */ -- at91_emac_write(AT91_EMAC_RBQP, (unsigned long) dlist_phys); -+ at91_emac_write(lp, AT91_EMAC_RBQP, (unsigned long) dlist_phys); - - /* Enable Receive and Transmit */ -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE); -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE); - } - - /* -@@ -752,8 +783,8 @@ static int at91ether_open(struct net_device *dev) - clk_enable(lp->ether_clk); /* Re-enable Peripheral clock */ - - /* Clear internal statistics */ -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); - - /* Update the MAC address (incase user has changed it) */ - update_mac_address(dev); -@@ -762,15 +793,15 @@ static int at91ether_open(struct net_device *dev) - enable_phyirq(dev); - - /* Enable MAC interrupts */ -- at91_emac_write(AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA -+ at91_emac_write(lp, AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA - | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM - | AT91_EMAC_ROVR | AT91_EMAC_ABT); - - /* Determine current link speed */ - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - update_linkspeed(dev, 0); -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - at91ether_start(dev); -@@ -787,14 +818,14 @@ static int at91ether_close(struct net_device *dev) - unsigned long ctl; - - /* Disable Receiver and Transmitter */ -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE)); -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE)); - - /* Disable PHY interrupt */ - disable_phyirq(dev); - - /* Disable MAC interrupts */ -- at91_emac_write(AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA -+ at91_emac_write(lp, AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA - | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM - | AT91_EMAC_ROVR | AT91_EMAC_ABT); - -@@ -812,7 +843,7 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) - { - struct at91_private *lp = netdev_priv(dev); - -- if (at91_emac_read(AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) { -+ if (at91_emac_read(lp, AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) { - netif_stop_queue(dev); - - /* Store packet information (to free when Tx completed) */ -@@ -822,9 +853,9 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) - dev->stats.tx_bytes += skb->len; - - /* Set address of the data in the Transmit Address register */ -- at91_emac_write(AT91_EMAC_TAR, lp->skb_physaddr); -+ at91_emac_write(lp, AT91_EMAC_TAR, lp->skb_physaddr); - /* Set length of the packet in the Transmit Control register */ -- at91_emac_write(AT91_EMAC_TCR, skb->len); -+ at91_emac_write(lp, AT91_EMAC_TCR, skb->len); - - } else { - printk(KERN_ERR "at91_ether.c: at91ether_start_xmit() called, but device is busy!\n"); -@@ -841,31 +872,32 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) - */ - static struct net_device_stats *at91ether_stats(struct net_device *dev) - { -+ struct at91_private *lp = netdev_priv(dev); - int ale, lenerr, seqe, lcol, ecol; - - if (netif_running(dev)) { -- dev->stats.rx_packets += at91_emac_read(AT91_EMAC_OK); /* Good frames received */ -- ale = at91_emac_read(AT91_EMAC_ALE); -+ dev->stats.rx_packets += at91_emac_read(lp, AT91_EMAC_OK); /* Good frames received */ -+ ale = at91_emac_read(lp, AT91_EMAC_ALE); - dev->stats.rx_frame_errors += ale; /* Alignment errors */ -- lenerr = at91_emac_read(AT91_EMAC_ELR) + at91_emac_read(AT91_EMAC_USF); -+ lenerr = at91_emac_read(lp, AT91_EMAC_ELR) + at91_emac_read(lp, AT91_EMAC_USF); - dev->stats.rx_length_errors += lenerr; /* Excessive Length or Undersize Frame error */ -- seqe = at91_emac_read(AT91_EMAC_SEQE); -+ seqe = at91_emac_read(lp, AT91_EMAC_SEQE); - dev->stats.rx_crc_errors += seqe; /* CRC error */ -- dev->stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC); /* Receive buffer not available */ -+ dev->stats.rx_fifo_errors += at91_emac_read(lp, AT91_EMAC_DRFC);/* Receive buffer not available */ - dev->stats.rx_errors += (ale + lenerr + seqe -- + at91_emac_read(AT91_EMAC_CDE) + at91_emac_read(AT91_EMAC_RJB)); -+ + at91_emac_read(lp, AT91_EMAC_CDE) + at91_emac_read(lp, AT91_EMAC_RJB)); - -- dev->stats.tx_packets += at91_emac_read(AT91_EMAC_FRA); /* Frames successfully transmitted */ -- dev->stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE); /* Transmit FIFO underruns */ -- dev->stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE); /* Carrier Sense errors */ -- dev->stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);/* Heartbeat error */ -+ dev->stats.tx_packets += at91_emac_read(lp, AT91_EMAC_FRA); /* Frames successfully transmitted */ -+ dev->stats.tx_fifo_errors += at91_emac_read(lp, AT91_EMAC_TUE); /* Transmit FIFO underruns */ -+ dev->stats.tx_carrier_errors += at91_emac_read(lp, AT91_EMAC_CSE); /* Carrier Sense errors */ -+ dev->stats.tx_heartbeat_errors += at91_emac_read(lp, AT91_EMAC_SQEE);/* Heartbeat error */ - -- lcol = at91_emac_read(AT91_EMAC_LCOL); -- ecol = at91_emac_read(AT91_EMAC_ECOL); -+ lcol = at91_emac_read(lp, AT91_EMAC_LCOL); -+ ecol = at91_emac_read(lp, AT91_EMAC_ECOL); - dev->stats.tx_window_errors += lcol; /* Late collisions */ - dev->stats.tx_aborted_errors += ecol; /* 16 collisions */ - -- dev->stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + lcol + ecol); -+ dev->stats.collisions += (at91_emac_read(lp, AT91_EMAC_SCOL) + at91_emac_read(lp, AT91_EMAC_MCOL) + lcol + ecol); - } - return &dev->stats; - } -@@ -922,7 +954,7 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) - - /* MAC Interrupt Status register indicates what interrupts are pending. - It is automatically cleared once read. */ -- intstatus = at91_emac_read(AT91_EMAC_ISR); -+ intstatus = at91_emac_read(lp, AT91_EMAC_ISR); - - if (intstatus & AT91_EMAC_RCOM) /* Receive complete */ - at91ether_rx(dev); -@@ -942,9 +974,9 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) - - /* Work-around for Errata #11 */ - if (intstatus & AT91_EMAC_RBNA) { -- ctl = at91_emac_read(AT91_EMAC_CTL); -- at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE); -- at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE); -+ ctl = at91_emac_read(lp, AT91_EMAC_CTL); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE); -+ at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE); - } - - if (intstatus & AT91_EMAC_ROVR) -@@ -980,189 +1012,199 @@ static const struct net_device_ops at91ether_netdev_ops = { - }; - - /* -- * Initialize the ethernet interface -+ * Detect the PHY type, and its address. - */ --static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, -- struct platform_device *pdev, struct clk *ether_clk) -+static int __init at91ether_phy_detect(struct at91_private *lp) -+{ -+ unsigned int phyid1, phyid2; -+ unsigned long phy_id; -+ unsigned short phy_address = 0; -+ -+ while (phy_address < PHY_MAX_ADDR) { -+ /* Read the PHY ID registers */ -+ enable_mdi(lp); -+ read_phy(lp, phy_address, MII_PHYSID1, &phyid1); -+ read_phy(lp, phy_address, MII_PHYSID2, &phyid2); -+ disable_mdi(lp); -+ -+ phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); -+ switch (phy_id) { -+ case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ -+ case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ -+ case MII_LXT971A_ID: /* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */ -+ case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ -+ case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ -+ case MII_DP83847_ID: /* National Semiconductor DP83847: */ -+ case MII_DP83848_ID: /* National Semiconductor DP83848: */ -+ case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ -+ case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ -+ case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ -+ case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ -+ /* store detected values */ -+ lp->phy_type = phy_id; /* Type of PHY connected */ -+ lp->phy_address = phy_address; /* MDI address of PHY */ -+ return 1; -+ } -+ -+ phy_address++; -+ } -+ -+ return 0; /* not detected */ -+} -+ -+ -+/* -+ * Detect MAC & PHY and perform ethernet interface initialization -+ */ -+static int __init at91ether_probe(struct platform_device *pdev) - { - struct macb_platform_data *board_data = pdev->dev.platform_data; -+ struct resource *regs; - struct net_device *dev; - struct at91_private *lp; -- unsigned int val; - int res; - -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENOENT; -+ - dev = alloc_etherdev(sizeof(struct at91_private)); - if (!dev) - return -ENOMEM; - -- dev->base_addr = AT91_VA_BASE_EMAC; -- dev->irq = AT91RM9200_ID_EMAC; -+ lp = netdev_priv(dev); -+ lp->board_data = *board_data; -+ spin_lock_init(&lp->lock); -+ -+ dev->base_addr = regs->start; /* physical base address */ -+ lp->emac_base = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!lp->emac_base) { -+ res = -ENOMEM; -+ goto err_free_dev; -+ } -+ -+ /* Clock */ -+ lp->ether_clk = clk_get(&pdev->dev, "ether_clk"); -+ if (IS_ERR(lp->ether_clk)) { -+ res = -ENODEV; -+ goto err_ioumap; -+ } -+ clk_enable(lp->ether_clk); - - /* Install the interrupt handler */ -+ dev->irq = platform_get_irq(pdev, 0); - if (request_irq(dev->irq, at91ether_interrupt, 0, dev->name, dev)) { -- free_netdev(dev); -- return -EBUSY; -+ res = -EBUSY; -+ goto err_disable_clock; - } - - /* Allocate memory for DMA Receive descriptors */ -- lp = netdev_priv(dev); - lp->dlist = (struct recv_desc_bufs *) dma_alloc_coherent(NULL, sizeof(struct recv_desc_bufs), (dma_addr_t *) &lp->dlist_phys, GFP_KERNEL); - if (lp->dlist == NULL) { -- free_irq(dev->irq, dev); -- free_netdev(dev); -- return -ENOMEM; -+ res = -ENOMEM; -+ goto err_free_irq; - } -- lp->board_data = *board_data; -- lp->ether_clk = ether_clk; -- platform_set_drvdata(pdev, dev); -- -- spin_lock_init(&lp->lock); - - ether_setup(dev); - dev->netdev_ops = &at91ether_netdev_ops; - dev->ethtool_ops = &at91ether_ethtool_ops; -- -+ platform_set_drvdata(pdev, dev); - SET_NETDEV_DEV(dev, &pdev->dev); - - get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */ - update_mac_address(dev); /* Program ethernet address into MAC */ - -- at91_emac_write(AT91_EMAC_CTL, 0); -+ at91_emac_write(lp, AT91_EMAC_CTL, 0); - -- if (lp->board_data.is_rmii) -- at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII); -+ if (board_data->is_rmii) -+ at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII); - else -- at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG); -+ at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG); - -- /* Perform PHY-specific initialization */ -- spin_lock_irq(&lp->lock); -- enable_mdi(); -- if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { -- read_phy(phy_address, MII_DSCR_REG, &val); -- if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */ -- lp->phy_media = PORT_FIBRE; -- } else if (machine_is_csb337()) { -- /* mix link activity status into LED2 link state */ -- write_phy(phy_address, MII_LEDCTRL_REG, 0x0d22); -- } else if (machine_is_ecbat91()) -- write_phy(phy_address, MII_LEDCTRL_REG, 0x156A); -+ /* Detect PHY */ -+ if (!at91ether_phy_detect(lp)) { -+ printk(KERN_ERR "at91_ether: Could not detect ethernet PHY\n"); -+ res = -ENODEV; -+ goto err_free_dmamem; -+ } - -- disable_mdi(); -- spin_unlock_irq(&lp->lock); -+ initialize_phy(lp); - - lp->mii.dev = dev; /* Support for ethtool */ - lp->mii.mdio_read = mdio_read; - lp->mii.mdio_write = mdio_write; -- lp->mii.phy_id = phy_address; -+ lp->mii.phy_id = lp->phy_address; - lp->mii.phy_id_mask = 0x1f; - lp->mii.reg_num_mask = 0x1f; - -- lp->phy_type = phy_type; /* Type of PHY connected */ -- lp->phy_address = phy_address; /* MDI address of PHY */ -- - /* Register the network interface */ - res = register_netdev(dev); -- if (res) { -- free_irq(dev->irq, dev); -- free_netdev(dev); -- dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); -- return res; -- } -+ if (res) -+ goto err_free_dmamem; - - /* Determine current link speed */ - spin_lock_irq(&lp->lock); -- enable_mdi(); -+ enable_mdi(lp); - update_linkspeed(dev, 0); -- disable_mdi(); -+ disable_mdi(lp); - spin_unlock_irq(&lp->lock); - netif_carrier_off(dev); /* will be enabled in open() */ - - /* If board has no PHY IRQ, use a timer to poll the PHY */ -- if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { -+ if (gpio_is_valid(lp->board_data.phy_irq_pin)) { -+ gpio_request(board_data->phy_irq_pin, "ethernet_phy"); -+ } else { -+ /* If board has no PHY IRQ, use a timer to poll the PHY */ - init_timer(&lp->check_timer); - lp->check_timer.data = (unsigned long)dev; - lp->check_timer.function = at91ether_check_link; -- } else if (lp->board_data.phy_irq_pin >= 32) -- gpio_request(lp->board_data.phy_irq_pin, "ethernet_phy"); -+ } - - /* Display ethernet banner */ - printk(KERN_INFO "%s: AT91 ethernet at 0x%08x int=%d %s%s (%pM)\n", - dev->name, (uint) dev->base_addr, dev->irq, -- at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-", -- at91_emac_read(AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex", -+ at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-", -+ at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex", - dev->dev_addr); -- if ((phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) -+ if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) - printk(KERN_INFO "%s: Davicom 9161 PHY %s\n", dev->name, (lp->phy_media == PORT_FIBRE) ? "(Fiber)" : "(Copper)"); -- else if (phy_type == MII_LXT971A_ID) -+ else if (lp->phy_type == MII_LXT971A_ID) - printk(KERN_INFO "%s: Intel LXT971A PHY\n", dev->name); -- else if (phy_type == MII_RTL8201_ID) -+ else if (lp->phy_type == MII_RTL8201_ID) - printk(KERN_INFO "%s: Realtek RTL8201(B)L PHY\n", dev->name); -- else if (phy_type == MII_BCM5221_ID) -+ else if (lp->phy_type == MII_BCM5221_ID) - printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name); -- else if (phy_type == MII_DP83847_ID) -+ else if (lp->phy_type == MII_DP83847_ID) - printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name); -- else if (phy_type == MII_DP83848_ID) -+ else if (lp->phy_type == MII_DP83848_ID) - printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name); -- else if (phy_type == MII_AC101L_ID) -+ else if (lp->phy_type == MII_AC101L_ID) - printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name); -- else if (phy_type == MII_KS8721_ID) -+ else if (lp->phy_type == MII_KS8721_ID) - printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name); -- else if (phy_type == MII_T78Q21x3_ID) -+ else if (lp->phy_type == MII_T78Q21x3_ID) - printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name); -- else if (phy_type == MII_LAN83C185_ID) -+ else if (lp->phy_type == MII_LAN83C185_ID) - printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name); - -- return 0; --} -- --/* -- * Detect MAC and PHY and perform initialization -- */ --static int __init at91ether_probe(struct platform_device *pdev) --{ -- unsigned int phyid1, phyid2; -- int detected = -1; -- unsigned long phy_id; -- unsigned short phy_address = 0; -- struct clk *ether_clk; -- -- ether_clk = clk_get(&pdev->dev, "ether_clk"); -- if (IS_ERR(ether_clk)) { -- printk(KERN_ERR "at91_ether: no clock defined\n"); -- return -ENODEV; -- } -- clk_enable(ether_clk); /* Enable Peripheral clock */ -- -- while ((detected != 0) && (phy_address < 32)) { -- /* Read the PHY ID registers */ -- enable_mdi(); -- read_phy(phy_address, MII_PHYSID1, &phyid1); -- read_phy(phy_address, MII_PHYSID2, &phyid2); -- disable_mdi(); -- -- phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); -- switch (phy_id) { -- case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ -- case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ -- case MII_LXT971A_ID: /* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */ -- case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ -- case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ -- case MII_DP83847_ID: /* National Semiconductor DP83847: */ -- case MII_DP83848_ID: /* National Semiconductor DP83848: */ -- case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ -- case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ -- case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ -- case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ -- detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk); -- break; -- } -+ clk_disable(lp->ether_clk); /* Disable Peripheral clock */ - -- phy_address++; -- } -+ return 0; - -- clk_disable(ether_clk); /* Disable Peripheral clock */ - -- return detected; -+err_free_dmamem: -+ platform_set_drvdata(pdev, NULL); -+ dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); -+err_free_irq: -+ free_irq(dev->irq, dev); -+err_disable_clock: -+ clk_disable(lp->ether_clk); -+ clk_put(lp->ether_clk); -+err_ioumap: -+ iounmap(lp->emac_base); -+err_free_dev: -+ free_netdev(dev); -+ return res; - } - - static int __devexit at91ether_remove(struct platform_device *pdev) -@@ -1170,8 +1212,7 @@ static int __devexit at91ether_remove(struct platform_device *pdev) - struct net_device *dev = platform_get_drvdata(pdev); - struct at91_private *lp = netdev_priv(dev); - -- if (gpio_is_valid(lp->board_data.phy_irq_pin) && -- lp->board_data.phy_irq_pin >= 32) -+ if (gpio_is_valid(lp->board_data.phy_irq_pin)) - gpio_free(lp->board_data.phy_irq_pin); - - unregister_netdev(dev); -diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h -index 3725fbb0..0ef6328 100644 ---- a/drivers/net/ethernet/cadence/at91_ether.h -+++ b/drivers/net/ethernet/cadence/at91_ether.h -@@ -88,6 +88,7 @@ struct at91_private - struct macb_platform_data board_data; /* board-specific - * configuration (shared with - * macb for common data */ -+ void __iomem *emac_base; /* base register address */ - struct clk *ether_clk; /* clock */ - - /* PHY */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0069-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch b/patches.at91/0069-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch new file mode 100644 index 000000000000..6148ded63b13 --- /dev/null +++ b/patches.at91/0069-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch @@ -0,0 +1,64 @@ +From 8d5bf013fc624b1abb36240dd06dc5b43201e2a9 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Thu, 26 Apr 2012 00:30:43 +0000 +Subject: net/at91_ether: use gpio_to_irq for phy IRQ line + +commit 86cc070eb19640d42941d3074e42c761d4c1c59c upstream. + +Use the gpio_to_irq() function to retrieve the phy IRQ line +from the GPIO pin specification. +This fix is needed now that we have moved to irqdomains on AT91. + +Reported-by: Jamie Iles +Signed-off-by: Nicolas Ferre +Cc: Andrew Victor +Cc: David S. Miller +Cc: netdev@vger.kernel.org +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/cadence/at91_ether.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c +index 62761e1..7788419 100644 +--- a/drivers/net/ethernet/cadence/at91_ether.c ++++ b/drivers/net/ethernet/cadence/at91_ether.c +@@ -263,7 +263,7 @@ static void enable_phyirq(struct net_device *dev) + return; + } + +- irq_number = lp->board_data.phy_irq_pin; ++ irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); + status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); + if (status) { + printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); +@@ -363,7 +363,7 @@ static void disable_phyirq(struct net_device *dev) + disable_mdi(lp); + spin_unlock_irq(&lp->lock); + +- irq_number = lp->board_data.phy_irq_pin; ++ irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); + free_irq(irq_number, dev); /* Free interrupt handler */ + } + +@@ -1234,7 +1234,7 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) + + if (netif_running(net_dev)) { + if (gpio_is_valid(lp->board_data.phy_irq_pin)) { +- int phy_irq = lp->board_data.phy_irq_pin; ++ int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); + disable_irq(phy_irq); + } + +@@ -1258,7 +1258,7 @@ static int at91ether_resume(struct platform_device *pdev) + netif_start_queue(net_dev); + + if (gpio_is_valid(lp->board_data.phy_irq_pin)) { +- int phy_irq = lp->board_data.phy_irq_pin; ++ int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); + enable_irq(phy_irq); + } + } +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0070-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch b/patches.at91/0070-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch deleted file mode 100644 index 07c79ae37969..000000000000 --- a/patches.at91/0070-net-at91_ether-use-gpio_to_irq-for-phy-IRQ-line.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 4c7f53afde86fed3bbc8cb4583b46e0b154ca01f Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 26 Apr 2012 00:30:43 +0000 -Subject: net/at91_ether: use gpio_to_irq for phy IRQ line - -Use the gpio_to_irq() function to retrieve the phy IRQ line -from the GPIO pin specification. -This fix is needed now that we have moved to irqdomains on AT91. - -Reported-by: Jamie Iles -Signed-off-by: Nicolas Ferre -Cc: Andrew Victor -Cc: David S. Miller -Cc: netdev@vger.kernel.org -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/cadence/at91_ether.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c -index 62761e1..7788419 100644 ---- a/drivers/net/ethernet/cadence/at91_ether.c -+++ b/drivers/net/ethernet/cadence/at91_ether.c -@@ -263,7 +263,7 @@ static void enable_phyirq(struct net_device *dev) - return; - } - -- irq_number = lp->board_data.phy_irq_pin; -+ irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); - status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); - if (status) { - printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); -@@ -363,7 +363,7 @@ static void disable_phyirq(struct net_device *dev) - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - -- irq_number = lp->board_data.phy_irq_pin; -+ irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); - free_irq(irq_number, dev); /* Free interrupt handler */ - } - -@@ -1234,7 +1234,7 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) - - if (netif_running(net_dev)) { - if (gpio_is_valid(lp->board_data.phy_irq_pin)) { -- int phy_irq = lp->board_data.phy_irq_pin; -+ int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); - disable_irq(phy_irq); - } - -@@ -1258,7 +1258,7 @@ static int at91ether_resume(struct platform_device *pdev) - netif_start_queue(net_dev); - - if (gpio_is_valid(lp->board_data.phy_irq_pin)) { -- int phy_irq = lp->board_data.phy_irq_pin; -+ int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); - enable_irq(phy_irq); - } - } --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0070-net-macb-manage-carrier-state-with-call-to-netif_car.patch b/patches.at91/0070-net-macb-manage-carrier-state-with-call-to-netif_car.patch new file mode 100644 index 000000000000..acff002e121f --- /dev/null +++ b/patches.at91/0070-net-macb-manage-carrier-state-with-call-to-netif_car.patch @@ -0,0 +1,69 @@ +From df5dbd6c7571a36641c5ec724afb595ba2d9fa82 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Tue, 3 Jul 2012 23:14:13 +0000 +Subject: net/macb: manage carrier state with call to netif_carrier_{on|off}() + +commit 03fc4721cd96753696a988a2ba563f9f08ad4e9f upstream. + +OFF carrier state is setup in probe() open() and suspend() functions. +The carrier ON state is managed in macb_handle_link_change(). + +Signed-off-by: Nicolas Ferre +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/cadence/macb.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c +index c4834c2..6100b85 100644 +--- a/drivers/net/ethernet/cadence/macb.c ++++ b/drivers/net/ethernet/cadence/macb.c +@@ -179,13 +179,16 @@ static void macb_handle_link_change(struct net_device *dev) + spin_unlock_irqrestore(&bp->lock, flags); + + if (status_change) { +- if (phydev->link) ++ if (phydev->link) { ++ netif_carrier_on(dev); + netdev_info(dev, "link up (%d/%s)\n", + phydev->speed, + phydev->duplex == DUPLEX_FULL ? + "Full" : "Half"); +- else ++ } else { ++ netif_carrier_off(dev); + netdev_info(dev, "link down\n"); ++ } + } + } + +@@ -1033,6 +1036,9 @@ static int macb_open(struct net_device *dev) + + netdev_dbg(bp->dev, "open\n"); + ++ /* carrier starts down */ ++ netif_carrier_off(dev); ++ + /* if the phy is not yet register, retry later*/ + if (!bp->phy_dev) + return -EAGAIN; +@@ -1405,6 +1411,8 @@ static int __init macb_probe(struct platform_device *pdev) + + platform_set_drvdata(pdev, dev); + ++ netif_carrier_off(dev); ++ + netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n", + macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr, + dev->irq, dev->dev_addr); +@@ -1468,6 +1476,7 @@ static int macb_suspend(struct platform_device *pdev, pm_message_t state) + struct net_device *netdev = platform_get_drvdata(pdev); + struct macb *bp = netdev_priv(netdev); + ++ netif_carrier_off(netdev); + netif_device_detach(netdev); + + clk_disable(bp->hclk); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0071-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch b/patches.at91/0071-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch new file mode 100644 index 000000000000..be1942931e15 --- /dev/null +++ b/patches.at91/0071-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch @@ -0,0 +1,37 @@ +From ff53d26da93227bae1309bfd9c404d17fd5baf8b Mon Sep 17 00:00:00 2001 +From: Bo Shen +Date: Fri, 11 May 2012 17:39:28 +0800 +Subject: ALSA: atmel/ac97c: correct the unexpected behavior when using + uninitial value for reset pin + +commit b2522f9262539fc328b4b9344f8a2f7ef2cb18d5 upstream. + +When pdata->reset_pin is passed with a negative value (means gpio +is invalid), then chip->reset_pin will not be assigned to a vaule, +it will use default value 0. This will cause unexpected behavior. + +So, add this patch to correct. + +Signed-off-by: Bo Shen +Acked-by: Nicolas Ferre +Signed-off-by: Takashi Iwai +--- + sound/atmel/ac97c.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c +index 115313e..f5ded64 100644 +--- a/sound/atmel/ac97c.c ++++ b/sound/atmel/ac97c.c +@@ -991,6 +991,8 @@ static int __devinit atmel_ac97c_probe(struct platform_device *pdev) + gpio_direction_output(pdata->reset_pin, 1); + chip->reset_pin = pdata->reset_pin; + } ++ } else { ++ chip->reset_pin = -EINVAL; + } + + snd_card_set_dev(card, &pdev->dev); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0071-net-macb-manage-carrier-state-with-call-to-netif_car.patch b/patches.at91/0071-net-macb-manage-carrier-state-with-call-to-netif_car.patch deleted file mode 100644 index de3a73a9d785..000000000000 --- a/patches.at91/0071-net-macb-manage-carrier-state-with-call-to-netif_car.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 7753ed0e33522a318f41773a78c2900a038c23be Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Tue, 3 Jul 2012 23:14:13 +0000 -Subject: net/macb: manage carrier state with call to netif_carrier_{on|off}() - -OFF carrier state is setup in probe() open() and suspend() functions. -The carrier ON state is managed in macb_handle_link_change(). - -Signed-off-by: Nicolas Ferre -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/cadence/macb.c | 13 +++++++++++-- - 1 file changed, 11 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index c4834c2..6100b85 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -179,13 +179,16 @@ static void macb_handle_link_change(struct net_device *dev) - spin_unlock_irqrestore(&bp->lock, flags); - - if (status_change) { -- if (phydev->link) -+ if (phydev->link) { -+ netif_carrier_on(dev); - netdev_info(dev, "link up (%d/%s)\n", - phydev->speed, - phydev->duplex == DUPLEX_FULL ? - "Full" : "Half"); -- else -+ } else { -+ netif_carrier_off(dev); - netdev_info(dev, "link down\n"); -+ } - } - } - -@@ -1033,6 +1036,9 @@ static int macb_open(struct net_device *dev) - - netdev_dbg(bp->dev, "open\n"); - -+ /* carrier starts down */ -+ netif_carrier_off(dev); -+ - /* if the phy is not yet register, retry later*/ - if (!bp->phy_dev) - return -EAGAIN; -@@ -1405,6 +1411,8 @@ static int __init macb_probe(struct platform_device *pdev) - - platform_set_drvdata(pdev, dev); - -+ netif_carrier_off(dev); -+ - netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n", - macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr, - dev->irq, dev->dev_addr); -@@ -1468,6 +1476,7 @@ static int macb_suspend(struct platform_device *pdev, pm_message_t state) - struct net_device *netdev = platform_get_drvdata(pdev); - struct macb *bp = netdev_priv(netdev); - -+ netif_carrier_off(netdev); - netif_device_detach(netdev); - - clk_disable(bp->hclk); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0072-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch b/patches.at91/0072-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch deleted file mode 100644 index d8a89a2cc953..000000000000 --- a/patches.at91/0072-ALSA-atmel-ac97c-correct-the-unexpected-behavior-whe.patch +++ /dev/null @@ -1,35 +0,0 @@ -From dbbe3702cb9bf1aa4e07dc6fe2cce479f75ab39e Mon Sep 17 00:00:00 2001 -From: Bo Shen -Date: Fri, 11 May 2012 17:39:28 +0800 -Subject: ALSA: atmel/ac97c: correct the unexpected behavior when using - uninitial value for reset pin - -When pdata->reset_pin is passed with a negative value (means gpio -is invalid), then chip->reset_pin will not be assigned to a vaule, -it will use default value 0. This will cause unexpected behavior. - -So, add this patch to correct. - -Signed-off-by: Bo Shen -Acked-by: Nicolas Ferre -Signed-off-by: Takashi Iwai ---- - sound/atmel/ac97c.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c -index 115313e..f5ded64 100644 ---- a/sound/atmel/ac97c.c -+++ b/sound/atmel/ac97c.c -@@ -991,6 +991,8 @@ static int __devinit atmel_ac97c_probe(struct platform_device *pdev) - gpio_direction_output(pdata->reset_pin, 1); - chip->reset_pin = pdata->reset_pin; - } -+ } else { -+ chip->reset_pin = -EINVAL; - } - - snd_card_set_dev(card, &pdev->dev); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0072-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch b/patches.at91/0072-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch new file mode 100644 index 000000000000..4fe6b31f140d --- /dev/null +++ b/patches.at91/0072-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch @@ -0,0 +1,190 @@ +From a1ac896220cc6517c99b449fee4b98618cf4d4d2 Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Thu, 31 May 2012 18:09:20 +0800 +Subject: MTD: at91: extract hw ecc initialization to one function + +commit 3dfe41a4c705223c66373968327407e11c2fb1a1 upstream. + +This patch moves hw ecc initialization code to one function. + +Signed-off-by: Hong Xu +Signed-off-by: Josh Wu +--- + drivers/mtd/nand/atmel_nand.c | 127 ++++++++++++++++++++++-------------------- + 1 file changed, 66 insertions(+), 61 deletions(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index 2165576..4ea0a04 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -523,6 +523,66 @@ static int __devinit atmel_of_init_port(struct atmel_nand_host *host, + } + #endif + ++static int __init atmel_hw_nand_init_params(struct platform_device *pdev, ++ struct atmel_nand_host *host) ++{ ++ struct mtd_info *mtd = &host->mtd; ++ struct nand_chip *nand_chip = &host->nand_chip; ++ struct resource *regs; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!regs) { ++ dev_err(host->dev, ++ "Can't get I/O resource regs, use software ECC\n"); ++ nand_chip->ecc.mode = NAND_ECC_SOFT; ++ return 0; ++ } ++ ++ host->ecc = ioremap(regs->start, resource_size(regs)); ++ if (host->ecc == NULL) { ++ dev_err(host->dev, "ioremap failed\n"); ++ return -EIO; ++ } ++ ++ /* ECC is calculated for the whole page (1 step) */ ++ nand_chip->ecc.size = mtd->writesize; ++ ++ /* set ECC page size and oob layout */ ++ switch (mtd->writesize) { ++ case 512: ++ nand_chip->ecc.layout = &atmel_oobinfo_small; ++ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); ++ break; ++ case 1024: ++ nand_chip->ecc.layout = &atmel_oobinfo_large; ++ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); ++ break; ++ case 2048: ++ nand_chip->ecc.layout = &atmel_oobinfo_large; ++ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); ++ break; ++ case 4096: ++ nand_chip->ecc.layout = &atmel_oobinfo_large; ++ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); ++ break; ++ default: ++ /* page size not handled by HW ECC */ ++ /* switching back to soft ECC */ ++ nand_chip->ecc.mode = NAND_ECC_SOFT; ++ return 0; ++ } ++ ++ /* set up for HW ECC */ ++ nand_chip->ecc.calculate = atmel_nand_calculate; ++ nand_chip->ecc.correct = atmel_nand_correct; ++ nand_chip->ecc.hwctl = atmel_nand_hwctl; ++ nand_chip->ecc.read_page = atmel_nand_read_page; ++ nand_chip->ecc.bytes = 4; ++ nand_chip->ecc.strength = 1; ++ ++ return 0; ++} ++ + /* + * Probe for the NAND device. + */ +@@ -531,7 +591,6 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + struct atmel_nand_host *host; + struct mtd_info *mtd; + struct nand_chip *nand_chip; +- struct resource *regs; + struct resource *mem; + struct mtd_part_parser_data ppdata = {}; + int res; +@@ -583,29 +642,6 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + nand_chip->dev_ready = atmel_nand_device_ready; + + nand_chip->ecc.mode = host->board.ecc_mode; +- +- regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); +- if (!regs && nand_chip->ecc.mode == NAND_ECC_HW) { +- printk(KERN_ERR "atmel_nand: can't get I/O resource " +- "regs\nFalling back on software ECC\n"); +- nand_chip->ecc.mode = NAND_ECC_SOFT; +- } +- +- if (nand_chip->ecc.mode == NAND_ECC_HW) { +- host->ecc = ioremap(regs->start, resource_size(regs)); +- if (host->ecc == NULL) { +- printk(KERN_ERR "atmel_nand: ioremap failed\n"); +- res = -EIO; +- goto err_ecc_ioremap; +- } +- nand_chip->ecc.calculate = atmel_nand_calculate; +- nand_chip->ecc.correct = atmel_nand_correct; +- nand_chip->ecc.hwctl = atmel_nand_hwctl; +- nand_chip->ecc.read_page = atmel_nand_read_page; +- nand_chip->ecc.bytes = 4; +- nand_chip->ecc.strength = 1; +- } +- + nand_chip->chip_delay = 20; /* 20us command delay time */ + + if (host->board.bus_width_16) /* 16-bit bus width */ +@@ -657,40 +693,9 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + } + + if (nand_chip->ecc.mode == NAND_ECC_HW) { +- /* ECC is calculated for the whole page (1 step) */ +- nand_chip->ecc.size = mtd->writesize; +- +- /* set ECC page size and oob layout */ +- switch (mtd->writesize) { +- case 512: +- nand_chip->ecc.layout = &atmel_oobinfo_small; +- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); +- break; +- case 1024: +- nand_chip->ecc.layout = &atmel_oobinfo_large; +- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); +- break; +- case 2048: +- nand_chip->ecc.layout = &atmel_oobinfo_large; +- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); +- break; +- case 4096: +- nand_chip->ecc.layout = &atmel_oobinfo_large; +- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); +- break; +- default: +- /* page size not handled by HW ECC */ +- /* switching back to soft ECC */ +- nand_chip->ecc.mode = NAND_ECC_SOFT; +- nand_chip->ecc.calculate = NULL; +- nand_chip->ecc.correct = NULL; +- nand_chip->ecc.hwctl = NULL; +- nand_chip->ecc.read_page = NULL; +- nand_chip->ecc.postpad = 0; +- nand_chip->ecc.prepad = 0; +- nand_chip->ecc.bytes = 0; +- break; +- } ++ res = atmel_hw_nand_init_params(pdev, host); ++ if (res != 0) ++ goto err_hw_ecc; + } + + /* second phase scan */ +@@ -707,15 +712,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + return res; + + err_scan_tail: ++ if (host->ecc) ++ iounmap(host->ecc); ++err_hw_ecc: + err_scan_ident: + err_no_card: + atmel_nand_disable(host); + platform_set_drvdata(pdev, NULL); + if (host->dma_chan) + dma_release_channel(host->dma_chan); +- if (host->ecc) +- iounmap(host->ecc); +-err_ecc_ioremap: + iounmap(host->io_base); + err_nand_ioremap: + kfree(host); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0073-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch b/patches.at91/0073-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch new file mode 100644 index 000000000000..7325cb1348ab --- /dev/null +++ b/patches.at91/0073-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch @@ -0,0 +1,159 @@ +From 0ac83ef70e787b4309088615a0375d7318bdcd8f Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Tue, 26 Jun 2012 17:42:22 +0800 +Subject: MTD: at91: add dt parameters for Atmel PMECC + +commit a41b51a1f7c15a1b00f30a3ad2d0373ad51b883d upstream. + +Add DT support for PMECC parameters. + +Signed-off-by: Hong Xu +Signed-off-by: Josh Wu +Acked-by: Nicolas Ferre +--- + .../devicetree/bindings/mtd/atmel-nand.txt | 40 ++++++++++++++++- + drivers/mtd/nand/atmel_nand.c | 52 +++++++++++++++++++++- + 2 files changed, 90 insertions(+), 2 deletions(-) + +diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt +index a200695..d555421 100644 +--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt ++++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt +@@ -3,7 +3,9 @@ Atmel NAND flash + Required properties: + - compatible : "atmel,at91rm9200-nand". + - reg : should specify localbus address and size used for the chip, +- and if availlable the ECC. ++ and hardware ECC controller if available. ++ If the hardware ECC is PMECC, it should contain address and size for ++ PMECC, PMECC Error Location controller and ROM which has lookup tables. + - atmel,nand-addr-offset : offset for the address latch. + - atmel,nand-cmd-offset : offset for the command latch. + - #address-cells, #size-cells : Must be present if the device has sub-nodes +@@ -16,6 +18,15 @@ Optional properties: + - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. + Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", + "soft_bch". ++- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware. ++ Only supported by at91sam9x5 or later sam9 product. ++- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC ++ Controller. Supported values are: 2, 4, 8, 12, 24. ++- atmel,pmecc-sector-size : sector size for ECC computation. Supported values ++ are: 512, 1024. ++- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM ++ for different sector size. First one is for sector size 512, the next is for ++ sector size 1024. + - nand-bus-width : 8 or 16 bus width if not present 8 + - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false + +@@ -39,3 +50,30 @@ nand0: nand@40000000,0 { + ... + }; + }; ++ ++/* for PMECC supported chips */ ++nand0: nand@40000000 { ++ compatible = "atmel,at91rm9200-nand"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = < 0x40000000 0x10000000 /* bus addr & size */ ++ 0xffffe000 0x00000600 /* PMECC addr & size */ ++ 0xffffe600 0x00000200 /* PMECC ERRLOC addr & size */ ++ 0x00100000 0x00100000 /* ROM addr & size */ ++ >; ++ atmel,nand-addr-offset = <21>; /* ale */ ++ atmel,nand-cmd-offset = <22>; /* cle */ ++ nand-on-flash-bbt; ++ nand-ecc-mode = "hw"; ++ atmel,has-pmecc; /* enable PMECC */ ++ atmel,pmecc-cap = <2>; ++ atmel,pmecc-sector-size = <512>; ++ atmel,pmecc-lookup-table-offset = <0x8000 0x10000>; ++ gpios = <&pioD 5 0 /* rdy */ ++ &pioD 4 0 /* nce */ ++ 0 /* cd */ ++ >; ++ partition@0 { ++ ... ++ }; ++}; +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index 4ea0a04..712a705 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -93,6 +93,11 @@ struct atmel_nand_host { + + struct completion comp; + struct dma_chan *dma_chan; ++ ++ bool has_pmecc; ++ u8 pmecc_corr_cap; ++ u16 pmecc_sector_size; ++ u32 pmecc_lookup_table_offset; + }; + + static int cpu_has_dma(void) +@@ -477,7 +482,8 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) + static int __devinit atmel_of_init_port(struct atmel_nand_host *host, + struct device_node *np) + { +- u32 val; ++ u32 val, table_offset; ++ u32 offset[2]; + int ecc_mode; + struct atmel_nand_data *board = &host->board; + enum of_gpio_flags flags; +@@ -513,6 +519,50 @@ static int __devinit atmel_of_init_port(struct atmel_nand_host *host, + board->enable_pin = of_get_gpio(np, 1); + board->det_pin = of_get_gpio(np, 2); + ++ host->has_pmecc = of_property_read_bool(np, "atmel,has-pmecc"); ++ ++ if (!(board->ecc_mode == NAND_ECC_HW) || !host->has_pmecc) ++ return 0; /* Not using PMECC */ ++ ++ /* use PMECC, get correction capability, sector size and lookup ++ * table offset. ++ */ ++ if (of_property_read_u32(np, "atmel,pmecc-cap", &val) != 0) { ++ dev_err(host->dev, "Cannot decide PMECC Capability\n"); ++ return -EINVAL; ++ } else if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && ++ (val != 24)) { ++ dev_err(host->dev, ++ "Unsupported PMECC correction capability: %d; should be 2, 4, 8, 12 or 24\n", ++ val); ++ return -EINVAL; ++ } ++ host->pmecc_corr_cap = (u8)val; ++ ++ if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) != 0) { ++ dev_err(host->dev, "Cannot decide PMECC Sector Size\n"); ++ return -EINVAL; ++ } else if ((val != 512) && (val != 1024)) { ++ dev_err(host->dev, ++ "Unsupported PMECC sector size: %d; should be 512 or 1024 bytes\n", ++ val); ++ return -EINVAL; ++ } ++ host->pmecc_sector_size = (u16)val; ++ ++ if (of_property_read_u32_array(np, "atmel,pmecc-lookup-table-offset", ++ offset, 2) != 0) { ++ dev_err(host->dev, "Cannot get PMECC lookup table offset\n"); ++ return -EINVAL; ++ } ++ table_offset = host->pmecc_sector_size == 512 ? offset[0] : offset[1]; ++ ++ if (!table_offset) { ++ dev_err(host->dev, "Invalid PMECC lookup table offset\n"); ++ return -EINVAL; ++ } ++ host->pmecc_lookup_table_offset = table_offset; ++ + return 0; + } + #else +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0073-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch b/patches.at91/0073-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch deleted file mode 100644 index 436c88279c1f..000000000000 --- a/patches.at91/0073-MTD-at91-extract-hw-ecc-initialization-to-one-functi.patch +++ /dev/null @@ -1,188 +0,0 @@ -From 37a9c14614a63c3e5fed9d6cb18638d765a65f80 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Thu, 31 May 2012 18:09:20 +0800 -Subject: MTD: at91: extract hw ecc initialization to one function - -This patch moves hw ecc initialization code to one function. - -Signed-off-by: Hong Xu -Signed-off-by: Josh Wu ---- - drivers/mtd/nand/atmel_nand.c | 127 ++++++++++++++++++++++-------------------- - 1 file changed, 66 insertions(+), 61 deletions(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index 2165576..4ea0a04 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -523,6 +523,66 @@ static int __devinit atmel_of_init_port(struct atmel_nand_host *host, - } - #endif - -+static int __init atmel_hw_nand_init_params(struct platform_device *pdev, -+ struct atmel_nand_host *host) -+{ -+ struct mtd_info *mtd = &host->mtd; -+ struct nand_chip *nand_chip = &host->nand_chip; -+ struct resource *regs; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ if (!regs) { -+ dev_err(host->dev, -+ "Can't get I/O resource regs, use software ECC\n"); -+ nand_chip->ecc.mode = NAND_ECC_SOFT; -+ return 0; -+ } -+ -+ host->ecc = ioremap(regs->start, resource_size(regs)); -+ if (host->ecc == NULL) { -+ dev_err(host->dev, "ioremap failed\n"); -+ return -EIO; -+ } -+ -+ /* ECC is calculated for the whole page (1 step) */ -+ nand_chip->ecc.size = mtd->writesize; -+ -+ /* set ECC page size and oob layout */ -+ switch (mtd->writesize) { -+ case 512: -+ nand_chip->ecc.layout = &atmel_oobinfo_small; -+ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); -+ break; -+ case 1024: -+ nand_chip->ecc.layout = &atmel_oobinfo_large; -+ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); -+ break; -+ case 2048: -+ nand_chip->ecc.layout = &atmel_oobinfo_large; -+ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); -+ break; -+ case 4096: -+ nand_chip->ecc.layout = &atmel_oobinfo_large; -+ ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); -+ break; -+ default: -+ /* page size not handled by HW ECC */ -+ /* switching back to soft ECC */ -+ nand_chip->ecc.mode = NAND_ECC_SOFT; -+ return 0; -+ } -+ -+ /* set up for HW ECC */ -+ nand_chip->ecc.calculate = atmel_nand_calculate; -+ nand_chip->ecc.correct = atmel_nand_correct; -+ nand_chip->ecc.hwctl = atmel_nand_hwctl; -+ nand_chip->ecc.read_page = atmel_nand_read_page; -+ nand_chip->ecc.bytes = 4; -+ nand_chip->ecc.strength = 1; -+ -+ return 0; -+} -+ - /* - * Probe for the NAND device. - */ -@@ -531,7 +591,6 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - struct atmel_nand_host *host; - struct mtd_info *mtd; - struct nand_chip *nand_chip; -- struct resource *regs; - struct resource *mem; - struct mtd_part_parser_data ppdata = {}; - int res; -@@ -583,29 +642,6 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - nand_chip->dev_ready = atmel_nand_device_ready; - - nand_chip->ecc.mode = host->board.ecc_mode; -- -- regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); -- if (!regs && nand_chip->ecc.mode == NAND_ECC_HW) { -- printk(KERN_ERR "atmel_nand: can't get I/O resource " -- "regs\nFalling back on software ECC\n"); -- nand_chip->ecc.mode = NAND_ECC_SOFT; -- } -- -- if (nand_chip->ecc.mode == NAND_ECC_HW) { -- host->ecc = ioremap(regs->start, resource_size(regs)); -- if (host->ecc == NULL) { -- printk(KERN_ERR "atmel_nand: ioremap failed\n"); -- res = -EIO; -- goto err_ecc_ioremap; -- } -- nand_chip->ecc.calculate = atmel_nand_calculate; -- nand_chip->ecc.correct = atmel_nand_correct; -- nand_chip->ecc.hwctl = atmel_nand_hwctl; -- nand_chip->ecc.read_page = atmel_nand_read_page; -- nand_chip->ecc.bytes = 4; -- nand_chip->ecc.strength = 1; -- } -- - nand_chip->chip_delay = 20; /* 20us command delay time */ - - if (host->board.bus_width_16) /* 16-bit bus width */ -@@ -657,40 +693,9 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - } - - if (nand_chip->ecc.mode == NAND_ECC_HW) { -- /* ECC is calculated for the whole page (1 step) */ -- nand_chip->ecc.size = mtd->writesize; -- -- /* set ECC page size and oob layout */ -- switch (mtd->writesize) { -- case 512: -- nand_chip->ecc.layout = &atmel_oobinfo_small; -- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); -- break; -- case 1024: -- nand_chip->ecc.layout = &atmel_oobinfo_large; -- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); -- break; -- case 2048: -- nand_chip->ecc.layout = &atmel_oobinfo_large; -- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); -- break; -- case 4096: -- nand_chip->ecc.layout = &atmel_oobinfo_large; -- ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); -- break; -- default: -- /* page size not handled by HW ECC */ -- /* switching back to soft ECC */ -- nand_chip->ecc.mode = NAND_ECC_SOFT; -- nand_chip->ecc.calculate = NULL; -- nand_chip->ecc.correct = NULL; -- nand_chip->ecc.hwctl = NULL; -- nand_chip->ecc.read_page = NULL; -- nand_chip->ecc.postpad = 0; -- nand_chip->ecc.prepad = 0; -- nand_chip->ecc.bytes = 0; -- break; -- } -+ res = atmel_hw_nand_init_params(pdev, host); -+ if (res != 0) -+ goto err_hw_ecc; - } - - /* second phase scan */ -@@ -707,15 +712,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - return res; - - err_scan_tail: -+ if (host->ecc) -+ iounmap(host->ecc); -+err_hw_ecc: - err_scan_ident: - err_no_card: - atmel_nand_disable(host); - platform_set_drvdata(pdev, NULL); - if (host->dma_chan) - dma_release_channel(host->dma_chan); -- if (host->ecc) -- iounmap(host->ecc); --err_ecc_ioremap: - iounmap(host->io_base); - err_nand_ioremap: - kfree(host); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0074-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch b/patches.at91/0074-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch deleted file mode 100644 index b1711f6c37c1..000000000000 --- a/patches.at91/0074-MTD-at91-add-dt-parameters-for-Atmel-PMECC.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 7f3d2c9c00b937d2932b337fe259dd4f56c048b7 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Tue, 26 Jun 2012 17:42:22 +0800 -Subject: MTD: at91: add dt parameters for Atmel PMECC - -Add DT support for PMECC parameters. - -Signed-off-by: Hong Xu -Signed-off-by: Josh Wu -Acked-by: Nicolas Ferre ---- - .../devicetree/bindings/mtd/atmel-nand.txt | 40 ++++++++++++++++- - drivers/mtd/nand/atmel_nand.c | 52 +++++++++++++++++++++- - 2 files changed, 90 insertions(+), 2 deletions(-) - -diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt -index a200695..d555421 100644 ---- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt -+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt -@@ -3,7 +3,9 @@ Atmel NAND flash - Required properties: - - compatible : "atmel,at91rm9200-nand". - - reg : should specify localbus address and size used for the chip, -- and if availlable the ECC. -+ and hardware ECC controller if available. -+ If the hardware ECC is PMECC, it should contain address and size for -+ PMECC, PMECC Error Location controller and ROM which has lookup tables. - - atmel,nand-addr-offset : offset for the address latch. - - atmel,nand-cmd-offset : offset for the command latch. - - #address-cells, #size-cells : Must be present if the device has sub-nodes -@@ -16,6 +18,15 @@ Optional properties: - - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. - Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", - "soft_bch". -+- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware. -+ Only supported by at91sam9x5 or later sam9 product. -+- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC -+ Controller. Supported values are: 2, 4, 8, 12, 24. -+- atmel,pmecc-sector-size : sector size for ECC computation. Supported values -+ are: 512, 1024. -+- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM -+ for different sector size. First one is for sector size 512, the next is for -+ sector size 1024. - - nand-bus-width : 8 or 16 bus width if not present 8 - - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false - -@@ -39,3 +50,30 @@ nand0: nand@40000000,0 { - ... - }; - }; -+ -+/* for PMECC supported chips */ -+nand0: nand@40000000 { -+ compatible = "atmel,at91rm9200-nand"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ reg = < 0x40000000 0x10000000 /* bus addr & size */ -+ 0xffffe000 0x00000600 /* PMECC addr & size */ -+ 0xffffe600 0x00000200 /* PMECC ERRLOC addr & size */ -+ 0x00100000 0x00100000 /* ROM addr & size */ -+ >; -+ atmel,nand-addr-offset = <21>; /* ale */ -+ atmel,nand-cmd-offset = <22>; /* cle */ -+ nand-on-flash-bbt; -+ nand-ecc-mode = "hw"; -+ atmel,has-pmecc; /* enable PMECC */ -+ atmel,pmecc-cap = <2>; -+ atmel,pmecc-sector-size = <512>; -+ atmel,pmecc-lookup-table-offset = <0x8000 0x10000>; -+ gpios = <&pioD 5 0 /* rdy */ -+ &pioD 4 0 /* nce */ -+ 0 /* cd */ -+ >; -+ partition@0 { -+ ... -+ }; -+}; -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index 4ea0a04..712a705 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -93,6 +93,11 @@ struct atmel_nand_host { - - struct completion comp; - struct dma_chan *dma_chan; -+ -+ bool has_pmecc; -+ u8 pmecc_corr_cap; -+ u16 pmecc_sector_size; -+ u32 pmecc_lookup_table_offset; - }; - - static int cpu_has_dma(void) -@@ -477,7 +482,8 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) - static int __devinit atmel_of_init_port(struct atmel_nand_host *host, - struct device_node *np) - { -- u32 val; -+ u32 val, table_offset; -+ u32 offset[2]; - int ecc_mode; - struct atmel_nand_data *board = &host->board; - enum of_gpio_flags flags; -@@ -513,6 +519,50 @@ static int __devinit atmel_of_init_port(struct atmel_nand_host *host, - board->enable_pin = of_get_gpio(np, 1); - board->det_pin = of_get_gpio(np, 2); - -+ host->has_pmecc = of_property_read_bool(np, "atmel,has-pmecc"); -+ -+ if (!(board->ecc_mode == NAND_ECC_HW) || !host->has_pmecc) -+ return 0; /* Not using PMECC */ -+ -+ /* use PMECC, get correction capability, sector size and lookup -+ * table offset. -+ */ -+ if (of_property_read_u32(np, "atmel,pmecc-cap", &val) != 0) { -+ dev_err(host->dev, "Cannot decide PMECC Capability\n"); -+ return -EINVAL; -+ } else if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && -+ (val != 24)) { -+ dev_err(host->dev, -+ "Unsupported PMECC correction capability: %d; should be 2, 4, 8, 12 or 24\n", -+ val); -+ return -EINVAL; -+ } -+ host->pmecc_corr_cap = (u8)val; -+ -+ if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) != 0) { -+ dev_err(host->dev, "Cannot decide PMECC Sector Size\n"); -+ return -EINVAL; -+ } else if ((val != 512) && (val != 1024)) { -+ dev_err(host->dev, -+ "Unsupported PMECC sector size: %d; should be 512 or 1024 bytes\n", -+ val); -+ return -EINVAL; -+ } -+ host->pmecc_sector_size = (u16)val; -+ -+ if (of_property_read_u32_array(np, "atmel,pmecc-lookup-table-offset", -+ offset, 2) != 0) { -+ dev_err(host->dev, "Cannot get PMECC lookup table offset\n"); -+ return -EINVAL; -+ } -+ table_offset = host->pmecc_sector_size == 512 ? offset[0] : offset[1]; -+ -+ if (!table_offset) { -+ dev_err(host->dev, "Invalid PMECC lookup table offset\n"); -+ return -EINVAL; -+ } -+ host->pmecc_lookup_table_offset = table_offset; -+ - return 0; - } - #else --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0074-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch b/patches.at91/0074-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch new file mode 100644 index 000000000000..32902c312191 --- /dev/null +++ b/patches.at91/0074-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch @@ -0,0 +1,961 @@ +From 095fbbb23efb47cf006720652a877ffefe50c609 Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Fri, 29 Jun 2012 15:29:21 +0800 +Subject: MTD: at91: atmel_nand: Update driver to support Programmable Multibit + ECC controller + +Is seen as commit 6dc4ff786c62fa34390607264d4d3ec54e22d5b7 upstream. + +The Programmable Multibit ECC (PMECC) controller is a programmable binary +BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller +can be used to support both SLC and MLC NAND Flash devices. It supports to +generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. + +To use PMECC in this driver, the user needs to set the address and size of +PMECC, PMECC error location controllers and ROM. And also needs to pass the +correction capability, the sector size and ROM lookup table offsets via dt. + +This driver has been tested on AT91SAM9X5-EK and AT91SAM9N12-EK with JFFS2, +YAFFS2, UBIFS and mtd-utils. + +Signed-off-by: Hong Xu +Signed-off-by: Josh Wu +Tested-by: Richard Genoud +Acked-by: Nicolas Ferre +--- + drivers/mtd/nand/atmel_nand.c | 747 +++++++++++++++++++++++++++++++++++++- + drivers/mtd/nand/atmel_nand_ecc.h | 114 +++++- + 2 files changed, 859 insertions(+), 2 deletions(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index 712a705..42b64fb 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -15,6 +15,8 @@ + * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c) + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * ++ * Add Programmable Multibit ECC support for various AT91 SoC ++ * (C) Copyright 2012 ATMEL, Hong Xu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as +@@ -98,8 +100,31 @@ struct atmel_nand_host { + u8 pmecc_corr_cap; + u16 pmecc_sector_size; + u32 pmecc_lookup_table_offset; ++ ++ int pmecc_bytes_per_sector; ++ int pmecc_sector_number; ++ int pmecc_degree; /* Degree of remainders */ ++ int pmecc_cw_len; /* Length of codeword */ ++ ++ void __iomem *pmerrloc_base; ++ void __iomem *pmecc_rom_base; ++ ++ /* lookup table for alpha_to and index_of */ ++ void __iomem *pmecc_alpha_to; ++ void __iomem *pmecc_index_of; ++ ++ /* data for pmecc computation */ ++ int16_t *pmecc_partial_syn; ++ int16_t *pmecc_si; ++ int16_t *pmecc_smu; /* Sigma table */ ++ int16_t *pmecc_lmu; /* polynomal order */ ++ int *pmecc_mu; ++ int *pmecc_dmu; ++ int *pmecc_delta; + }; + ++static struct nand_ecclayout atmel_pmecc_oobinfo; ++ + static int cpu_has_dma(void) + { + return cpu_is_at91sam9rl() || cpu_is_at91sam9g45(); +@@ -293,6 +318,703 @@ static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) + } + + /* ++ * Return number of ecc bytes per sector according to sector size and ++ * correction capability ++ * ++ * Following table shows what at91 PMECC supported: ++ * Correction Capability Sector_512_bytes Sector_1024_bytes ++ * ===================== ================ ================= ++ * 2-bits 4-bytes 4-bytes ++ * 4-bits 7-bytes 7-bytes ++ * 8-bits 13-bytes 14-bytes ++ * 12-bits 20-bytes 21-bytes ++ * 24-bits 39-bytes 42-bytes ++ */ ++static int __devinit pmecc_get_ecc_bytes(int cap, int sector_size) ++{ ++ int m = 12 + sector_size / 512; ++ return (m * cap + 7) / 8; ++} ++ ++static void __devinit pmecc_config_ecc_layout(struct nand_ecclayout *layout, ++ int oobsize, int ecc_len) ++{ ++ int i; ++ ++ layout->eccbytes = ecc_len; ++ ++ /* ECC will occupy the last ecc_len bytes continuously */ ++ for (i = 0; i < ecc_len; i++) ++ layout->eccpos[i] = oobsize - ecc_len + i; ++ ++ layout->oobfree[0].offset = 2; ++ layout->oobfree[0].length = ++ oobsize - ecc_len - layout->oobfree[0].offset; ++} ++ ++static void __devinit __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) ++{ ++ int table_size; ++ ++ table_size = host->pmecc_sector_size == 512 ? ++ PMECC_LOOKUP_TABLE_SIZE_512 : PMECC_LOOKUP_TABLE_SIZE_1024; ++ ++ return host->pmecc_rom_base + host->pmecc_lookup_table_offset + ++ table_size * sizeof(int16_t); ++} ++ ++static void pmecc_data_free(struct atmel_nand_host *host) ++{ ++ kfree(host->pmecc_partial_syn); ++ kfree(host->pmecc_si); ++ kfree(host->pmecc_lmu); ++ kfree(host->pmecc_smu); ++ kfree(host->pmecc_mu); ++ kfree(host->pmecc_dmu); ++ kfree(host->pmecc_delta); ++} ++ ++static int __devinit pmecc_data_alloc(struct atmel_nand_host *host) ++{ ++ const int cap = host->pmecc_corr_cap; ++ ++ host->pmecc_partial_syn = kzalloc((2 * cap + 1) * sizeof(int16_t), ++ GFP_KERNEL); ++ host->pmecc_si = kzalloc((2 * cap + 1) * sizeof(int16_t), GFP_KERNEL); ++ host->pmecc_lmu = kzalloc((cap + 1) * sizeof(int16_t), GFP_KERNEL); ++ host->pmecc_smu = kzalloc((cap + 2) * (2 * cap + 1) * sizeof(int16_t), ++ GFP_KERNEL); ++ host->pmecc_mu = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); ++ host->pmecc_dmu = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); ++ host->pmecc_delta = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); ++ ++ if (host->pmecc_partial_syn && ++ host->pmecc_si && ++ host->pmecc_lmu && ++ host->pmecc_smu && ++ host->pmecc_mu && ++ host->pmecc_dmu && ++ host->pmecc_delta) ++ return 0; ++ ++ /* error happened */ ++ pmecc_data_free(host); ++ return -ENOMEM; ++} ++ ++static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ int i; ++ uint32_t value; ++ ++ /* Fill odd syndromes */ ++ for (i = 0; i < host->pmecc_corr_cap; i++) { ++ value = pmecc_readl_rem_relaxed(host->ecc, sector, i / 2); ++ if (i & 1) ++ value >>= 16; ++ value &= 0xffff; ++ host->pmecc_partial_syn[(2 * i) + 1] = (int16_t)value; ++ } ++} ++ ++static void pmecc_substitute(struct mtd_info *mtd) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ int16_t __iomem *alpha_to = host->pmecc_alpha_to; ++ int16_t __iomem *index_of = host->pmecc_index_of; ++ int16_t *partial_syn = host->pmecc_partial_syn; ++ const int cap = host->pmecc_corr_cap; ++ int16_t *si; ++ int i, j; ++ ++ /* si[] is a table that holds the current syndrome value, ++ * an element of that table belongs to the field ++ */ ++ si = host->pmecc_si; ++ ++ memset(&si[1], 0, sizeof(int16_t) * (2 * cap - 1)); ++ ++ /* Computation 2t syndromes based on S(x) */ ++ /* Odd syndromes */ ++ for (i = 1; i < 2 * cap; i += 2) { ++ for (j = 0; j < host->pmecc_degree; j++) { ++ if (partial_syn[i] & ((unsigned short)0x1 << j)) ++ si[i] = readw_relaxed(alpha_to + i * j) ^ si[i]; ++ } ++ } ++ /* Even syndrome = (Odd syndrome) ** 2 */ ++ for (i = 2, j = 1; j <= cap; i = ++j << 1) { ++ if (si[j] == 0) { ++ si[i] = 0; ++ } else { ++ int16_t tmp; ++ ++ tmp = readw_relaxed(index_of + si[j]); ++ tmp = (tmp * 2) % host->pmecc_cw_len; ++ si[i] = readw_relaxed(alpha_to + tmp); ++ } ++ } ++ ++ return; ++} ++ ++static void pmecc_get_sigma(struct mtd_info *mtd) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ ++ int16_t *lmu = host->pmecc_lmu; ++ int16_t *si = host->pmecc_si; ++ int *mu = host->pmecc_mu; ++ int *dmu = host->pmecc_dmu; /* Discrepancy */ ++ int *delta = host->pmecc_delta; /* Delta order */ ++ int cw_len = host->pmecc_cw_len; ++ const int16_t cap = host->pmecc_corr_cap; ++ const int num = 2 * cap + 1; ++ int16_t __iomem *index_of = host->pmecc_index_of; ++ int16_t __iomem *alpha_to = host->pmecc_alpha_to; ++ int i, j, k; ++ uint32_t dmu_0_count, tmp; ++ int16_t *smu = host->pmecc_smu; ++ ++ /* index of largest delta */ ++ int ro; ++ int largest; ++ int diff; ++ ++ dmu_0_count = 0; ++ ++ /* First Row */ ++ ++ /* Mu */ ++ mu[0] = -1; ++ ++ memset(smu, 0, sizeof(int16_t) * num); ++ smu[0] = 1; ++ ++ /* discrepancy set to 1 */ ++ dmu[0] = 1; ++ /* polynom order set to 0 */ ++ lmu[0] = 0; ++ delta[0] = (mu[0] * 2 - lmu[0]) >> 1; ++ ++ /* Second Row */ ++ ++ /* Mu */ ++ mu[1] = 0; ++ /* Sigma(x) set to 1 */ ++ memset(&smu[num], 0, sizeof(int16_t) * num); ++ smu[num] = 1; ++ ++ /* discrepancy set to S1 */ ++ dmu[1] = si[1]; ++ ++ /* polynom order set to 0 */ ++ lmu[1] = 0; ++ ++ delta[1] = (mu[1] * 2 - lmu[1]) >> 1; ++ ++ /* Init the Sigma(x) last row */ ++ memset(&smu[(cap + 1) * num], 0, sizeof(int16_t) * num); ++ ++ for (i = 1; i <= cap; i++) { ++ mu[i + 1] = i << 1; ++ /* Begin Computing Sigma (Mu+1) and L(mu) */ ++ /* check if discrepancy is set to 0 */ ++ if (dmu[i] == 0) { ++ dmu_0_count++; ++ ++ tmp = ((cap - (lmu[i] >> 1) - 1) / 2); ++ if ((cap - (lmu[i] >> 1) - 1) & 0x1) ++ tmp += 2; ++ else ++ tmp += 1; ++ ++ if (dmu_0_count == tmp) { ++ for (j = 0; j <= (lmu[i] >> 1) + 1; j++) ++ smu[(cap + 1) * num + j] = ++ smu[i * num + j]; ++ ++ lmu[cap + 1] = lmu[i]; ++ return; ++ } ++ ++ /* copy polynom */ ++ for (j = 0; j <= lmu[i] >> 1; j++) ++ smu[(i + 1) * num + j] = smu[i * num + j]; ++ ++ /* copy previous polynom order to the next */ ++ lmu[i + 1] = lmu[i]; ++ } else { ++ ro = 0; ++ largest = -1; ++ /* find largest delta with dmu != 0 */ ++ for (j = 0; j < i; j++) { ++ if ((dmu[j]) && (delta[j] > largest)) { ++ largest = delta[j]; ++ ro = j; ++ } ++ } ++ ++ /* compute difference */ ++ diff = (mu[i] - mu[ro]); ++ ++ /* Compute degree of the new smu polynomial */ ++ if ((lmu[i] >> 1) > ((lmu[ro] >> 1) + diff)) ++ lmu[i + 1] = lmu[i]; ++ else ++ lmu[i + 1] = ((lmu[ro] >> 1) + diff) * 2; ++ ++ /* Init smu[i+1] with 0 */ ++ for (k = 0; k < num; k++) ++ smu[(i + 1) * num + k] = 0; ++ ++ /* Compute smu[i+1] */ ++ for (k = 0; k <= lmu[ro] >> 1; k++) { ++ int16_t a, b, c; ++ ++ if (!(smu[ro * num + k] && dmu[i])) ++ continue; ++ a = readw_relaxed(index_of + dmu[i]); ++ b = readw_relaxed(index_of + dmu[ro]); ++ c = readw_relaxed(index_of + smu[ro * num + k]); ++ tmp = a + (cw_len - b) + c; ++ a = readw_relaxed(alpha_to + tmp % cw_len); ++ smu[(i + 1) * num + (k + diff)] = a; ++ } ++ ++ for (k = 0; k <= lmu[i] >> 1; k++) ++ smu[(i + 1) * num + k] ^= smu[i * num + k]; ++ } ++ ++ /* End Computing Sigma (Mu+1) and L(mu) */ ++ /* In either case compute delta */ ++ delta[i + 1] = (mu[i + 1] * 2 - lmu[i + 1]) >> 1; ++ ++ /* Do not compute discrepancy for the last iteration */ ++ if (i >= cap) ++ continue; ++ ++ for (k = 0; k <= (lmu[i + 1] >> 1); k++) { ++ tmp = 2 * (i - 1); ++ if (k == 0) { ++ dmu[i + 1] = si[tmp + 3]; ++ } else if (smu[(i + 1) * num + k] && si[tmp + 3 - k]) { ++ int16_t a, b, c; ++ a = readw_relaxed(index_of + ++ smu[(i + 1) * num + k]); ++ b = si[2 * (i - 1) + 3 - k]; ++ c = readw_relaxed(index_of + b); ++ tmp = a + c; ++ tmp %= cw_len; ++ dmu[i + 1] = readw_relaxed(alpha_to + tmp) ^ ++ dmu[i + 1]; ++ } ++ } ++ } ++ ++ return; ++} ++ ++static int pmecc_err_location(struct mtd_info *mtd) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ unsigned long end_time; ++ const int cap = host->pmecc_corr_cap; ++ const int num = 2 * cap + 1; ++ int sector_size = host->pmecc_sector_size; ++ int err_nbr = 0; /* number of error */ ++ int roots_nbr; /* number of roots */ ++ int i; ++ uint32_t val; ++ int16_t *smu = host->pmecc_smu; ++ ++ pmerrloc_writel(host->pmerrloc_base, ELDIS, PMERRLOC_DISABLE); ++ ++ for (i = 0; i <= host->pmecc_lmu[cap + 1] >> 1; i++) { ++ pmerrloc_writel_sigma_relaxed(host->pmerrloc_base, i, ++ smu[(cap + 1) * num + i]); ++ err_nbr++; ++ } ++ ++ val = (err_nbr - 1) << 16; ++ if (sector_size == 1024) ++ val |= 1; ++ ++ pmerrloc_writel(host->pmerrloc_base, ELCFG, val); ++ pmerrloc_writel(host->pmerrloc_base, ELEN, ++ sector_size * 8 + host->pmecc_degree * cap); ++ ++ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); ++ while (!(pmerrloc_readl_relaxed(host->pmerrloc_base, ELISR) ++ & PMERRLOC_CALC_DONE)) { ++ if (unlikely(time_after(jiffies, end_time))) { ++ dev_err(host->dev, "PMECC: Timeout to calculate error location.\n"); ++ return -1; ++ } ++ cpu_relax(); ++ } ++ ++ roots_nbr = (pmerrloc_readl_relaxed(host->pmerrloc_base, ELISR) ++ & PMERRLOC_ERR_NUM_MASK) >> 8; ++ /* Number of roots == degree of smu hence <= cap */ ++ if (roots_nbr == host->pmecc_lmu[cap + 1] >> 1) ++ return err_nbr - 1; ++ ++ /* Number of roots does not match the degree of smu ++ * unable to correct error */ ++ return -1; ++} ++ ++static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, ++ int sector_num, int extra_bytes, int err_nbr) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ int i = 0; ++ int byte_pos, bit_pos, sector_size, pos; ++ uint32_t tmp; ++ uint8_t err_byte; ++ ++ sector_size = host->pmecc_sector_size; ++ ++ while (err_nbr) { ++ tmp = pmerrloc_readl_el_relaxed(host->pmerrloc_base, i) - 1; ++ byte_pos = tmp / 8; ++ bit_pos = tmp % 8; ++ ++ if (byte_pos >= (sector_size + extra_bytes)) ++ BUG(); /* should never happen */ ++ ++ if (byte_pos < sector_size) { ++ err_byte = *(buf + byte_pos); ++ *(buf + byte_pos) ^= (1 << bit_pos); ++ ++ pos = sector_num * host->pmecc_sector_size + byte_pos; ++ dev_info(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", ++ pos, bit_pos, err_byte, *(buf + byte_pos)); ++ } else { ++ /* Bit flip in OOB area */ ++ tmp = sector_num * host->pmecc_bytes_per_sector ++ + (byte_pos - sector_size); ++ err_byte = ecc[tmp]; ++ ecc[tmp] ^= (1 << bit_pos); ++ ++ pos = tmp + nand_chip->ecc.layout->eccpos[0]; ++ dev_info(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", ++ pos, bit_pos, err_byte, ecc[tmp]); ++ } ++ ++ i++; ++ err_nbr--; ++ } ++ ++ return; ++} ++ ++static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf, ++ u8 *ecc) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ int i, err_nbr, eccbytes; ++ uint8_t *buf_pos; ++ ++ eccbytes = nand_chip->ecc.bytes; ++ for (i = 0; i < eccbytes; i++) ++ if (ecc[i] != 0xff) ++ goto normal_check; ++ /* Erased page, return OK */ ++ return 0; ++ ++normal_check: ++ for (i = 0; i < host->pmecc_sector_number; i++) { ++ err_nbr = 0; ++ if (pmecc_stat & 0x1) { ++ buf_pos = buf + i * host->pmecc_sector_size; ++ ++ pmecc_gen_syndrome(mtd, i); ++ pmecc_substitute(mtd); ++ pmecc_get_sigma(mtd); ++ ++ err_nbr = pmecc_err_location(mtd); ++ if (err_nbr == -1) { ++ dev_err(host->dev, "PMECC: Too many errors\n"); ++ mtd->ecc_stats.failed++; ++ return -EIO; ++ } else { ++ pmecc_correct_data(mtd, buf_pos, ecc, i, ++ host->pmecc_bytes_per_sector, err_nbr); ++ mtd->ecc_stats.corrected += err_nbr; ++ } ++ } ++ pmecc_stat >>= 1; ++ } ++ ++ return 0; ++} ++ ++static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, ++ struct nand_chip *chip, uint8_t *buf, int oob_required, int page) ++{ ++ struct atmel_nand_host *host = chip->priv; ++ int eccsize = chip->ecc.size; ++ uint8_t *oob = chip->oob_poi; ++ uint32_t *eccpos = chip->ecc.layout->eccpos; ++ uint32_t stat; ++ unsigned long end_time; ++ ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); ++ pmecc_writel(host->ecc, CFG, (pmecc_readl_relaxed(host->ecc, CFG) ++ & ~PMECC_CFG_WRITE_OP) | PMECC_CFG_AUTO_ENABLE); ++ ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DATA); ++ ++ chip->read_buf(mtd, buf, eccsize); ++ chip->read_buf(mtd, oob, mtd->oobsize); ++ ++ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); ++ while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { ++ if (unlikely(time_after(jiffies, end_time))) { ++ dev_err(host->dev, "PMECC: Timeout to get error status.\n"); ++ return -EIO; ++ } ++ cpu_relax(); ++ } ++ ++ stat = pmecc_readl_relaxed(host->ecc, ISR); ++ if (stat != 0) ++ if (pmecc_correction(mtd, stat, buf, &oob[eccpos[0]]) != 0) ++ return -EIO; ++ ++ return 0; ++} ++ ++static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, ++ struct nand_chip *chip, const uint8_t *buf, int oob_required) ++{ ++ struct atmel_nand_host *host = chip->priv; ++ uint32_t *eccpos = chip->ecc.layout->eccpos; ++ int i, j; ++ unsigned long end_time; ++ ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); ++ ++ pmecc_writel(host->ecc, CFG, (pmecc_readl_relaxed(host->ecc, CFG) | ++ PMECC_CFG_WRITE_OP) & ~PMECC_CFG_AUTO_ENABLE); ++ ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DATA); ++ ++ chip->write_buf(mtd, (u8 *)buf, mtd->writesize); ++ ++ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); ++ while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { ++ if (unlikely(time_after(jiffies, end_time))) { ++ dev_err(host->dev, "PMECC: Timeout to get ECC value.\n"); ++ return -EIO; ++ } ++ cpu_relax(); ++ } ++ ++ for (i = 0; i < host->pmecc_sector_number; i++) { ++ for (j = 0; j < host->pmecc_bytes_per_sector; j++) { ++ int pos; ++ ++ pos = i * host->pmecc_bytes_per_sector + j; ++ chip->oob_poi[eccpos[pos]] = ++ pmecc_readb_ecc_relaxed(host->ecc, i, j); ++ } ++ } ++ chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); ++ ++ return 0; ++} ++ ++static void atmel_pmecc_core_init(struct mtd_info *mtd) ++{ ++ struct nand_chip *nand_chip = mtd->priv; ++ struct atmel_nand_host *host = nand_chip->priv; ++ uint32_t val = 0; ++ struct nand_ecclayout *ecc_layout; ++ ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); ++ ++ switch (host->pmecc_corr_cap) { ++ case 2: ++ val = PMECC_CFG_BCH_ERR2; ++ break; ++ case 4: ++ val = PMECC_CFG_BCH_ERR4; ++ break; ++ case 8: ++ val = PMECC_CFG_BCH_ERR8; ++ break; ++ case 12: ++ val = PMECC_CFG_BCH_ERR12; ++ break; ++ case 24: ++ val = PMECC_CFG_BCH_ERR24; ++ break; ++ } ++ ++ if (host->pmecc_sector_size == 512) ++ val |= PMECC_CFG_SECTOR512; ++ else if (host->pmecc_sector_size == 1024) ++ val |= PMECC_CFG_SECTOR1024; ++ ++ switch (host->pmecc_sector_number) { ++ case 1: ++ val |= PMECC_CFG_PAGE_1SECTOR; ++ break; ++ case 2: ++ val |= PMECC_CFG_PAGE_2SECTORS; ++ break; ++ case 4: ++ val |= PMECC_CFG_PAGE_4SECTORS; ++ break; ++ case 8: ++ val |= PMECC_CFG_PAGE_8SECTORS; ++ break; ++ } ++ ++ val |= (PMECC_CFG_READ_OP | PMECC_CFG_SPARE_DISABLE ++ | PMECC_CFG_AUTO_DISABLE); ++ pmecc_writel(host->ecc, CFG, val); ++ ++ ecc_layout = nand_chip->ecc.layout; ++ pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); ++ pmecc_writel(host->ecc, SADDR, ecc_layout->eccpos[0]); ++ pmecc_writel(host->ecc, EADDR, ++ ecc_layout->eccpos[ecc_layout->eccbytes - 1]); ++ /* See datasheet about PMECC Clock Control Register */ ++ pmecc_writel(host->ecc, CLK, 2); ++ pmecc_writel(host->ecc, IDR, 0xff); ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); ++} ++ ++static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev, ++ struct atmel_nand_host *host) ++{ ++ struct mtd_info *mtd = &host->mtd; ++ struct nand_chip *nand_chip = &host->nand_chip; ++ struct resource *regs, *regs_pmerr, *regs_rom; ++ int cap, sector_size, err_no; ++ ++ cap = host->pmecc_corr_cap; ++ sector_size = host->pmecc_sector_size; ++ dev_info(host->dev, "Initialize PMECC params, cap: %d, sector: %d\n", ++ cap, sector_size); ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!regs) { ++ dev_warn(host->dev, ++ "Can't get I/O resource regs for PMECC controller, rolling back on software ECC\n"); ++ nand_chip->ecc.mode = NAND_ECC_SOFT; ++ return 0; ++ } ++ ++ host->ecc = ioremap(regs->start, resource_size(regs)); ++ if (host->ecc == NULL) { ++ dev_err(host->dev, "ioremap failed\n"); ++ err_no = -EIO; ++ goto err_pmecc_ioremap; ++ } ++ ++ regs_pmerr = platform_get_resource(pdev, IORESOURCE_MEM, 2); ++ regs_rom = platform_get_resource(pdev, IORESOURCE_MEM, 3); ++ if (regs_pmerr && regs_rom) { ++ host->pmerrloc_base = ioremap(regs_pmerr->start, ++ resource_size(regs_pmerr)); ++ host->pmecc_rom_base = ioremap(regs_rom->start, ++ resource_size(regs_rom)); ++ } ++ ++ if (!host->pmerrloc_base || !host->pmecc_rom_base) { ++ dev_err(host->dev, ++ "Can not get I/O resource for PMECC ERRLOC controller or ROM!\n"); ++ err_no = -EIO; ++ goto err_pmloc_ioremap; ++ } ++ ++ /* ECC is calculated for the whole page (1 step) */ ++ nand_chip->ecc.size = mtd->writesize; ++ ++ /* set ECC page size and oob layout */ ++ switch (mtd->writesize) { ++ case 2048: ++ host->pmecc_degree = PMECC_GF_DIMENSION_13; ++ host->pmecc_cw_len = (1 << host->pmecc_degree) - 1; ++ host->pmecc_sector_number = mtd->writesize / sector_size; ++ host->pmecc_bytes_per_sector = pmecc_get_ecc_bytes( ++ cap, sector_size); ++ host->pmecc_alpha_to = pmecc_get_alpha_to(host); ++ host->pmecc_index_of = host->pmecc_rom_base + ++ host->pmecc_lookup_table_offset; ++ ++ nand_chip->ecc.steps = 1; ++ nand_chip->ecc.strength = cap; ++ nand_chip->ecc.bytes = host->pmecc_bytes_per_sector * ++ host->pmecc_sector_number; ++ if (nand_chip->ecc.bytes > mtd->oobsize - 2) { ++ dev_err(host->dev, "No room for ECC bytes\n"); ++ err_no = -EINVAL; ++ goto err_no_ecc_room; ++ } ++ pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, ++ mtd->oobsize, ++ nand_chip->ecc.bytes); ++ nand_chip->ecc.layout = &atmel_pmecc_oobinfo; ++ break; ++ case 512: ++ case 1024: ++ case 4096: ++ /* TODO */ ++ dev_warn(host->dev, ++ "Unsupported page size for PMECC, use Software ECC\n"); ++ default: ++ /* page size not handled by HW ECC */ ++ /* switching back to soft ECC */ ++ nand_chip->ecc.mode = NAND_ECC_SOFT; ++ return 0; ++ } ++ ++ /* Allocate data for PMECC computation */ ++ err_no = pmecc_data_alloc(host); ++ if (err_no) { ++ dev_err(host->dev, ++ "Cannot allocate memory for PMECC computation!\n"); ++ goto err_pmecc_data_alloc; ++ } ++ ++ nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; ++ nand_chip->ecc.write_page = atmel_nand_pmecc_write_page; ++ ++ atmel_pmecc_core_init(mtd); ++ ++ return 0; ++ ++err_pmecc_data_alloc: ++err_no_ecc_room: ++err_pmloc_ioremap: ++ iounmap(host->ecc); ++ if (host->pmerrloc_base) ++ iounmap(host->pmerrloc_base); ++ if (host->pmecc_rom_base) ++ iounmap(host->pmecc_rom_base); ++err_pmecc_ioremap: ++ return err_no; ++} ++ ++/* + * Calculate HW ECC + * + * function called after a write +@@ -743,7 +1465,11 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + } + + if (nand_chip->ecc.mode == NAND_ECC_HW) { +- res = atmel_hw_nand_init_params(pdev, host); ++ if (host->has_pmecc) ++ res = atmel_pmecc_nand_init_params(pdev, host); ++ else ++ res = atmel_hw_nand_init_params(pdev, host); ++ + if (res != 0) + goto err_hw_ecc; + } +@@ -762,8 +1488,16 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + return res; + + err_scan_tail: ++ if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) { ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); ++ pmecc_data_free(host); ++ } + if (host->ecc) + iounmap(host->ecc); ++ if (host->pmerrloc_base) ++ iounmap(host->pmerrloc_base); ++ if (host->pmecc_rom_base) ++ iounmap(host->pmecc_rom_base); + err_hw_ecc: + err_scan_ident: + err_no_card: +@@ -789,8 +1523,19 @@ static int __exit atmel_nand_remove(struct platform_device *pdev) + + atmel_nand_disable(host); + ++ if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) { ++ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); ++ pmerrloc_writel(host->pmerrloc_base, ELDIS, ++ PMERRLOC_DISABLE); ++ pmecc_data_free(host); ++ } ++ + if (host->ecc) + iounmap(host->ecc); ++ if (host->pmecc_rom_base) ++ iounmap(host->pmecc_rom_base); ++ if (host->pmerrloc_base) ++ iounmap(host->pmerrloc_base); + + if (host->dma_chan) + dma_release_channel(host->dma_chan); +diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h +index 578c776..8a1e9a6 100644 +--- a/drivers/mtd/nand/atmel_nand_ecc.h ++++ b/drivers/mtd/nand/atmel_nand_ecc.h +@@ -3,7 +3,7 @@ + * Based on AT91SAM9260 datasheet revision B. + * + * Copyright (C) 2007 Andrew Victor +- * Copyright (C) 2007 Atmel Corporation. ++ * Copyright (C) 2007 - 2012 Atmel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the +@@ -36,4 +36,116 @@ + #define ATMEL_ECC_NPR 0x10 /* NParity register */ + #define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */ + ++/* PMECC Register Definitions */ ++#define ATMEL_PMECC_CFG 0x000 /* Configuration Register */ ++#define PMECC_CFG_BCH_ERR2 (0 << 0) ++#define PMECC_CFG_BCH_ERR4 (1 << 0) ++#define PMECC_CFG_BCH_ERR8 (2 << 0) ++#define PMECC_CFG_BCH_ERR12 (3 << 0) ++#define PMECC_CFG_BCH_ERR24 (4 << 0) ++ ++#define PMECC_CFG_SECTOR512 (0 << 4) ++#define PMECC_CFG_SECTOR1024 (1 << 4) ++ ++#define PMECC_CFG_PAGE_1SECTOR (0 << 8) ++#define PMECC_CFG_PAGE_2SECTORS (1 << 8) ++#define PMECC_CFG_PAGE_4SECTORS (2 << 8) ++#define PMECC_CFG_PAGE_8SECTORS (3 << 8) ++ ++#define PMECC_CFG_READ_OP (0 << 12) ++#define PMECC_CFG_WRITE_OP (1 << 12) ++ ++#define PMECC_CFG_SPARE_ENABLE (1 << 16) ++#define PMECC_CFG_SPARE_DISABLE (0 << 16) ++ ++#define PMECC_CFG_AUTO_ENABLE (1 << 20) ++#define PMECC_CFG_AUTO_DISABLE (0 << 20) ++ ++#define ATMEL_PMECC_SAREA 0x004 /* Spare area size */ ++#define ATMEL_PMECC_SADDR 0x008 /* PMECC starting address */ ++#define ATMEL_PMECC_EADDR 0x00c /* PMECC ending address */ ++#define ATMEL_PMECC_CLK 0x010 /* PMECC clock control */ ++#define PMECC_CLK_133MHZ (2 << 0) ++ ++#define ATMEL_PMECC_CTRL 0x014 /* PMECC control register */ ++#define PMECC_CTRL_RST (1 << 0) ++#define PMECC_CTRL_DATA (1 << 1) ++#define PMECC_CTRL_USER (1 << 2) ++#define PMECC_CTRL_ENABLE (1 << 4) ++#define PMECC_CTRL_DISABLE (1 << 5) ++ ++#define ATMEL_PMECC_SR 0x018 /* PMECC status register */ ++#define PMECC_SR_BUSY (1 << 0) ++#define PMECC_SR_ENABLE (1 << 4) ++ ++#define ATMEL_PMECC_IER 0x01c /* PMECC interrupt enable */ ++#define PMECC_IER_ENABLE (1 << 0) ++#define ATMEL_PMECC_IDR 0x020 /* PMECC interrupt disable */ ++#define PMECC_IER_DISABLE (1 << 0) ++#define ATMEL_PMECC_IMR 0x024 /* PMECC interrupt mask */ ++#define PMECC_IER_MASK (1 << 0) ++#define ATMEL_PMECC_ISR 0x028 /* PMECC interrupt status */ ++#define ATMEL_PMECC_ECCx 0x040 /* PMECC ECC x */ ++#define ATMEL_PMECC_REMx 0x240 /* PMECC REM x */ ++ ++/* PMERRLOC Register Definitions */ ++#define ATMEL_PMERRLOC_ELCFG 0x000 /* Error location config */ ++#define PMERRLOC_ELCFG_SECTOR_512 (0 << 0) ++#define PMERRLOC_ELCFG_SECTOR_1024 (1 << 0) ++#define PMERRLOC_ELCFG_NUM_ERRORS(n) ((n) << 16) ++ ++#define ATMEL_PMERRLOC_ELPRIM 0x004 /* Error location primitive */ ++#define ATMEL_PMERRLOC_ELEN 0x008 /* Error location enable */ ++#define ATMEL_PMERRLOC_ELDIS 0x00c /* Error location disable */ ++#define PMERRLOC_DISABLE (1 << 0) ++ ++#define ATMEL_PMERRLOC_ELSR 0x010 /* Error location status */ ++#define PMERRLOC_ELSR_BUSY (1 << 0) ++#define ATMEL_PMERRLOC_ELIER 0x014 /* Error location int enable */ ++#define ATMEL_PMERRLOC_ELIDR 0x018 /* Error location int disable */ ++#define ATMEL_PMERRLOC_ELIMR 0x01c /* Error location int mask */ ++#define ATMEL_PMERRLOC_ELISR 0x020 /* Error location int status */ ++#define PMERRLOC_ERR_NUM_MASK (0x1f << 8) ++#define PMERRLOC_CALC_DONE (1 << 0) ++#define ATMEL_PMERRLOC_SIGMAx 0x028 /* Error location SIGMA x */ ++#define ATMEL_PMERRLOC_ELx 0x08c /* Error location x */ ++ ++/* Register access macros for PMECC */ ++#define pmecc_readl_relaxed(addr, reg) \ ++ readl_relaxed((addr) + ATMEL_PMECC_##reg) ++ ++#define pmecc_writel(addr, reg, value) \ ++ writel((value), (addr) + ATMEL_PMECC_##reg) ++ ++#define pmecc_readb_ecc_relaxed(addr, sector, n) \ ++ readb_relaxed((addr) + ATMEL_PMECC_ECCx + ((sector) * 0x40) + (n)) ++ ++#define pmecc_readl_rem_relaxed(addr, sector, n) \ ++ readl_relaxed((addr) + ATMEL_PMECC_REMx + ((sector) * 0x40) + ((n) * 4)) ++ ++#define pmerrloc_readl_relaxed(addr, reg) \ ++ readl_relaxed((addr) + ATMEL_PMERRLOC_##reg) ++ ++#define pmerrloc_writel(addr, reg, value) \ ++ writel((value), (addr) + ATMEL_PMERRLOC_##reg) ++ ++#define pmerrloc_writel_sigma_relaxed(addr, n, value) \ ++ writel_relaxed((value), (addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) ++ ++#define pmerrloc_readl_sigma_relaxed(addr, n) \ ++ readl_relaxed((addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) ++ ++#define pmerrloc_readl_el_relaxed(addr, n) \ ++ readl_relaxed((addr) + ATMEL_PMERRLOC_ELx + ((n) * 4)) ++ ++/* Galois field dimension */ ++#define PMECC_GF_DIMENSION_13 13 ++#define PMECC_GF_DIMENSION_14 14 ++ ++#define PMECC_LOOKUP_TABLE_SIZE_512 0x2000 ++#define PMECC_LOOKUP_TABLE_SIZE_1024 0x4000 ++ ++/* Time out value for reading PMECC status register */ ++#define PMECC_MAX_TIMEOUT_MS 100 ++ + #endif +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0075-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch b/patches.at91/0075-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch deleted file mode 100644 index df8ea11c4f2d..000000000000 --- a/patches.at91/0075-MTD-at91-atmel_nand-Update-driver-to-support-Program.patch +++ /dev/null @@ -1,959 +0,0 @@ -From 6dc4ff786c62fa34390607264d4d3ec54e22d5b7 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Fri, 29 Jun 2012 15:29:21 +0800 -Subject: MTD: at91: atmel_nand: Update driver to support Programmable Multibit - ECC controller - -The Programmable Multibit ECC (PMECC) controller is a programmable binary -BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller -can be used to support both SLC and MLC NAND Flash devices. It supports to -generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. - -To use PMECC in this driver, the user needs to set the address and size of -PMECC, PMECC error location controllers and ROM. And also needs to pass the -correction capability, the sector size and ROM lookup table offsets via dt. - -This driver has been tested on AT91SAM9X5-EK and AT91SAM9N12-EK with JFFS2, -YAFFS2, UBIFS and mtd-utils. - -Signed-off-by: Hong Xu -Signed-off-by: Josh Wu -Tested-by: Richard Genoud -Acked-by: Nicolas Ferre ---- - drivers/mtd/nand/atmel_nand.c | 747 +++++++++++++++++++++++++++++++++++++- - drivers/mtd/nand/atmel_nand_ecc.h | 114 +++++- - 2 files changed, 859 insertions(+), 2 deletions(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index 712a705..42b64fb 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -15,6 +15,8 @@ - * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c) - * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas - * -+ * Add Programmable Multibit ECC support for various AT91 SoC -+ * (C) Copyright 2012 ATMEL, Hong Xu - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as -@@ -98,8 +100,31 @@ struct atmel_nand_host { - u8 pmecc_corr_cap; - u16 pmecc_sector_size; - u32 pmecc_lookup_table_offset; -+ -+ int pmecc_bytes_per_sector; -+ int pmecc_sector_number; -+ int pmecc_degree; /* Degree of remainders */ -+ int pmecc_cw_len; /* Length of codeword */ -+ -+ void __iomem *pmerrloc_base; -+ void __iomem *pmecc_rom_base; -+ -+ /* lookup table for alpha_to and index_of */ -+ void __iomem *pmecc_alpha_to; -+ void __iomem *pmecc_index_of; -+ -+ /* data for pmecc computation */ -+ int16_t *pmecc_partial_syn; -+ int16_t *pmecc_si; -+ int16_t *pmecc_smu; /* Sigma table */ -+ int16_t *pmecc_lmu; /* polynomal order */ -+ int *pmecc_mu; -+ int *pmecc_dmu; -+ int *pmecc_delta; - }; - -+static struct nand_ecclayout atmel_pmecc_oobinfo; -+ - static int cpu_has_dma(void) - { - return cpu_is_at91sam9rl() || cpu_is_at91sam9g45(); -@@ -293,6 +318,703 @@ static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) - } - - /* -+ * Return number of ecc bytes per sector according to sector size and -+ * correction capability -+ * -+ * Following table shows what at91 PMECC supported: -+ * Correction Capability Sector_512_bytes Sector_1024_bytes -+ * ===================== ================ ================= -+ * 2-bits 4-bytes 4-bytes -+ * 4-bits 7-bytes 7-bytes -+ * 8-bits 13-bytes 14-bytes -+ * 12-bits 20-bytes 21-bytes -+ * 24-bits 39-bytes 42-bytes -+ */ -+static int __devinit pmecc_get_ecc_bytes(int cap, int sector_size) -+{ -+ int m = 12 + sector_size / 512; -+ return (m * cap + 7) / 8; -+} -+ -+static void __devinit pmecc_config_ecc_layout(struct nand_ecclayout *layout, -+ int oobsize, int ecc_len) -+{ -+ int i; -+ -+ layout->eccbytes = ecc_len; -+ -+ /* ECC will occupy the last ecc_len bytes continuously */ -+ for (i = 0; i < ecc_len; i++) -+ layout->eccpos[i] = oobsize - ecc_len + i; -+ -+ layout->oobfree[0].offset = 2; -+ layout->oobfree[0].length = -+ oobsize - ecc_len - layout->oobfree[0].offset; -+} -+ -+static void __devinit __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) -+{ -+ int table_size; -+ -+ table_size = host->pmecc_sector_size == 512 ? -+ PMECC_LOOKUP_TABLE_SIZE_512 : PMECC_LOOKUP_TABLE_SIZE_1024; -+ -+ return host->pmecc_rom_base + host->pmecc_lookup_table_offset + -+ table_size * sizeof(int16_t); -+} -+ -+static void pmecc_data_free(struct atmel_nand_host *host) -+{ -+ kfree(host->pmecc_partial_syn); -+ kfree(host->pmecc_si); -+ kfree(host->pmecc_lmu); -+ kfree(host->pmecc_smu); -+ kfree(host->pmecc_mu); -+ kfree(host->pmecc_dmu); -+ kfree(host->pmecc_delta); -+} -+ -+static int __devinit pmecc_data_alloc(struct atmel_nand_host *host) -+{ -+ const int cap = host->pmecc_corr_cap; -+ -+ host->pmecc_partial_syn = kzalloc((2 * cap + 1) * sizeof(int16_t), -+ GFP_KERNEL); -+ host->pmecc_si = kzalloc((2 * cap + 1) * sizeof(int16_t), GFP_KERNEL); -+ host->pmecc_lmu = kzalloc((cap + 1) * sizeof(int16_t), GFP_KERNEL); -+ host->pmecc_smu = kzalloc((cap + 2) * (2 * cap + 1) * sizeof(int16_t), -+ GFP_KERNEL); -+ host->pmecc_mu = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); -+ host->pmecc_dmu = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); -+ host->pmecc_delta = kzalloc((cap + 1) * sizeof(int), GFP_KERNEL); -+ -+ if (host->pmecc_partial_syn && -+ host->pmecc_si && -+ host->pmecc_lmu && -+ host->pmecc_smu && -+ host->pmecc_mu && -+ host->pmecc_dmu && -+ host->pmecc_delta) -+ return 0; -+ -+ /* error happened */ -+ pmecc_data_free(host); -+ return -ENOMEM; -+} -+ -+static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ int i; -+ uint32_t value; -+ -+ /* Fill odd syndromes */ -+ for (i = 0; i < host->pmecc_corr_cap; i++) { -+ value = pmecc_readl_rem_relaxed(host->ecc, sector, i / 2); -+ if (i & 1) -+ value >>= 16; -+ value &= 0xffff; -+ host->pmecc_partial_syn[(2 * i) + 1] = (int16_t)value; -+ } -+} -+ -+static void pmecc_substitute(struct mtd_info *mtd) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ int16_t __iomem *alpha_to = host->pmecc_alpha_to; -+ int16_t __iomem *index_of = host->pmecc_index_of; -+ int16_t *partial_syn = host->pmecc_partial_syn; -+ const int cap = host->pmecc_corr_cap; -+ int16_t *si; -+ int i, j; -+ -+ /* si[] is a table that holds the current syndrome value, -+ * an element of that table belongs to the field -+ */ -+ si = host->pmecc_si; -+ -+ memset(&si[1], 0, sizeof(int16_t) * (2 * cap - 1)); -+ -+ /* Computation 2t syndromes based on S(x) */ -+ /* Odd syndromes */ -+ for (i = 1; i < 2 * cap; i += 2) { -+ for (j = 0; j < host->pmecc_degree; j++) { -+ if (partial_syn[i] & ((unsigned short)0x1 << j)) -+ si[i] = readw_relaxed(alpha_to + i * j) ^ si[i]; -+ } -+ } -+ /* Even syndrome = (Odd syndrome) ** 2 */ -+ for (i = 2, j = 1; j <= cap; i = ++j << 1) { -+ if (si[j] == 0) { -+ si[i] = 0; -+ } else { -+ int16_t tmp; -+ -+ tmp = readw_relaxed(index_of + si[j]); -+ tmp = (tmp * 2) % host->pmecc_cw_len; -+ si[i] = readw_relaxed(alpha_to + tmp); -+ } -+ } -+ -+ return; -+} -+ -+static void pmecc_get_sigma(struct mtd_info *mtd) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ -+ int16_t *lmu = host->pmecc_lmu; -+ int16_t *si = host->pmecc_si; -+ int *mu = host->pmecc_mu; -+ int *dmu = host->pmecc_dmu; /* Discrepancy */ -+ int *delta = host->pmecc_delta; /* Delta order */ -+ int cw_len = host->pmecc_cw_len; -+ const int16_t cap = host->pmecc_corr_cap; -+ const int num = 2 * cap + 1; -+ int16_t __iomem *index_of = host->pmecc_index_of; -+ int16_t __iomem *alpha_to = host->pmecc_alpha_to; -+ int i, j, k; -+ uint32_t dmu_0_count, tmp; -+ int16_t *smu = host->pmecc_smu; -+ -+ /* index of largest delta */ -+ int ro; -+ int largest; -+ int diff; -+ -+ dmu_0_count = 0; -+ -+ /* First Row */ -+ -+ /* Mu */ -+ mu[0] = -1; -+ -+ memset(smu, 0, sizeof(int16_t) * num); -+ smu[0] = 1; -+ -+ /* discrepancy set to 1 */ -+ dmu[0] = 1; -+ /* polynom order set to 0 */ -+ lmu[0] = 0; -+ delta[0] = (mu[0] * 2 - lmu[0]) >> 1; -+ -+ /* Second Row */ -+ -+ /* Mu */ -+ mu[1] = 0; -+ /* Sigma(x) set to 1 */ -+ memset(&smu[num], 0, sizeof(int16_t) * num); -+ smu[num] = 1; -+ -+ /* discrepancy set to S1 */ -+ dmu[1] = si[1]; -+ -+ /* polynom order set to 0 */ -+ lmu[1] = 0; -+ -+ delta[1] = (mu[1] * 2 - lmu[1]) >> 1; -+ -+ /* Init the Sigma(x) last row */ -+ memset(&smu[(cap + 1) * num], 0, sizeof(int16_t) * num); -+ -+ for (i = 1; i <= cap; i++) { -+ mu[i + 1] = i << 1; -+ /* Begin Computing Sigma (Mu+1) and L(mu) */ -+ /* check if discrepancy is set to 0 */ -+ if (dmu[i] == 0) { -+ dmu_0_count++; -+ -+ tmp = ((cap - (lmu[i] >> 1) - 1) / 2); -+ if ((cap - (lmu[i] >> 1) - 1) & 0x1) -+ tmp += 2; -+ else -+ tmp += 1; -+ -+ if (dmu_0_count == tmp) { -+ for (j = 0; j <= (lmu[i] >> 1) + 1; j++) -+ smu[(cap + 1) * num + j] = -+ smu[i * num + j]; -+ -+ lmu[cap + 1] = lmu[i]; -+ return; -+ } -+ -+ /* copy polynom */ -+ for (j = 0; j <= lmu[i] >> 1; j++) -+ smu[(i + 1) * num + j] = smu[i * num + j]; -+ -+ /* copy previous polynom order to the next */ -+ lmu[i + 1] = lmu[i]; -+ } else { -+ ro = 0; -+ largest = -1; -+ /* find largest delta with dmu != 0 */ -+ for (j = 0; j < i; j++) { -+ if ((dmu[j]) && (delta[j] > largest)) { -+ largest = delta[j]; -+ ro = j; -+ } -+ } -+ -+ /* compute difference */ -+ diff = (mu[i] - mu[ro]); -+ -+ /* Compute degree of the new smu polynomial */ -+ if ((lmu[i] >> 1) > ((lmu[ro] >> 1) + diff)) -+ lmu[i + 1] = lmu[i]; -+ else -+ lmu[i + 1] = ((lmu[ro] >> 1) + diff) * 2; -+ -+ /* Init smu[i+1] with 0 */ -+ for (k = 0; k < num; k++) -+ smu[(i + 1) * num + k] = 0; -+ -+ /* Compute smu[i+1] */ -+ for (k = 0; k <= lmu[ro] >> 1; k++) { -+ int16_t a, b, c; -+ -+ if (!(smu[ro * num + k] && dmu[i])) -+ continue; -+ a = readw_relaxed(index_of + dmu[i]); -+ b = readw_relaxed(index_of + dmu[ro]); -+ c = readw_relaxed(index_of + smu[ro * num + k]); -+ tmp = a + (cw_len - b) + c; -+ a = readw_relaxed(alpha_to + tmp % cw_len); -+ smu[(i + 1) * num + (k + diff)] = a; -+ } -+ -+ for (k = 0; k <= lmu[i] >> 1; k++) -+ smu[(i + 1) * num + k] ^= smu[i * num + k]; -+ } -+ -+ /* End Computing Sigma (Mu+1) and L(mu) */ -+ /* In either case compute delta */ -+ delta[i + 1] = (mu[i + 1] * 2 - lmu[i + 1]) >> 1; -+ -+ /* Do not compute discrepancy for the last iteration */ -+ if (i >= cap) -+ continue; -+ -+ for (k = 0; k <= (lmu[i + 1] >> 1); k++) { -+ tmp = 2 * (i - 1); -+ if (k == 0) { -+ dmu[i + 1] = si[tmp + 3]; -+ } else if (smu[(i + 1) * num + k] && si[tmp + 3 - k]) { -+ int16_t a, b, c; -+ a = readw_relaxed(index_of + -+ smu[(i + 1) * num + k]); -+ b = si[2 * (i - 1) + 3 - k]; -+ c = readw_relaxed(index_of + b); -+ tmp = a + c; -+ tmp %= cw_len; -+ dmu[i + 1] = readw_relaxed(alpha_to + tmp) ^ -+ dmu[i + 1]; -+ } -+ } -+ } -+ -+ return; -+} -+ -+static int pmecc_err_location(struct mtd_info *mtd) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ unsigned long end_time; -+ const int cap = host->pmecc_corr_cap; -+ const int num = 2 * cap + 1; -+ int sector_size = host->pmecc_sector_size; -+ int err_nbr = 0; /* number of error */ -+ int roots_nbr; /* number of roots */ -+ int i; -+ uint32_t val; -+ int16_t *smu = host->pmecc_smu; -+ -+ pmerrloc_writel(host->pmerrloc_base, ELDIS, PMERRLOC_DISABLE); -+ -+ for (i = 0; i <= host->pmecc_lmu[cap + 1] >> 1; i++) { -+ pmerrloc_writel_sigma_relaxed(host->pmerrloc_base, i, -+ smu[(cap + 1) * num + i]); -+ err_nbr++; -+ } -+ -+ val = (err_nbr - 1) << 16; -+ if (sector_size == 1024) -+ val |= 1; -+ -+ pmerrloc_writel(host->pmerrloc_base, ELCFG, val); -+ pmerrloc_writel(host->pmerrloc_base, ELEN, -+ sector_size * 8 + host->pmecc_degree * cap); -+ -+ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); -+ while (!(pmerrloc_readl_relaxed(host->pmerrloc_base, ELISR) -+ & PMERRLOC_CALC_DONE)) { -+ if (unlikely(time_after(jiffies, end_time))) { -+ dev_err(host->dev, "PMECC: Timeout to calculate error location.\n"); -+ return -1; -+ } -+ cpu_relax(); -+ } -+ -+ roots_nbr = (pmerrloc_readl_relaxed(host->pmerrloc_base, ELISR) -+ & PMERRLOC_ERR_NUM_MASK) >> 8; -+ /* Number of roots == degree of smu hence <= cap */ -+ if (roots_nbr == host->pmecc_lmu[cap + 1] >> 1) -+ return err_nbr - 1; -+ -+ /* Number of roots does not match the degree of smu -+ * unable to correct error */ -+ return -1; -+} -+ -+static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, -+ int sector_num, int extra_bytes, int err_nbr) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ int i = 0; -+ int byte_pos, bit_pos, sector_size, pos; -+ uint32_t tmp; -+ uint8_t err_byte; -+ -+ sector_size = host->pmecc_sector_size; -+ -+ while (err_nbr) { -+ tmp = pmerrloc_readl_el_relaxed(host->pmerrloc_base, i) - 1; -+ byte_pos = tmp / 8; -+ bit_pos = tmp % 8; -+ -+ if (byte_pos >= (sector_size + extra_bytes)) -+ BUG(); /* should never happen */ -+ -+ if (byte_pos < sector_size) { -+ err_byte = *(buf + byte_pos); -+ *(buf + byte_pos) ^= (1 << bit_pos); -+ -+ pos = sector_num * host->pmecc_sector_size + byte_pos; -+ dev_info(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", -+ pos, bit_pos, err_byte, *(buf + byte_pos)); -+ } else { -+ /* Bit flip in OOB area */ -+ tmp = sector_num * host->pmecc_bytes_per_sector -+ + (byte_pos - sector_size); -+ err_byte = ecc[tmp]; -+ ecc[tmp] ^= (1 << bit_pos); -+ -+ pos = tmp + nand_chip->ecc.layout->eccpos[0]; -+ dev_info(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", -+ pos, bit_pos, err_byte, ecc[tmp]); -+ } -+ -+ i++; -+ err_nbr--; -+ } -+ -+ return; -+} -+ -+static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf, -+ u8 *ecc) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ int i, err_nbr, eccbytes; -+ uint8_t *buf_pos; -+ -+ eccbytes = nand_chip->ecc.bytes; -+ for (i = 0; i < eccbytes; i++) -+ if (ecc[i] != 0xff) -+ goto normal_check; -+ /* Erased page, return OK */ -+ return 0; -+ -+normal_check: -+ for (i = 0; i < host->pmecc_sector_number; i++) { -+ err_nbr = 0; -+ if (pmecc_stat & 0x1) { -+ buf_pos = buf + i * host->pmecc_sector_size; -+ -+ pmecc_gen_syndrome(mtd, i); -+ pmecc_substitute(mtd); -+ pmecc_get_sigma(mtd); -+ -+ err_nbr = pmecc_err_location(mtd); -+ if (err_nbr == -1) { -+ dev_err(host->dev, "PMECC: Too many errors\n"); -+ mtd->ecc_stats.failed++; -+ return -EIO; -+ } else { -+ pmecc_correct_data(mtd, buf_pos, ecc, i, -+ host->pmecc_bytes_per_sector, err_nbr); -+ mtd->ecc_stats.corrected += err_nbr; -+ } -+ } -+ pmecc_stat >>= 1; -+ } -+ -+ return 0; -+} -+ -+static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, -+ struct nand_chip *chip, uint8_t *buf, int oob_required, int page) -+{ -+ struct atmel_nand_host *host = chip->priv; -+ int eccsize = chip->ecc.size; -+ uint8_t *oob = chip->oob_poi; -+ uint32_t *eccpos = chip->ecc.layout->eccpos; -+ uint32_t stat; -+ unsigned long end_time; -+ -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); -+ pmecc_writel(host->ecc, CFG, (pmecc_readl_relaxed(host->ecc, CFG) -+ & ~PMECC_CFG_WRITE_OP) | PMECC_CFG_AUTO_ENABLE); -+ -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DATA); -+ -+ chip->read_buf(mtd, buf, eccsize); -+ chip->read_buf(mtd, oob, mtd->oobsize); -+ -+ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); -+ while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { -+ if (unlikely(time_after(jiffies, end_time))) { -+ dev_err(host->dev, "PMECC: Timeout to get error status.\n"); -+ return -EIO; -+ } -+ cpu_relax(); -+ } -+ -+ stat = pmecc_readl_relaxed(host->ecc, ISR); -+ if (stat != 0) -+ if (pmecc_correction(mtd, stat, buf, &oob[eccpos[0]]) != 0) -+ return -EIO; -+ -+ return 0; -+} -+ -+static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, -+ struct nand_chip *chip, const uint8_t *buf, int oob_required) -+{ -+ struct atmel_nand_host *host = chip->priv; -+ uint32_t *eccpos = chip->ecc.layout->eccpos; -+ int i, j; -+ unsigned long end_time; -+ -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); -+ -+ pmecc_writel(host->ecc, CFG, (pmecc_readl_relaxed(host->ecc, CFG) | -+ PMECC_CFG_WRITE_OP) & ~PMECC_CFG_AUTO_ENABLE); -+ -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DATA); -+ -+ chip->write_buf(mtd, (u8 *)buf, mtd->writesize); -+ -+ end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS); -+ while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { -+ if (unlikely(time_after(jiffies, end_time))) { -+ dev_err(host->dev, "PMECC: Timeout to get ECC value.\n"); -+ return -EIO; -+ } -+ cpu_relax(); -+ } -+ -+ for (i = 0; i < host->pmecc_sector_number; i++) { -+ for (j = 0; j < host->pmecc_bytes_per_sector; j++) { -+ int pos; -+ -+ pos = i * host->pmecc_bytes_per_sector + j; -+ chip->oob_poi[eccpos[pos]] = -+ pmecc_readb_ecc_relaxed(host->ecc, i, j); -+ } -+ } -+ chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -+ -+ return 0; -+} -+ -+static void atmel_pmecc_core_init(struct mtd_info *mtd) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct atmel_nand_host *host = nand_chip->priv; -+ uint32_t val = 0; -+ struct nand_ecclayout *ecc_layout; -+ -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); -+ -+ switch (host->pmecc_corr_cap) { -+ case 2: -+ val = PMECC_CFG_BCH_ERR2; -+ break; -+ case 4: -+ val = PMECC_CFG_BCH_ERR4; -+ break; -+ case 8: -+ val = PMECC_CFG_BCH_ERR8; -+ break; -+ case 12: -+ val = PMECC_CFG_BCH_ERR12; -+ break; -+ case 24: -+ val = PMECC_CFG_BCH_ERR24; -+ break; -+ } -+ -+ if (host->pmecc_sector_size == 512) -+ val |= PMECC_CFG_SECTOR512; -+ else if (host->pmecc_sector_size == 1024) -+ val |= PMECC_CFG_SECTOR1024; -+ -+ switch (host->pmecc_sector_number) { -+ case 1: -+ val |= PMECC_CFG_PAGE_1SECTOR; -+ break; -+ case 2: -+ val |= PMECC_CFG_PAGE_2SECTORS; -+ break; -+ case 4: -+ val |= PMECC_CFG_PAGE_4SECTORS; -+ break; -+ case 8: -+ val |= PMECC_CFG_PAGE_8SECTORS; -+ break; -+ } -+ -+ val |= (PMECC_CFG_READ_OP | PMECC_CFG_SPARE_DISABLE -+ | PMECC_CFG_AUTO_DISABLE); -+ pmecc_writel(host->ecc, CFG, val); -+ -+ ecc_layout = nand_chip->ecc.layout; -+ pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); -+ pmecc_writel(host->ecc, SADDR, ecc_layout->eccpos[0]); -+ pmecc_writel(host->ecc, EADDR, -+ ecc_layout->eccpos[ecc_layout->eccbytes - 1]); -+ /* See datasheet about PMECC Clock Control Register */ -+ pmecc_writel(host->ecc, CLK, 2); -+ pmecc_writel(host->ecc, IDR, 0xff); -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); -+} -+ -+static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev, -+ struct atmel_nand_host *host) -+{ -+ struct mtd_info *mtd = &host->mtd; -+ struct nand_chip *nand_chip = &host->nand_chip; -+ struct resource *regs, *regs_pmerr, *regs_rom; -+ int cap, sector_size, err_no; -+ -+ cap = host->pmecc_corr_cap; -+ sector_size = host->pmecc_sector_size; -+ dev_info(host->dev, "Initialize PMECC params, cap: %d, sector: %d\n", -+ cap, sector_size); -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ if (!regs) { -+ dev_warn(host->dev, -+ "Can't get I/O resource regs for PMECC controller, rolling back on software ECC\n"); -+ nand_chip->ecc.mode = NAND_ECC_SOFT; -+ return 0; -+ } -+ -+ host->ecc = ioremap(regs->start, resource_size(regs)); -+ if (host->ecc == NULL) { -+ dev_err(host->dev, "ioremap failed\n"); -+ err_no = -EIO; -+ goto err_pmecc_ioremap; -+ } -+ -+ regs_pmerr = platform_get_resource(pdev, IORESOURCE_MEM, 2); -+ regs_rom = platform_get_resource(pdev, IORESOURCE_MEM, 3); -+ if (regs_pmerr && regs_rom) { -+ host->pmerrloc_base = ioremap(regs_pmerr->start, -+ resource_size(regs_pmerr)); -+ host->pmecc_rom_base = ioremap(regs_rom->start, -+ resource_size(regs_rom)); -+ } -+ -+ if (!host->pmerrloc_base || !host->pmecc_rom_base) { -+ dev_err(host->dev, -+ "Can not get I/O resource for PMECC ERRLOC controller or ROM!\n"); -+ err_no = -EIO; -+ goto err_pmloc_ioremap; -+ } -+ -+ /* ECC is calculated for the whole page (1 step) */ -+ nand_chip->ecc.size = mtd->writesize; -+ -+ /* set ECC page size and oob layout */ -+ switch (mtd->writesize) { -+ case 2048: -+ host->pmecc_degree = PMECC_GF_DIMENSION_13; -+ host->pmecc_cw_len = (1 << host->pmecc_degree) - 1; -+ host->pmecc_sector_number = mtd->writesize / sector_size; -+ host->pmecc_bytes_per_sector = pmecc_get_ecc_bytes( -+ cap, sector_size); -+ host->pmecc_alpha_to = pmecc_get_alpha_to(host); -+ host->pmecc_index_of = host->pmecc_rom_base + -+ host->pmecc_lookup_table_offset; -+ -+ nand_chip->ecc.steps = 1; -+ nand_chip->ecc.strength = cap; -+ nand_chip->ecc.bytes = host->pmecc_bytes_per_sector * -+ host->pmecc_sector_number; -+ if (nand_chip->ecc.bytes > mtd->oobsize - 2) { -+ dev_err(host->dev, "No room for ECC bytes\n"); -+ err_no = -EINVAL; -+ goto err_no_ecc_room; -+ } -+ pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, -+ mtd->oobsize, -+ nand_chip->ecc.bytes); -+ nand_chip->ecc.layout = &atmel_pmecc_oobinfo; -+ break; -+ case 512: -+ case 1024: -+ case 4096: -+ /* TODO */ -+ dev_warn(host->dev, -+ "Unsupported page size for PMECC, use Software ECC\n"); -+ default: -+ /* page size not handled by HW ECC */ -+ /* switching back to soft ECC */ -+ nand_chip->ecc.mode = NAND_ECC_SOFT; -+ return 0; -+ } -+ -+ /* Allocate data for PMECC computation */ -+ err_no = pmecc_data_alloc(host); -+ if (err_no) { -+ dev_err(host->dev, -+ "Cannot allocate memory for PMECC computation!\n"); -+ goto err_pmecc_data_alloc; -+ } -+ -+ nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; -+ nand_chip->ecc.write_page = atmel_nand_pmecc_write_page; -+ -+ atmel_pmecc_core_init(mtd); -+ -+ return 0; -+ -+err_pmecc_data_alloc: -+err_no_ecc_room: -+err_pmloc_ioremap: -+ iounmap(host->ecc); -+ if (host->pmerrloc_base) -+ iounmap(host->pmerrloc_base); -+ if (host->pmecc_rom_base) -+ iounmap(host->pmecc_rom_base); -+err_pmecc_ioremap: -+ return err_no; -+} -+ -+/* - * Calculate HW ECC - * - * function called after a write -@@ -743,7 +1465,11 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - } - - if (nand_chip->ecc.mode == NAND_ECC_HW) { -- res = atmel_hw_nand_init_params(pdev, host); -+ if (host->has_pmecc) -+ res = atmel_pmecc_nand_init_params(pdev, host); -+ else -+ res = atmel_hw_nand_init_params(pdev, host); -+ - if (res != 0) - goto err_hw_ecc; - } -@@ -762,8 +1488,16 @@ static int __init atmel_nand_probe(struct platform_device *pdev) - return res; - - err_scan_tail: -+ if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) { -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); -+ pmecc_data_free(host); -+ } - if (host->ecc) - iounmap(host->ecc); -+ if (host->pmerrloc_base) -+ iounmap(host->pmerrloc_base); -+ if (host->pmecc_rom_base) -+ iounmap(host->pmecc_rom_base); - err_hw_ecc: - err_scan_ident: - err_no_card: -@@ -789,8 +1523,19 @@ static int __exit atmel_nand_remove(struct platform_device *pdev) - - atmel_nand_disable(host); - -+ if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) { -+ pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); -+ pmerrloc_writel(host->pmerrloc_base, ELDIS, -+ PMERRLOC_DISABLE); -+ pmecc_data_free(host); -+ } -+ - if (host->ecc) - iounmap(host->ecc); -+ if (host->pmecc_rom_base) -+ iounmap(host->pmecc_rom_base); -+ if (host->pmerrloc_base) -+ iounmap(host->pmerrloc_base); - - if (host->dma_chan) - dma_release_channel(host->dma_chan); -diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h -index 578c776..8a1e9a6 100644 ---- a/drivers/mtd/nand/atmel_nand_ecc.h -+++ b/drivers/mtd/nand/atmel_nand_ecc.h -@@ -3,7 +3,7 @@ - * Based on AT91SAM9260 datasheet revision B. - * - * Copyright (C) 2007 Andrew Victor -- * Copyright (C) 2007 Atmel Corporation. -+ * Copyright (C) 2007 - 2012 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -36,4 +36,116 @@ - #define ATMEL_ECC_NPR 0x10 /* NParity register */ - #define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */ - -+/* PMECC Register Definitions */ -+#define ATMEL_PMECC_CFG 0x000 /* Configuration Register */ -+#define PMECC_CFG_BCH_ERR2 (0 << 0) -+#define PMECC_CFG_BCH_ERR4 (1 << 0) -+#define PMECC_CFG_BCH_ERR8 (2 << 0) -+#define PMECC_CFG_BCH_ERR12 (3 << 0) -+#define PMECC_CFG_BCH_ERR24 (4 << 0) -+ -+#define PMECC_CFG_SECTOR512 (0 << 4) -+#define PMECC_CFG_SECTOR1024 (1 << 4) -+ -+#define PMECC_CFG_PAGE_1SECTOR (0 << 8) -+#define PMECC_CFG_PAGE_2SECTORS (1 << 8) -+#define PMECC_CFG_PAGE_4SECTORS (2 << 8) -+#define PMECC_CFG_PAGE_8SECTORS (3 << 8) -+ -+#define PMECC_CFG_READ_OP (0 << 12) -+#define PMECC_CFG_WRITE_OP (1 << 12) -+ -+#define PMECC_CFG_SPARE_ENABLE (1 << 16) -+#define PMECC_CFG_SPARE_DISABLE (0 << 16) -+ -+#define PMECC_CFG_AUTO_ENABLE (1 << 20) -+#define PMECC_CFG_AUTO_DISABLE (0 << 20) -+ -+#define ATMEL_PMECC_SAREA 0x004 /* Spare area size */ -+#define ATMEL_PMECC_SADDR 0x008 /* PMECC starting address */ -+#define ATMEL_PMECC_EADDR 0x00c /* PMECC ending address */ -+#define ATMEL_PMECC_CLK 0x010 /* PMECC clock control */ -+#define PMECC_CLK_133MHZ (2 << 0) -+ -+#define ATMEL_PMECC_CTRL 0x014 /* PMECC control register */ -+#define PMECC_CTRL_RST (1 << 0) -+#define PMECC_CTRL_DATA (1 << 1) -+#define PMECC_CTRL_USER (1 << 2) -+#define PMECC_CTRL_ENABLE (1 << 4) -+#define PMECC_CTRL_DISABLE (1 << 5) -+ -+#define ATMEL_PMECC_SR 0x018 /* PMECC status register */ -+#define PMECC_SR_BUSY (1 << 0) -+#define PMECC_SR_ENABLE (1 << 4) -+ -+#define ATMEL_PMECC_IER 0x01c /* PMECC interrupt enable */ -+#define PMECC_IER_ENABLE (1 << 0) -+#define ATMEL_PMECC_IDR 0x020 /* PMECC interrupt disable */ -+#define PMECC_IER_DISABLE (1 << 0) -+#define ATMEL_PMECC_IMR 0x024 /* PMECC interrupt mask */ -+#define PMECC_IER_MASK (1 << 0) -+#define ATMEL_PMECC_ISR 0x028 /* PMECC interrupt status */ -+#define ATMEL_PMECC_ECCx 0x040 /* PMECC ECC x */ -+#define ATMEL_PMECC_REMx 0x240 /* PMECC REM x */ -+ -+/* PMERRLOC Register Definitions */ -+#define ATMEL_PMERRLOC_ELCFG 0x000 /* Error location config */ -+#define PMERRLOC_ELCFG_SECTOR_512 (0 << 0) -+#define PMERRLOC_ELCFG_SECTOR_1024 (1 << 0) -+#define PMERRLOC_ELCFG_NUM_ERRORS(n) ((n) << 16) -+ -+#define ATMEL_PMERRLOC_ELPRIM 0x004 /* Error location primitive */ -+#define ATMEL_PMERRLOC_ELEN 0x008 /* Error location enable */ -+#define ATMEL_PMERRLOC_ELDIS 0x00c /* Error location disable */ -+#define PMERRLOC_DISABLE (1 << 0) -+ -+#define ATMEL_PMERRLOC_ELSR 0x010 /* Error location status */ -+#define PMERRLOC_ELSR_BUSY (1 << 0) -+#define ATMEL_PMERRLOC_ELIER 0x014 /* Error location int enable */ -+#define ATMEL_PMERRLOC_ELIDR 0x018 /* Error location int disable */ -+#define ATMEL_PMERRLOC_ELIMR 0x01c /* Error location int mask */ -+#define ATMEL_PMERRLOC_ELISR 0x020 /* Error location int status */ -+#define PMERRLOC_ERR_NUM_MASK (0x1f << 8) -+#define PMERRLOC_CALC_DONE (1 << 0) -+#define ATMEL_PMERRLOC_SIGMAx 0x028 /* Error location SIGMA x */ -+#define ATMEL_PMERRLOC_ELx 0x08c /* Error location x */ -+ -+/* Register access macros for PMECC */ -+#define pmecc_readl_relaxed(addr, reg) \ -+ readl_relaxed((addr) + ATMEL_PMECC_##reg) -+ -+#define pmecc_writel(addr, reg, value) \ -+ writel((value), (addr) + ATMEL_PMECC_##reg) -+ -+#define pmecc_readb_ecc_relaxed(addr, sector, n) \ -+ readb_relaxed((addr) + ATMEL_PMECC_ECCx + ((sector) * 0x40) + (n)) -+ -+#define pmecc_readl_rem_relaxed(addr, sector, n) \ -+ readl_relaxed((addr) + ATMEL_PMECC_REMx + ((sector) * 0x40) + ((n) * 4)) -+ -+#define pmerrloc_readl_relaxed(addr, reg) \ -+ readl_relaxed((addr) + ATMEL_PMERRLOC_##reg) -+ -+#define pmerrloc_writel(addr, reg, value) \ -+ writel((value), (addr) + ATMEL_PMERRLOC_##reg) -+ -+#define pmerrloc_writel_sigma_relaxed(addr, n, value) \ -+ writel_relaxed((value), (addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) -+ -+#define pmerrloc_readl_sigma_relaxed(addr, n) \ -+ readl_relaxed((addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) -+ -+#define pmerrloc_readl_el_relaxed(addr, n) \ -+ readl_relaxed((addr) + ATMEL_PMERRLOC_ELx + ((n) * 4)) -+ -+/* Galois field dimension */ -+#define PMECC_GF_DIMENSION_13 13 -+#define PMECC_GF_DIMENSION_14 14 -+ -+#define PMECC_LOOKUP_TABLE_SIZE_512 0x2000 -+#define PMECC_LOOKUP_TABLE_SIZE_1024 0x4000 -+ -+/* Time out value for reading PMECC status register */ -+#define PMECC_MAX_TIMEOUT_MS 100 -+ - #endif --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0075-MTD-nand-add-return-value-for-write_page-write_page_.patch b/patches.at91/0075-MTD-nand-add-return-value-for-write_page-write_page_.patch new file mode 100644 index 000000000000..3078b1978401 --- /dev/null +++ b/patches.at91/0075-MTD-nand-add-return-value-for-write_page-write_page_.patch @@ -0,0 +1,155 @@ +From 8a6cf5507a3070841f8b4636af42d847d885f50d Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Mon, 25 Jun 2012 15:15:54 +0800 +Subject: MTD: nand: add return value for write_page()/write_page_raw() + functions in structure of nand_ecc_ctrl. + +Is the equivalent of commit fdbad98dff8007f2b8bee6698b5d25ebba0471c9 upstream. + +There is an implemention of hardware ECC write page function which may return an +error indication. +For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware +engine will compute the BCH ecc code for this page. so we need read a the +status register to theck whether the ecc code is generated. +But we cannot assume the status register always can be ready, for example, +incorrect hardware configuration or hardware issue, in such case we need +write_page() to return a error code. + +Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'. +So this patch will: + 1. add return 'int' value for 'write_page' function. + 2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too. + 3. add code to test the return value, and if negative, indicate an + error happend when write page with ECC. + 4. fix the compile warning in all impacted nand flash driver. + +Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. + +Signed-off-by: Josh Wu +--- + drivers/mtd/nand/nand_base.c | 27 +++++++++++++++++++-------- + include/linux/mtd/nand.h | 4 ++-- + 2 files changed, 21 insertions(+), 10 deletions(-) + +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -1922,11 +1922,13 @@ out: + * + * Not for syndrome calculating ECC controllers, which use a special oob layout. + */ +-static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, ++static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) + { + chip->write_buf(mtd, buf, mtd->writesize); + chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); ++ ++ return 0; + } + + /** +@@ -1937,7 +1939,7 @@ static void nand_write_page_raw(struct m + * + * We need a special oob layout and handling even when ECC isn't checked. + */ +-static void nand_write_page_raw_syndrome(struct mtd_info *mtd, ++static int nand_write_page_raw_syndrome(struct mtd_info *mtd, + struct nand_chip *chip, + const uint8_t *buf) + { +@@ -1967,6 +1969,8 @@ static void nand_write_page_raw_syndrome + size = mtd->oobsize - (oob - chip->oob_poi); + if (size) + chip->write_buf(mtd, oob, size); ++ ++ return 0; + } + /** + * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function +@@ -1974,7 +1978,7 @@ static void nand_write_page_raw_syndrome + * @chip: nand chip info structure + * @buf: data buffer + */ +-static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, ++static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) + { + int i, eccsize = chip->ecc.size; +@@ -1991,7 +1995,7 @@ static void nand_write_page_swecc(struct + for (i = 0; i < chip->ecc.total; i++) + chip->oob_poi[eccpos[i]] = ecc_calc[i]; + +- chip->ecc.write_page_raw(mtd, chip, buf); ++ return chip->ecc.write_page_raw(mtd, chip, buf); + } + + /** +@@ -2000,7 +2004,7 @@ static void nand_write_page_swecc(struct + * @chip: nand chip info structure + * @buf: data buffer + */ +-static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, ++static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) + { + int i, eccsize = chip->ecc.size; +@@ -2020,6 +2024,8 @@ static void nand_write_page_hwecc(struct + chip->oob_poi[eccpos[i]] = ecc_calc[i]; + + chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); ++ ++ return 0; + } + + /** +@@ -2031,7 +2037,7 @@ static void nand_write_page_hwecc(struct + * The hw generator calculates the error syndrome automatically. Therefore we + * need a special oob layout and handling. + */ +-static void nand_write_page_syndrome(struct mtd_info *mtd, ++static int nand_write_page_syndrome(struct mtd_info *mtd, + struct nand_chip *chip, const uint8_t *buf) + { + int i, eccsize = chip->ecc.size; +@@ -2064,6 +2070,8 @@ static void nand_write_page_syndrome(str + i = mtd->oobsize - (oob - chip->oob_poi); + if (i) + chip->write_buf(mtd, oob, i); ++ ++ return 0; + } + + /** +@@ -2083,9 +2091,12 @@ static int nand_write_page(struct mtd_in + chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); + + if (unlikely(raw)) +- chip->ecc.write_page_raw(mtd, chip, buf); ++ status = chip->ecc.write_page_raw(mtd, chip, buf); + else +- chip->ecc.write_page(mtd, chip, buf); ++ status = chip->ecc.write_page(mtd, chip, buf); ++ ++ if (status < 0) ++ return status; + + /* + * Cached progamming disabled for now. Not sure if it's worth the +--- a/include/linux/mtd/nand.h ++++ b/include/linux/mtd/nand.h +@@ -361,13 +361,13 @@ struct nand_ecc_ctrl { + uint8_t *calc_ecc); + int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page); +- void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, ++ int (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf); + int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page); + int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, + uint32_t offs, uint32_t len, uint8_t *buf); +- void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, ++ int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf); + int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, + int page); diff --git a/patches.at91/0076-MTD-atmel-nand-fix-gpio-missing-request.patch b/patches.at91/0076-MTD-atmel-nand-fix-gpio-missing-request.patch new file mode 100644 index 000000000000..2cb9fbdff7cc --- /dev/null +++ b/patches.at91/0076-MTD-atmel-nand-fix-gpio-missing-request.patch @@ -0,0 +1,88 @@ +From b9401beeb6444e9e2bc4de97b1efc2ac9491a34f Mon Sep 17 00:00:00 2001 +From: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu, 12 Jul 2012 13:20:22 +0800 +Subject: MTD: atmel nand: fix gpio missing request + +commit 28446acb1f8268cda4b2076f72519534f84d6a36 upstream. + +without this the gpio will not be muxed as a gpio by the current custom pinmux +or later by the pinctrl + +Acked-by: Linus Walleij +Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD +--- + drivers/mtd/nand/atmel_nand.c | 50 ++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 49 insertions(+), 1 deletion(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index 42b64fb..c512bba 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -1410,8 +1410,41 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + nand_chip->IO_ADDR_W = host->io_base; + nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; + +- if (gpio_is_valid(host->board.rdy_pin)) ++ if (gpio_is_valid(host->board.rdy_pin)) { ++ res = devm_gpio_request(&pdev->dev, ++ host->board.rdy_pin, "nand_rdy"); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request rdy gpio %d\n", host->board.rdy_pin); ++ goto err_ecc_ioremap; ++ } ++ ++ res = gpio_direction_input(host->board.rdy_pin); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request input direction rdy gpio %d\n", host->board.rdy_pin); ++ goto err_ecc_ioremap; ++ } ++ + nand_chip->dev_ready = atmel_nand_device_ready; ++ } ++ ++ if (gpio_is_valid(host->board.enable_pin)) { ++ res = devm_gpio_request(&pdev->dev, ++ host->board.enable_pin, "nand_enable"); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request enable gpio %d\n", host->board.enable_pin); ++ goto err_ecc_ioremap; ++ } ++ ++ res = gpio_direction_output(host->board.enable_pin, 1); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request output direction enable gpio %d\n", host->board.enable_pin); ++ goto err_ecc_ioremap; ++ } ++ } + + nand_chip->ecc.mode = host->board.ecc_mode; + nand_chip->chip_delay = 20; /* 20us command delay time */ +@@ -1426,6 +1459,21 @@ static int __init atmel_nand_probe(struct platform_device *pdev) + atmel_nand_enable(host); + + if (gpio_is_valid(host->board.det_pin)) { ++ res = devm_gpio_request(&pdev->dev, ++ host->board.det_pin, "nand_det"); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request det gpio %d\n", host->board.det_pin); ++ goto err_no_card; ++ } ++ ++ res = gpio_direction_input(host->board.det_pin); ++ if (res < 0) { ++ dev_err(&pdev->dev, ++ "can't request input direction det gpio %d\n", host->board.det_pin); ++ goto err_no_card; ++ } ++ + if (gpio_get_value(host->board.det_pin)) { + printk(KERN_INFO "No SmartMedia card inserted.\n"); + res = -ENXIO; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0076-MTD-nand-add-return-value-for-write_page-write_page_.patch b/patches.at91/0076-MTD-nand-add-return-value-for-write_page-write_page_.patch deleted file mode 100644 index af5354607adb..000000000000 --- a/patches.at91/0076-MTD-nand-add-return-value-for-write_page-write_page_.patch +++ /dev/null @@ -1,153 +0,0 @@ -From c00279166e428d885fd658d0be8d2419acc87d18 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Mon, 25 Jun 2012 15:15:54 +0800 -Subject: MTD: nand: add return value for write_page()/write_page_raw() - functions in structure of nand_ecc_ctrl. - -There is an implemention of hardware ECC write page function which may return an -error indication. -For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware -engine will compute the BCH ecc code for this page. so we need read a the -status register to theck whether the ecc code is generated. -But we cannot assume the status register always can be ready, for example, -incorrect hardware configuration or hardware issue, in such case we need -write_page() to return a error code. - -Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'. -So this patch will: - 1. add return 'int' value for 'write_page' function. - 2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too. - 3. add code to test the return value, and if negative, indicate an - error happend when write page with ECC. - 4. fix the compile warning in all impacted nand flash driver. - -Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. - -Signed-off-by: Josh Wu ---- - drivers/mtd/nand/nand_base.c | 27 +++++++++++++++++++-------- - include/linux/mtd/nand.h | 4 ++-- - 2 files changed, 21 insertions(+), 10 deletions(-) - ---- a/drivers/mtd/nand/nand_base.c -+++ b/drivers/mtd/nand/nand_base.c -@@ -1922,11 +1922,13 @@ out: - * - * Not for syndrome calculating ECC controllers, which use a special oob layout. - */ --static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, -+static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf) - { - chip->write_buf(mtd, buf, mtd->writesize); - chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -+ -+ return 0; - } - - /** -@@ -1937,7 +1939,7 @@ static void nand_write_page_raw(struct m - * - * We need a special oob layout and handling even when ECC isn't checked. - */ --static void nand_write_page_raw_syndrome(struct mtd_info *mtd, -+static int nand_write_page_raw_syndrome(struct mtd_info *mtd, - struct nand_chip *chip, - const uint8_t *buf) - { -@@ -1967,6 +1969,8 @@ static void nand_write_page_raw_syndrome - size = mtd->oobsize - (oob - chip->oob_poi); - if (size) - chip->write_buf(mtd, oob, size); -+ -+ return 0; - } - /** - * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function -@@ -1974,7 +1978,7 @@ static void nand_write_page_raw_syndrome - * @chip: nand chip info structure - * @buf: data buffer - */ --static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, -+static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf) - { - int i, eccsize = chip->ecc.size; -@@ -1991,7 +1995,7 @@ static void nand_write_page_swecc(struct - for (i = 0; i < chip->ecc.total; i++) - chip->oob_poi[eccpos[i]] = ecc_calc[i]; - -- chip->ecc.write_page_raw(mtd, chip, buf); -+ return chip->ecc.write_page_raw(mtd, chip, buf); - } - - /** -@@ -2000,7 +2004,7 @@ static void nand_write_page_swecc(struct - * @chip: nand chip info structure - * @buf: data buffer - */ --static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, -+static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf) - { - int i, eccsize = chip->ecc.size; -@@ -2020,6 +2024,8 @@ static void nand_write_page_hwecc(struct - chip->oob_poi[eccpos[i]] = ecc_calc[i]; - - chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -+ -+ return 0; - } - - /** -@@ -2031,7 +2037,7 @@ static void nand_write_page_hwecc(struct - * The hw generator calculates the error syndrome automatically. Therefore we - * need a special oob layout and handling. - */ --static void nand_write_page_syndrome(struct mtd_info *mtd, -+static int nand_write_page_syndrome(struct mtd_info *mtd, - struct nand_chip *chip, const uint8_t *buf) - { - int i, eccsize = chip->ecc.size; -@@ -2064,6 +2070,8 @@ static void nand_write_page_syndrome(str - i = mtd->oobsize - (oob - chip->oob_poi); - if (i) - chip->write_buf(mtd, oob, i); -+ -+ return 0; - } - - /** -@@ -2083,9 +2091,12 @@ static int nand_write_page(struct mtd_in - chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); - - if (unlikely(raw)) -- chip->ecc.write_page_raw(mtd, chip, buf); -+ status = chip->ecc.write_page_raw(mtd, chip, buf); - else -- chip->ecc.write_page(mtd, chip, buf); -+ status = chip->ecc.write_page(mtd, chip, buf); -+ -+ if (status < 0) -+ return status; - - /* - * Cached progamming disabled for now. Not sure if it's worth the ---- a/include/linux/mtd/nand.h -+++ b/include/linux/mtd/nand.h -@@ -361,13 +361,13 @@ struct nand_ecc_ctrl { - uint8_t *calc_ecc); - int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int page); -- void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, -+ int (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf); - int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int page); - int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, - uint32_t offs, uint32_t len, uint8_t *buf); -- void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, -+ int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf); - int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, - int page); diff --git a/patches.at91/0077-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch b/patches.at91/0077-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch deleted file mode 100644 index bdccc954ab88..000000000000 --- a/patches.at91/0077-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 7d92178b306bf2b8020da2a5c53077885e6239f9 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Fri, 21 Sep 2012 15:49:29 +0200 -Subject: MTD: atmel_nand: revet the oob_required parameter in - ecc.read/write_page - -Only for v3.4 compatibility. Do not propagate upstream - -Signed-off-by: Nicolas Ferre ---- - drivers/mtd/nand/atmel_nand.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index 42b64fb..ec0745e 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -759,7 +759,7 @@ normal_check: - } - - static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, -- struct nand_chip *chip, uint8_t *buf, int oob_required, int page) -+ struct nand_chip *chip, uint8_t *buf, int page) - { - struct atmel_nand_host *host = chip->priv; - int eccsize = chip->ecc.size; -@@ -797,7 +797,7 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, - } - - static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, -- struct nand_chip *chip, const uint8_t *buf, int oob_required) -+ struct nand_chip *chip, const uint8_t *buf) - { - struct atmel_nand_host *host = chip->priv; - uint32_t *eccpos = chip->ecc.layout->eccpos; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0077-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch b/patches.at91/0077-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch new file mode 100644 index 000000000000..cb920de18851 --- /dev/null +++ b/patches.at91/0077-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch @@ -0,0 +1,42 @@ +From 0e4179bc4720ad2cc938df8eda49685e84be6e91 Mon Sep 17 00:00:00 2001 +From: Wei Yongjun +Date: Fri, 7 Sep 2012 14:54:25 +0800 +Subject: usb: gadget: at91_udc: move the dereference below the NULL test + +commit 162ca3ca613e02e115ec9c5273f94bd22dad0af2 upstream. + +The dereference should be moved below the NULL test. + +spatch with a semantic match is used to found this. +(http://coccinelle.lip6.fr/) + +Signed-off-by: Wei Yongjun +Signed-off-by: Felipe Balbi +--- + drivers/usb/gadget/at91_udc.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c +index 9d7bcd9..d6249f0 100644 +--- a/drivers/usb/gadget/at91_udc.c ++++ b/drivers/usb/gadget/at91_udc.c +@@ -469,7 +469,7 @@ static int at91_ep_enable(struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc) + { + struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); +- struct at91_udc *udc = ep->udc; ++ struct at91_udc *udc; + u16 maxpacket; + u32 tmp; + unsigned long flags; +@@ -484,6 +484,7 @@ static int at91_ep_enable(struct usb_ep *_ep, + return -EINVAL; + } + ++ udc = ep->udc; + if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { + DBG("bogus device state\n"); + return -ESHUTDOWN; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0078-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch b/patches.at91/0078-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch deleted file mode 100644 index 052f8ee81486..000000000000 --- a/patches.at91/0078-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch +++ /dev/null @@ -1,28 +0,0 @@ -From ddee6570ee156ed3d758fbfb0931054d77da29c5 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 24 Sep 2012 14:57:08 +0200 -Subject: MTD: atmel_nand: add 9x5 to list of SoC with DMA - -Temporary: may have to be replaced by a device-tree property. - -Signed-off-by: Nicolas Ferre ---- - drivers/mtd/nand/atmel_nand.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index ec0745e..a5c184e 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -127,7 +127,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo; - - static int cpu_has_dma(void) - { -- return cpu_is_at91sam9rl() || cpu_is_at91sam9g45(); -+ return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() || cpu_is_at91sam9x5(); - } - - /* --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0079-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch b/patches.at91/0079-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch deleted file mode 100644 index cbecb401cca4..000000000000 --- a/patches.at91/0079-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 3efc10bd73879d566ad573e6ce4419fb79d9eda0 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 24 Sep 2012 15:07:06 +0200 -Subject: MTD: atmel_nand: POI fall back is not an issue: change log - -Signed-off-by: Nicolas Ferre ---- - drivers/mtd/nand/atmel_nand.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index a5c184e..17ef011 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -281,7 +281,7 @@ err_dma: - dma_unmap_single(dma_dev->dev, phys_addr, len, dir); - err_buf: - if (err != 0) -- dev_warn(host->dev, "Fall back to CPU I/O\n"); -+ dev_dbg(host->dev, "Fall back to CPU I/O\n"); - return err; - } - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0079-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch b/patches.at91/0079-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch new file mode 100644 index 000000000000..6491324bab74 --- /dev/null +++ b/patches.at91/0079-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch @@ -0,0 +1,43 @@ +From 2b2b3800d382a683216a2e0fc6a27ba480716f2a Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Wed, 29 Aug 2012 11:49:18 +0200 +Subject: USB: ohci-at91: fix PIO handling in relation with number of ports + +commit 6fffb77c8393151b0cf8cef1b9c2ba90587dd2e8 upstream. + +If the number of ports present on the SoC/board is not the maximum +and that the platform data is not filled with all data, there is +an easy way to mess the PIO setup for this interface. +This quick fix addresses mis-configuration in USB host platform data +that is common in at91 boards since commit 0ee6d1e (USB: ohci-at91: +change maximum number of ports) that did not modified the associatd +board files. + +Reported-by: Klaus Falkner +Signed-off-by: Nicolas Ferre +Cc: Stable [3.4+] +Acked-by: Alan Stern +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/host/ohci-at91.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/usb/host/ohci-at91.c ++++ b/drivers/usb/host/ohci-at91.c +@@ -647,6 +647,16 @@ static int __devexit ohci_hcd_at91_drv_r + + if (pdata) { + at91_for_each_port(i) { ++ /* ++ * do not configure PIO if not in relation with ++ * real USB port on board ++ */ ++ if (i >= pdata->ports) { ++ pdata->vbus_pin[i] = -EINVAL; ++ pdata->overcurrent_pin[i] = -EINVAL; ++ break; ++ } ++ + if (!gpio_is_valid(pdata->vbus_pin[i])) + continue; + ohci_at91_usb_set_power(pdata, i, 0); diff --git a/patches.at91/0080-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch b/patches.at91/0080-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch deleted file mode 100644 index 0b9ce93686f3..000000000000 --- a/patches.at91/0080-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6d16ae9b0f776651f60af120bb799d77504a2703 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 8 Oct 2012 16:55:29 +0200 -Subject: MTD: atmel_nand: add 9n12 to list of SoC with DMA - -Temporary: may have to be replaced by a device-tree property. - -Signed-off-by: Nicolas Ferre ---- - drivers/mtd/nand/atmel_nand.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c -index 17ef011..b1158b4 100644 ---- a/drivers/mtd/nand/atmel_nand.c -+++ b/drivers/mtd/nand/atmel_nand.c -@@ -127,7 +127,8 @@ static struct nand_ecclayout atmel_pmecc_oobinfo; - - static int cpu_has_dma(void) - { -- return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() || cpu_is_at91sam9x5(); -+ return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() -+ || cpu_is_at91sam9x5() || cpu_is_at91sam9n12(); - } - - /* --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0080-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch b/patches.at91/0080-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch new file mode 100644 index 000000000000..32c1de151891 --- /dev/null +++ b/patches.at91/0080-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch @@ -0,0 +1,30 @@ +From 620f6b0ce1071fd027a1882a21e41143d8bb5d95 Mon Sep 17 00:00:00 2001 +From: Alexandre Pereira da Silva +Date: Tue, 26 Jun 2012 11:27:12 -0300 +Subject: usb: gadget: at91_udc: Propagate devicetree to gadget drivers + +commit 65c84ea18b1b4b8c03fb67c3bea023ed1446bd2e upstream. + +Fill dev.of_node of gadget drivers, so they can use devicetree + +Signed-off-by: Alexandre Pereira da Silva +Signed-off-by: Felipe Balbi +--- + drivers/usb/gadget/at91_udc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c +index ffb46bc..ddeaadb 100644 +--- a/drivers/usb/gadget/at91_udc.c ++++ b/drivers/usb/gadget/at91_udc.c +@@ -1650,6 +1650,7 @@ static int at91_start(struct usb_gadget_driver *driver, + + udc->driver = driver; + udc->gadget.dev.driver = &driver->driver; ++ udc->gadget.dev.of_node = udc->pdev->dev.of_node; + dev_set_drvdata(&udc->gadget.dev, &driver->driver); + udc->enabled = 1; + udc->selfpowered = 1; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0081-USB-ohci-at91.c-remove-err-usage.patch b/patches.at91/0081-USB-ohci-at91.c-remove-err-usage.patch new file mode 100644 index 000000000000..4d5cd1ca5e50 --- /dev/null +++ b/patches.at91/0081-USB-ohci-at91.c-remove-err-usage.patch @@ -0,0 +1,36 @@ +From 5f66b12556f296e2aa31268877ad5c2961a073f4 Mon Sep 17 00:00:00 2001 +From: Greg Kroah-Hartman +Date: Fri, 27 Apr 2012 11:24:39 -0700 +Subject: USB: ohci-at91.c: remove err() usage + +commit 2418d5f979fa424c401654f0f1e1d6abffecc379 upstream. + +err() was a very old USB-specific macro that I thought had +gone away. This patch removes it from being used in the +driver and uses dev_err() instead. + +CC: Alan Stern +CC: Grant Likely +CC: Rob Herring +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/host/ohci-at91.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c +index 5dfea46..aaa8d2b 100644 +--- a/drivers/usb/host/ohci-at91.c ++++ b/drivers/usb/host/ohci-at91.c +@@ -243,7 +243,8 @@ ohci_at91_start (struct usb_hcd *hcd) + int ret; + + if ((ret = ohci_run(ohci)) < 0) { +- err("can't start %s", hcd->self.bus_name); ++ dev_err(hcd->self.controller, "can't start %s\n", ++ hcd->self.bus_name); + ohci_stop(hcd); + return ret; + } +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0081-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch b/patches.at91/0081-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch deleted file mode 100644 index e0fbdeb181a8..000000000000 --- a/patches.at91/0081-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch +++ /dev/null @@ -1,392 +0,0 @@ -From 205e3ae2e153f8cd611e980d02c5ca629e726f06 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Wed, 17 Nov 2010 12:28:13 +0100 -Subject: input: atmel_tsadcc: add support for ARCH_AT91SAM9X5 - -XXX: split header creation in a new patch (or don't do it) - -Signed-off-by: Josh Wu ---- - drivers/input/touchscreen/atmel_tsadcc.c | 150 ++++++++++++---------------- - drivers/input/touchscreen/atmel_tsadcc.h | 162 +++++++++++++++++++++++++++++++ - 2 files changed, 222 insertions(+), 90 deletions(-) - create mode 100644 drivers/input/touchscreen/atmel_tsadcc.h - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index 201b2d2..a0e8d52 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -25,74 +25,9 @@ - #include - #include - --/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */ -- --#define ATMEL_TSADCC_CR 0x00 /* Control register */ --#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/ --#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */ -- --#define ATMEL_TSADCC_MR 0x04 /* Mode register */ --#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */ --#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */ --#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */ --#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ --#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ --#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ --#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ --#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ --#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ --#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */ --#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */ --#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */ -- --#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */ --#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */ --#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0) --#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0) --#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0) --#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0) --#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0) --#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0) --#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0) --#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */ -- --#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */ --#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */ --#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */ -- --#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */ --#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */ --#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */ --#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */ -- --#define ATMEL_TSADCC_SR 0x1C /* Status register */ --#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */ --#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */ --#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */ --#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */ --#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */ --#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */ --#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */ --#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */ -- --#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */ --#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */ -- --#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */ --#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */ --#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */ --#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */ --#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */ --#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */ --#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */ --#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */ --#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */ -- --#define ATMEL_TSADCC_XPOS 0x50 --#define ATMEL_TSADCC_Z1DAT 0x54 --#define ATMEL_TSADCC_Z2DAT 0x58 -- --#define PRESCALER_VAL(x) ((x) >> 8) -+#include "atmel_tsadcc.h" -+ -+#define cpu_has_9x5_adc() (cpu_is_at91sam9x5()) - - #define ADC_DEFAULT_CLOCK 100000 - -@@ -124,12 +59,17 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - - if (status & ATMEL_TSADCC_NOCNT) { - /* Contact lost */ -- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; -- -- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); -+ if (cpu_has_9x5_adc()) { -+ /* 9X5 using TSMR to set PENDBC time */ -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ATMEL_TSADCC_PENDBC; -+ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); -+ } else { -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; -+ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); -+ } - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); - atmel_tsadcc_write(ATMEL_TSADCC_IDR, -- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); -+ ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); - - input_report_key(input_dev, BTN_TOUCH, 0); -@@ -138,23 +78,31 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - - } else if (status & ATMEL_TSADCC_PENCNT) { - /* Pen detected */ -- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR); -- reg &= ~ATMEL_TSADCC_PENDBC; -+ if (cpu_has_9x5_adc()) { -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR); -+ reg &= ~ATMEL_TSADCC_PENDBC; -+ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); -+ } else { -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR); -+ reg &= ~ATMEL_TSADCC_PENDBC; -+ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); -+ } - - atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT); -- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); - atmel_tsadcc_write(ATMEL_TSADCC_IER, -- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); -+ ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, - ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16)); - -- } else if (status & ATMEL_TSADCC_EOC(3)) { -+ } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { - /* Conversion finished */ - - if (ts_dev->bufferedmeasure) { - /* Last measurement is always discarded, since it can - * be erroneous. - * Always report previous measurement */ -+ dev_dbg(&input_dev->dev, "x = %d, y = %d\n", -+ ts_dev->prev_absx, ts_dev->prev_absy); - input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); - input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); - input_report_key(input_dev, BTN_TOUCH, 1); -@@ -163,11 +111,16 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - ts_dev->bufferedmeasure = 1; - - /* Now make new measurement */ -- ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; -- ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); -- -- ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; -- ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); -+ if (cpu_has_9x5_adc()) { -+ ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; -+ ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; -+ } else { -+ ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; -+ ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); -+ -+ ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; -+ ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); -+ } - } - - return IRQ_HANDLED; -@@ -284,18 +237,35 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - - dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc); - -- reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | -- ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */ -- ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */ -- (prsc << 8) | -- ((0x26 << 16) & ATMEL_TSADCC_STARTUP) | -- ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); -+ if (cpu_has_9x5_adc()) { -+ reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ -+ (prsc << 8) | -+ ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | -+ ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); -+ } else { -+ reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | -+ ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */ -+ ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */ -+ (prsc << 8) | -+ ((0x26 << 16) & ATMEL_TSADCC_STARTUP) | -+ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); -+ } - - atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST); - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); -- atmel_tsadcc_write(ATMEL_TSADCC_TSR, -- (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); -+ -+ if (cpu_has_9x5_adc()) { -+ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, -+ ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS | -+ ATMEL_TSADCC_NOTSDMA | -+ ATMEL_TSADCC_PENDET_ENA | -+ (pdata->pendet_debounce << 28) | -+ (0x0 << 8)); -+ } else { -+ atmel_tsadcc_write(ATMEL_TSADCC_TSR, -+ (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); -+ } - - atmel_tsadcc_read(ATMEL_TSADCC_SR); - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); -diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h -new file mode 100644 -index 0000000..5918c20 ---- /dev/null -+++ b/drivers/input/touchscreen/atmel_tsadcc.h -@@ -0,0 +1,162 @@ -+/* -+ * Header file for AT91/AT32 ADC + touchscreen Controller -+ * -+ * Data structure and register user interface -+ * -+ * Copyright (C) 2010 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+#ifndef __ATMEL_TSADCC_H__ -+#define __ATMEL_TSADCC_H__ -+ -+/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */ -+#define ATMEL_TSADCC_CR 0x00 /* Control register */ -+#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/ -+#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */ -+ -+#define ATMEL_TSADCC_MR 0x04 /* Mode register */ -+#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */ -+#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */ -+#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */ -+#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ -+#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ -+#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ -+#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ -+#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ -+#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ -+#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */ -+#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */ -+#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */ -+ -+#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */ -+#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */ -+#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0) -+#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0) -+#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0) -+#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0) -+#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0) -+#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0) -+#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0) -+#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */ -+ -+#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */ -+#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */ -+#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */ -+ -+#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */ -+#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */ -+#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */ -+#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */ -+ -+#define ATMEL_TSADCC_SR 0x1C /* Status register */ -+#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */ -+#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */ -+#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */ -+#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */ -+#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */ -+#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */ -+#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */ -+#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */ -+ -+#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */ -+#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */ -+ -+#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */ -+#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */ -+#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */ -+#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */ -+#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */ -+#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */ -+#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */ -+#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */ -+#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */ -+ -+#define ATMEL_TSADCC_XPOS 0x50 -+#define ATMEL_TSADCC_Z1DAT 0x54 -+#define ATMEL_TSADCC_Z2DAT 0x58 -+ -+#define ATMEL_TSADCC_CONVERSION_END (ATMEL_TSADCC_EOC(3)) -+ -+/* Register definitions based on AT91SAM9X5 preliminary draft datasheet */ -+#define ATMEL_TSADCC_TRACKTIM (0x0f << 24) /* Tracking Time */ -+ -+#define ATMEL_TSADCC_ISR 0x30 /* Interrupt Status register */ -+#define ATMEL_TSADCC_XRDY (1 << 20) /* Measure XPOS Ready */ -+#define ATMEL_TSADCC_YRDY (1 << 21) /* Measure YPOS Ready */ -+#define ATMEL_TSADCC_PRDY (1 << 22) /* Measure Pressure Ready */ -+#define ATMEL_TSADCC_COMPE (1 << 26) /* Comparison Event */ -+#define ATMEL_TSADCC_PEN (1 << 29) /* Pen Contact */ -+#define ATMEL_TSADCC_NOPEN (1 << 30) /* No Pen Contact */ -+#define ATMEL_TSADCC_PENDET_STATUS (1 << 31) /* Pen Detect Status (not interrupt source) */ -+ -+#define ATMEL_TSADCC_TSMR 0xb0 -+#define ATMEL_TSADCC_TSMODE (3 << 0) /* Touch Screen Mode */ -+#define ATMEL_TSADCC_TSMODE_NO (0 << 0) /* No Touch Screen */ -+#define ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS (1 << 0) /* 4-wire Touch Screen without pressure measurement */ -+#define ATMEL_TSADCC_TSMODE_4WIRE_PRESS (2 << 0) /* 4-wire Touch Screen with pressure measurement */ -+#define ATMEL_TSADCC_TSMODE_5WIRE (3 << 0) /* 5-wire Touch Screen */ -+#define ATMEL_TSADCC_TSAV (3 << 4) /* Touch Screen Average */ -+#define ATMEL_TSADCC_TSAV_1 (0 << 4) /* No filtering. Only one conversion ADC per measure */ -+#define ATMEL_TSADCC_TSAV_2 (1 << 4) /* Averages 2 ADC conversions */ -+#define ATMEL_TSADCC_TSAV_4 (2 << 4) /* Averages 4 ADC conversions */ -+#define ATMEL_TSADCC_TSAV_8 (3 << 4) /* Averages 8 ADC conversions */ -+#define ATMEL_TSADCC_TSSCTIM (0x0f << 16) /* Touch Screen switches closure time */ -+ -+#define ATMEL_TSADCC_NOTSDMA (1 << 22) /* No Touchscreen DMA */ -+#define ATMEL_TSADCC_PENDET_DIS (0 << 24) /* Pen contact detection disable */ -+#define ATMEL_TSADCC_PENDET_ENA (1 << 24) /* Pen contact detection enable */ -+ -+#define ATMEL_TSADCC_XPOSR 0xb4 -+#define ATMEL_TSADCC_XSCALE (0x3ff << 16) /* Scale of X Position */ -+ -+#define ATMEL_TSADCC_YPOSR 0xb8 -+#define ATMEL_TSADCC_YPOS (0x3ff << 0) /* Y Position */ -+#define ATMEL_TSADCC_YSCALE (0x3ff << 16) /* Scale of Y Position */ -+ -+/* 9x5 ADC registers which conflict with previous definition */ -+#ifdef CONFIG_ARCH_AT91SAM9X5 -+#undef ATMEL_TSADCC_TRGR -+#undef ATMEL_TSADCC_SR -+#define ATMEL_TSADCC_SR ATMEL_TSADCC_ISR -+#define ATMEL_TSADCC_TRGR 0xc0 -+ -+/* For code compatiable, redefine with 9x5 value */ -+#undef ATMEL_TSADCC_STARTUP -+#define ATMEL_TSADCC_STARTUP (0x0f << 16) /* Startup Time */ -+#undef ATMEL_TSADCC_DRDY -+#define ATMEL_TSADCC_DRDY (1 << 24) /* Data Ready */ -+#undef ATMEL_TSADCC_GOVRE -+#define ATMEL_TSADCC_GOVRE (1 << 25) /* General Overrun */ -+#undef ATMEL_TSADCC_TSFREQ -+#define ATMEL_TSADCC_TSFREQ (0x0f << 8) /* Touch Screen Frequency */ -+#undef ATMEL_TSADCC_PENDET -+#define ATMEL_TSADCC_PENDET (1 << 24) /* Pen Contact Detection Enable */ -+#undef ATMEL_TSADCC_XPOS -+#define ATMEL_TSADCC_XPOS (0x3ff << 0) /* X Position */ -+ -+#undef ATMEL_TSADCC_NOCNT -+#define ATMEL_TSADCC_NOCNT ATMEL_TSADCC_NOPEN -+#undef ATMEL_TSADCC_PENCNT -+#define ATMEL_TSADCC_PENCNT ATMEL_TSADCC_PEN -+#undef ATMEL_TSADCC_CONVERSION_END -+#define ATMEL_TSADCC_CONVERSION_END (ATMEL_TSADCC_XRDY | ATMEL_TSADCC_YRDY | ATMEL_TSADCC_PRDY) -+ -+#endif -+ -+/* Retrieve prescaler value */ -+#define PRESCALER_VAL(x) ((x) >> 8) -+ -+#endif /* __ATMEL_TSADCC_H__ */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0082-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch b/patches.at91/0082-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch deleted file mode 100644 index c9e593440224..000000000000 --- a/patches.at91/0082-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch +++ /dev/null @@ -1,104 +0,0 @@ -From f924876dcc5572639dbb81e2e148cc84066f9571 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Wed, 17 Nov 2010 13:12:11 +0100 -Subject: input: atmel_tsadcc: add touch screen pressure measurement - -Signed-off-by: Josh Wu ---- - drivers/input/touchscreen/atmel_tsadcc.c | 26 +++++++++++++++++++++++--- - drivers/input/touchscreen/atmel_tsadcc.h | 4 ++++ - 2 files changed, 27 insertions(+), 3 deletions(-) - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index a0e8d52..b6a1630 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -38,6 +38,7 @@ struct atmel_tsadcc { - int irq; - unsigned int prev_absx; - unsigned int prev_absy; -+ unsigned int prev_absz; - unsigned char bufferedmeasure; - }; - -@@ -53,6 +54,9 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - - unsigned int status; - unsigned int reg; -+ unsigned int z1, z2; -+ unsigned int Rxp = 1; -+ unsigned int factor = 1000; - - status = atmel_tsadcc_read(ATMEL_TSADCC_SR); - status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR); -@@ -101,11 +105,15 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - /* Last measurement is always discarded, since it can - * be erroneous. - * Always report previous measurement */ -- dev_dbg(&input_dev->dev, "x = %d, y = %d\n", -- ts_dev->prev_absx, ts_dev->prev_absy); -+ dev_dbg(&input_dev->dev, -+ "x = %d, y = %d, pressure = %d\n", -+ ts_dev->prev_absx, ts_dev->prev_absy, -+ ts_dev->prev_absz); - input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); - input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); - input_report_key(input_dev, BTN_TOUCH, 1); -+ if (cpu_has_9x5_adc()) -+ input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); - input_sync(input_dev); - } else - ts_dev->bufferedmeasure = 1; -@@ -114,6 +122,17 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - if (cpu_has_9x5_adc()) { - ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; - ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; -+ -+ /* calculate the pressure */ -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_PRESSR); -+ z1 = reg & ATMEL_TSADCC_PRESSR_Z1; -+ z2 = (reg & ATMEL_TSADCC_PRESSR_Z2) >> 16; -+ -+ if (z1 != 0) -+ ts_dev->prev_absz = Rxp * (ts_dev->prev_absx * factor / 1024) * (z2 * factor / z1 - factor) / factor; -+ else -+ ts_dev->prev_absz = 0; -+ - } else { - ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; - ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); -@@ -209,6 +228,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - __set_bit(EV_ABS, input_dev->evbit); - input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0); - input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0); -+ input_set_abs_params(input_dev, ABS_PRESSURE, 0, 0xffffff, 0, 0); - - input_set_capability(input_dev, EV_KEY, BTN_TOUCH); - -@@ -257,7 +277,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - - if (cpu_has_9x5_adc()) { - atmel_tsadcc_write(ATMEL_TSADCC_TSMR, -- ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS | -+ ATMEL_TSADCC_TSMODE_4WIRE_PRESS | - ATMEL_TSADCC_NOTSDMA | - ATMEL_TSADCC_PENDET_ENA | - (pdata->pendet_debounce << 28) | -diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h -index 5918c20..231497e 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.h -+++ b/drivers/input/touchscreen/atmel_tsadcc.h -@@ -126,6 +126,10 @@ - #define ATMEL_TSADCC_YPOS (0x3ff << 0) /* Y Position */ - #define ATMEL_TSADCC_YSCALE (0x3ff << 16) /* Scale of Y Position */ - -+#define ATMEL_TSADCC_PRESSR 0xbc /* Touchscreen Pressure Register */ -+#define ATMEL_TSADCC_PRESSR_Z1 (0x3ff << 0) /* Data of Z1 Measurement */ -+#define ATMEL_TSADCC_PRESSR_Z2 (0x3ff << 16) /* Data of Z2 Measurement */ -+ - /* 9x5 ADC registers which conflict with previous definition */ - #ifdef CONFIG_ARCH_AT91SAM9X5 - #undef ATMEL_TSADCC_TRGR --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0083-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch b/patches.at91/0083-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch new file mode 100644 index 000000000000..a4dcade123ec --- /dev/null +++ b/patches.at91/0083-MTD-atmel_nand-revet-the-oob_required-parameter-in-e.patch @@ -0,0 +1,38 @@ +From 736d87b6261c8fee4399f3d2605609fd97b43f5e Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Fri, 21 Sep 2012 15:49:29 +0200 +Subject: MTD: atmel_nand: revet the oob_required parameter in + ecc.read/write_page + +Only for v3.4 compatibility. Do not propagate upstream + +Signed-off-by: Nicolas Ferre +--- + drivers/mtd/nand/atmel_nand.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index c512bba..b5e5a76 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -759,7 +759,7 @@ normal_check: + } + + static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, +- struct nand_chip *chip, uint8_t *buf, int oob_required, int page) ++ struct nand_chip *chip, uint8_t *buf, int page) + { + struct atmel_nand_host *host = chip->priv; + int eccsize = chip->ecc.size; +@@ -797,7 +797,7 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, + } + + static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, +- struct nand_chip *chip, const uint8_t *buf, int oob_required) ++ struct nand_chip *chip, const uint8_t *buf) + { + struct atmel_nand_host *host = chip->priv; + uint32_t *eccpos = chip->ecc.layout->eccpos; +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0083-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch b/patches.at91/0083-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch deleted file mode 100644 index f368baf433b5..000000000000 --- a/patches.at91/0083-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch +++ /dev/null @@ -1,77 +0,0 @@ -From c331326e3dcab10a8930f9f685bec700ec0d604a Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Tue, 5 Apr 2011 17:30:03 +0200 -Subject: input: atmel_tsadcc: enable touchscreen averaging and add fast wake - up - -Enable the touchscreen average to improve the resulting events. For this -to work the trigger period needs to be reduced. - -This puts a field into at91_tsadcc_data to allow platforms to specify -the number of conversions to average over. - -XXX: should the trigger period passed by the platform, too, as this -depends on the number of conversions? -XXX: seperate fast wake up into a seperate patch? What does it? -XXX: don't use bare constants - -Signed-off-by: Ludovic Desroches ---- - drivers/input/touchscreen/atmel_tsadcc.c | 14 ++++++++------ - drivers/input/touchscreen/atmel_tsadcc.h | 1 + - 2 files changed, 9 insertions(+), 6 deletions(-) - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index b6a1630..48faecb 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -96,7 +96,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - atmel_tsadcc_write(ATMEL_TSADCC_IER, - ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, -- ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16)); -+ ATMEL_TSADCC_TRGMOD_PERIOD | (0x00D0 << 16)); - - } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { - /* Conversion finished */ -@@ -259,6 +259,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - - if (cpu_has_9x5_adc()) { - reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ -+ ((0x01 << 6) & ATMEL_TSADCC_FWUP) | /* Fast Wake Up */ - (prsc << 8) | - ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | - ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); -@@ -277,11 +278,12 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - - if (cpu_has_9x5_adc()) { - atmel_tsadcc_write(ATMEL_TSADCC_TSMR, -- ATMEL_TSADCC_TSMODE_4WIRE_PRESS | -- ATMEL_TSADCC_NOTSDMA | -- ATMEL_TSADCC_PENDET_ENA | -- (pdata->pendet_debounce << 28) | -- (0x0 << 8)); -+ ATMEL_TSADCC_TSMODE_4WIRE_PRESS | -+ (pdata->filtering_average << 4) | /* Touchscreen average */ -+ ATMEL_TSADCC_NOTSDMA | -+ ATMEL_TSADCC_PENDET_ENA | -+ (pdata->pendet_debounce << 28) | -+ (0x3 << 8)); /* Touchscreen freq */ - } else { - atmel_tsadcc_write(ATMEL_TSADCC_TSR, - (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); -diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h -index 231497e..572770a 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.h -+++ b/drivers/input/touchscreen/atmel_tsadcc.h -@@ -34,6 +34,7 @@ - #define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ - #define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ - #define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ -+#define ATMEL_TSADCC_FWUP (1 << 6) /* Fast Wake Up selection (5series) */ - #define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ - #define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ - #define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0084-USB-Kconfig-add-Atmel-usba-driver-entry.patch b/patches.at91/0084-USB-Kconfig-add-Atmel-usba-driver-entry.patch new file mode 100644 index 000000000000..e1d6f03d84cc --- /dev/null +++ b/patches.at91/0084-USB-Kconfig-add-Atmel-usba-driver-entry.patch @@ -0,0 +1,29 @@ +From b0b4d9808e0c71070375befa5b06707eb91c3a2a Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Tue, 19 Jun 2012 13:14:10 +0200 +Subject: USB: Kconfig: add Atmel usba driver entry + +Allow the USBA entry to be selected for every AT91 SoC. +Will allow to select driver for newer SoCs. + +Signed-off-by: Nicolas Ferre +--- + drivers/usb/gadget/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig +index 2633f75..10fea8b 100644 +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -150,7 +150,7 @@ config USB_AT91 + config USB_ATMEL_USBA + tristate "Atmel USBA" + select USB_GADGET_DUALSPEED +- depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 ++ depends on AVR32 || ARCH_AT91 + help + USBA is the integrated high-speed USB Device controller on + the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel. +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0084-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch b/patches.at91/0084-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch deleted file mode 100644 index 82ce0dbcb7ee..000000000000 --- a/patches.at91/0084-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch +++ /dev/null @@ -1,92 +0,0 @@ -From bb2bbaa1312891063aed730f0fd3eeddf77f95cb Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Fri, 6 May 2011 17:54:45 +0200 -Subject: input: atmel_tsadcc: add ACR register and change trigger period value - -Add ACR register which allows to configure internal ADC resistor, that should -prevent from adding resistor on display module. Furthermore increase -trigger period which seems to be related with resistor value. A Too small -value causes continuous irq. - -Signed-off-by: Ludovic Desroches ---- - drivers/input/touchscreen/atmel_tsadcc.c | 30 +++++++++++++++++++++++++++++- - drivers/input/touchscreen/atmel_tsadcc.h | 3 +++ - 2 files changed, 32 insertions(+), 1 deletion(-) - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index 48faecb..20154ba 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -47,6 +47,17 @@ static void __iomem *tsc_base; - #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg)) - #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg)) - -+static void atmel_tsadcc_dump_conf(struct platform_device *pdev) -+{ -+ dev_info(&pdev->dev, "--- configuration ---\n"); -+ dev_info(&pdev->dev, "Mode Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_MR)); -+ dev_info(&pdev->dev, "Trigger Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_TRGR)); -+ dev_info(&pdev->dev, "Touchscreen Mode Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_TSMR)); -+ dev_info(&pdev->dev, "Analog Control Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_ACR)); -+ dev_info(&pdev->dev, "ADC Channel Status Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_CHSR)); -+ dev_info(&pdev->dev, "---------------------\n"); -+} -+ - static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - { - struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; -@@ -95,8 +106,14 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT); - atmel_tsadcc_write(ATMEL_TSADCC_IER, - ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); -+ /* this value is related to the resistor bits value of -+ * ACR register and R64. If internal resistor value is -+ * increased then this value has to be increased. This -+ * behavior seems to happen only with averaging on 8 -+ * values -+ */ - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, -- ATMEL_TSADCC_TRGMOD_PERIOD | (0x00D0 << 16)); -+ ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FF << 16)); - - } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { - /* Conversion finished */ -@@ -289,9 +306,20 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); - } - -+ /* Change adc internal resistor value for better pen detection, -+ * default value is 100 kOhm. -+ * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm -+ * option only available on ES2 and higher -+ */ -+ if (cpu_has_9x5_adc()) { -+ atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); -+ } -+ - atmel_tsadcc_read(ATMEL_TSADCC_SR); - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); - -+ /* atmel_tsadcc_dump_conf(pdev); */ -+ - /* All went ok, so register to the input system */ - err = input_register_device(input_dev); - if (err) -diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h -index 572770a..fe74506 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.h -+++ b/drivers/input/touchscreen/atmel_tsadcc.h -@@ -103,6 +103,9 @@ - #define ATMEL_TSADCC_NOPEN (1 << 30) /* No Pen Contact */ - #define ATMEL_TSADCC_PENDET_STATUS (1 << 31) /* Pen Detect Status (not interrupt source) */ - -+#define ATMEL_TSADCC_ACR 0x94 /* Analog Control Register */ -+#define ATMEL_TSADCC_PENDET_SENSITIVITY (0x3 << 0) /* ADC internal resistor */ -+ - #define ATMEL_TSADCC_TSMR 0xb0 - #define ATMEL_TSADCC_TSMODE (3 << 0) /* Touch Screen Mode */ - #define ATMEL_TSADCC_TSMODE_NO (0 << 0) /* No Touch Screen */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0085-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch b/patches.at91/0085-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch deleted file mode 100644 index a42080f6c462..000000000000 --- a/patches.at91/0085-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch +++ /dev/null @@ -1,168 +0,0 @@ -From dd05003395a5ae175e64b5ae8d78f6867d5d7398 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 16 Jun 2011 19:24:04 +0200 -Subject: AT91/input: atmel_tsadcc: rework irq infrastructure and parameters - -Signed-off-by: Nicolas Ferre ---- - drivers/input/touchscreen/atmel_tsadcc.c | 70 ++++++++++++++++++-------------- - 1 file changed, 40 insertions(+), 30 deletions(-) - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index 20154ba..397d17a 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -30,6 +30,7 @@ - #define cpu_has_9x5_adc() (cpu_is_at91sam9x5()) - - #define ADC_DEFAULT_CLOCK 100000 -+#define ZTHRESHOLD 3200 - - struct atmel_tsadcc { - struct input_dev *input; -@@ -39,7 +40,6 @@ struct atmel_tsadcc { - unsigned int prev_absx; - unsigned int prev_absy; - unsigned int prev_absz; -- unsigned char bufferedmeasure; - }; - - static void __iomem *tsc_base; -@@ -62,6 +62,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - { - struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; - struct input_dev *input_dev = ts_dev->input; -+ struct at91_tsadcc_data *pdata = input_dev->dev.parent->platform_data; - - unsigned int status; - unsigned int reg; -@@ -76,7 +77,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - /* Contact lost */ - if (cpu_has_9x5_adc()) { - /* 9X5 using TSMR to set PENDBC time */ -- reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ATMEL_TSADCC_PENDBC; -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); - atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); - } else { - reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; -@@ -88,7 +89,6 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); - - input_report_key(input_dev, BTN_TOUCH, 0); -- ts_dev->bufferedmeasure = 0; - input_sync(input_dev); - - } else if (status & ATMEL_TSADCC_PENCNT) { -@@ -118,27 +118,20 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { - /* Conversion finished */ - -- if (ts_dev->bufferedmeasure) { -- /* Last measurement is always discarded, since it can -- * be erroneous. -- * Always report previous measurement */ -- dev_dbg(&input_dev->dev, -- "x = %d, y = %d, pressure = %d\n", -- ts_dev->prev_absx, ts_dev->prev_absy, -- ts_dev->prev_absz); -- input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); -- input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); -- input_report_key(input_dev, BTN_TOUCH, 1); -- if (cpu_has_9x5_adc()) -- input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); -- input_sync(input_dev); -- } else -- ts_dev->bufferedmeasure = 1; -- -- /* Now make new measurement */ -+ /* make new measurement */ - if (cpu_has_9x5_adc()) { -- ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; -- ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; -+ unsigned int xscale, yscale; -+ -+ /* calculate position */ -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR); -+ ts_dev->prev_absx = (reg & ATMEL_TSADCC_XPOS) << 10; -+ xscale = (reg & ATMEL_TSADCC_XSCALE) >> 16; -+ ts_dev->prev_absx /= xscale ? xscale: 1; -+ -+ reg = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR); -+ ts_dev->prev_absy = (reg & ATMEL_TSADCC_YPOS) << 10; -+ yscale = (reg & ATMEL_TSADCC_YSCALE) >> 16; -+ ts_dev->prev_absy /= yscale ? yscale: 1 << 10; - - /* calculate the pressure */ - reg = atmel_tsadcc_read(ATMEL_TSADCC_PRESSR); -@@ -157,6 +150,23 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; - ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); - } -+ -+ /* report measurement to input layer */ -+ if (ts_dev->prev_absz < ZTHRESHOLD) { -+ dev_dbg(&input_dev->dev, -+ "x = %d, y = %d, pressure = %d\n", -+ ts_dev->prev_absx, ts_dev->prev_absy, -+ ts_dev->prev_absz); -+ input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); -+ input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); -+ if (cpu_has_9x5_adc()) -+ input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); -+ input_report_key(input_dev, BTN_TOUCH, 1); -+ input_sync(input_dev); -+ } else { -+ dev_dbg(&input_dev->dev, -+ "pressure too low: not reporting\n"); -+ } - } - - return IRQ_HANDLED; -@@ -233,7 +243,6 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - } - - ts_dev->input = input_dev; -- ts_dev->bufferedmeasure = 0; - - snprintf(ts_dev->phys, sizeof(ts_dev->phys), - "%s/input0", dev_name(&pdev->dev)); -@@ -275,10 +284,10 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc); - - if (cpu_has_9x5_adc()) { -- reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ -- ((0x01 << 6) & ATMEL_TSADCC_FWUP) | /* Fast Wake Up */ -+ reg = ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* no Sleep Mode */ -+ ((0x00 << 6) & ATMEL_TSADCC_FWUP) | /* no Fast Wake Up needed */ - (prsc << 8) | -- ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | -+ ((0x4 << 16) & ATMEL_TSADCC_STARTUP) | - ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); - } else { - reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | -@@ -296,10 +305,10 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - if (cpu_has_9x5_adc()) { - atmel_tsadcc_write(ATMEL_TSADCC_TSMR, - ATMEL_TSADCC_TSMODE_4WIRE_PRESS | -- (pdata->filtering_average << 4) | /* Touchscreen average */ -+ ((pdata->filtering_average << 4) & ATMEL_TSADCC_TSAV) | /* Touchscreen average */ - ATMEL_TSADCC_NOTSDMA | - ATMEL_TSADCC_PENDET_ENA | -- (pdata->pendet_debounce << 28) | -+ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC) | - (0x3 << 8)); /* Touchscreen freq */ - } else { - atmel_tsadcc_write(ATMEL_TSADCC_TSR, -@@ -312,7 +321,8 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - * option only available on ES2 and higher - */ - if (cpu_has_9x5_adc()) { -- atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); -+ if (pdata->pendet_sensitivity <= ATMEL_TSADCC_PENDET_SENSITIVITY) -+ atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); - } - - atmel_tsadcc_read(ATMEL_TSADCC_SR); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0085-pinctrl-core-device-tree-mapping-table-parsing-suppo.patch b/patches.at91/0085-pinctrl-core-device-tree-mapping-table-parsing-suppo.patch new file mode 100644 index 000000000000..3227d8fc67b5 --- /dev/null +++ b/patches.at91/0085-pinctrl-core-device-tree-mapping-table-parsing-suppo.patch @@ -0,0 +1,539 @@ +From 76cbb89fa9ac0f8a422bdd44f6deb0dd3566c960 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Fri, 23 Mar 2012 10:29:46 -0600 +Subject: pinctrl: core device tree mapping table parsing support + +commit 57291ce295c0aca738dd284c4a9c591c09ebee71 upstream. + +During pinctrl_get(), if the client device has a device tree node, look +for the common pinctrl properties there. If found, parse the referenced +device tree nodes, with the help of the pinctrl drivers, and generate +mapping table entries from them. + +During pinctrl_put(), free any results of device tree parsing. + +Acked-by: Dong Aisheng +Signed-off-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/core.c | 72 +++++++++--- + drivers/pinctrl/core.h | 11 +- + drivers/pinctrl/devicetree.c | 249 ++++++++++++++++++++++++++++++++++++++++ + drivers/pinctrl/devicetree.h | 35 ++++++ + include/linux/pinctrl/pinctrl.h | 7 ++ + 6 files changed, 357 insertions(+), 18 deletions(-) + create mode 100644 drivers/pinctrl/devicetree.c + create mode 100644 drivers/pinctrl/devicetree.h + +diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile +index 6d4150b..049c9fb 100644 +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -5,6 +5,7 @@ ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG + obj-$(CONFIG_PINCTRL) += core.o + obj-$(CONFIG_PINMUX) += pinmux.o + obj-$(CONFIG_PINCONF) += pinconf.o ++obj-$(CONFIG_OF) += devicetree.o + obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o + obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o + obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index df6296c..832f71d 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -26,6 +26,7 @@ + #include + #include + #include "core.h" ++#include "devicetree.h" + #include "pinmux.h" + #include "pinconf.h" + +@@ -45,7 +46,7 @@ struct pinctrl_maps { + DEFINE_MUTEX(pinctrl_mutex); + + /* Global list of pin control devices (struct pinctrl_dev) */ +-static LIST_HEAD(pinctrldev_list); ++LIST_HEAD(pinctrldev_list); + + /* List of pin controller handles (struct pinctrl) */ + static LIST_HEAD(pinctrl_list); +@@ -579,6 +580,13 @@ static struct pinctrl *create_pinctrl(struct device *dev) + } + p->dev = dev; + INIT_LIST_HEAD(&p->states); ++ INIT_LIST_HEAD(&p->dt_maps); ++ ++ ret = pinctrl_dt_to_map(p); ++ if (ret < 0) { ++ kfree(p); ++ return ERR_PTR(ret); ++ } + + devname = dev_name(dev); + +@@ -662,6 +670,8 @@ static void pinctrl_put_locked(struct pinctrl *p, bool inlist) + kfree(state); + } + ++ pinctrl_dt_free_maps(p); ++ + if (inlist) + list_del(&p->node); + kfree(p); +@@ -787,15 +797,8 @@ int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) + } + EXPORT_SYMBOL_GPL(pinctrl_select_state); + +-/** +- * pinctrl_register_mappings() - register a set of pin controller mappings +- * @maps: the pincontrol mappings table to register. This should probably be +- * marked with __initdata so it can be discarded after boot. This +- * function will perform a shallow copy for the mapping entries. +- * @num_maps: the number of maps in the mapping table +- */ +-int pinctrl_register_mappings(struct pinctrl_map const *maps, +- unsigned num_maps) ++int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, ++ bool dup, bool locked) + { + int i, ret; + struct pinctrl_maps *maps_node; +@@ -851,20 +854,52 @@ int pinctrl_register_mappings(struct pinctrl_map const *maps, + } + + maps_node->num_maps = num_maps; +- maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, GFP_KERNEL); +- if (!maps_node->maps) { +- pr_err("failed to duplicate mapping table\n"); +- kfree(maps_node); +- return -ENOMEM; ++ if (dup) { ++ maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, ++ GFP_KERNEL); ++ if (!maps_node->maps) { ++ pr_err("failed to duplicate mapping table\n"); ++ kfree(maps_node); ++ return -ENOMEM; ++ } ++ } else { ++ maps_node->maps = maps; + } + +- mutex_lock(&pinctrl_mutex); ++ if (!locked) ++ mutex_lock(&pinctrl_mutex); + list_add_tail(&maps_node->node, &pinctrl_maps); +- mutex_unlock(&pinctrl_mutex); ++ if (!locked) ++ mutex_unlock(&pinctrl_mutex); + + return 0; + } + ++/** ++ * pinctrl_register_mappings() - register a set of pin controller mappings ++ * @maps: the pincontrol mappings table to register. This should probably be ++ * marked with __initdata so it can be discarded after boot. This ++ * function will perform a shallow copy for the mapping entries. ++ * @num_maps: the number of maps in the mapping table ++ */ ++int pinctrl_register_mappings(struct pinctrl_map const *maps, ++ unsigned num_maps) ++{ ++ return pinctrl_register_map(maps, num_maps, true, false); ++} ++ ++void pinctrl_unregister_map(struct pinctrl_map const *map) ++{ ++ struct pinctrl_maps *maps_node; ++ ++ list_for_each_entry(maps_node, &pinctrl_maps, node) { ++ if (maps_node->maps == map) { ++ list_del(&maps_node->node); ++ return; ++ } ++ } ++} ++ + #ifdef CONFIG_DEBUG_FS + + static int pinctrl_pins_show(struct seq_file *s, void *what) +@@ -1231,6 +1266,9 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev) + !ops->get_group_pins) + return -EINVAL; + ++ if (ops->dt_node_to_map && !ops->dt_free_map) ++ return -EINVAL; ++ + return 0; + } + +diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h +index 17ecf65..98ae808 100644 +--- a/drivers/pinctrl/core.h ++++ b/drivers/pinctrl/core.h +@@ -52,12 +52,15 @@ struct pinctrl_dev { + * @dev: the device using this pin control handle + * @states: a list of states for this device + * @state: the current state ++ * @dt_maps: the mapping table chunks dynamically parsed from device tree for ++ * this device, if any + */ + struct pinctrl { + struct list_head node; + struct device *dev; + struct list_head states; + struct pinctrl_state *state; ++ struct list_head dt_maps; + }; + + /** +@@ -100,7 +103,8 @@ struct pinctrl_setting_configs { + * struct pinctrl_setting - an individual mux or config setting + * @node: list node for struct pinctrl_settings's @settings field + * @type: the type of setting +- * @pctldev: pin control device handling to be programmed ++ * @pctldev: pin control device handling to be programmed. Not used for ++ * PIN_MAP_TYPE_DUMMY_STATE. + * @data: Data specific to the setting type + */ + struct pinctrl_setting { +@@ -153,4 +157,9 @@ static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, + return radix_tree_lookup(&pctldev->pin_desc_tree, pin); + } + ++int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, ++ bool dup, bool locked); ++void pinctrl_unregister_map(struct pinctrl_map const *map); ++ + extern struct mutex pinctrl_mutex; ++extern struct list_head pinctrldev_list; +diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c +new file mode 100644 +index 0000000..5ef2feb +--- /dev/null ++++ b/drivers/pinctrl/devicetree.c +@@ -0,0 +1,249 @@ ++/* ++ * Device tree integration for the pin control subsystem ++ * ++ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "core.h" ++#include "devicetree.h" ++ ++/** ++ * struct pinctrl_dt_map - mapping table chunk parsed from device tree ++ * @node: list node for struct pinctrl's @dt_maps field ++ * @pctldev: the pin controller that allocated this struct, and will free it ++ * @maps: the mapping table entries ++ */ ++struct pinctrl_dt_map { ++ struct list_head node; ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_map *map; ++ unsigned num_maps; ++}; ++ ++static void dt_free_map(struct pinctrl_dev *pctldev, ++ struct pinctrl_map *map, unsigned num_maps) ++{ ++ if (pctldev) { ++ struct pinctrl_ops *ops = pctldev->desc->pctlops; ++ ops->dt_free_map(pctldev, map, num_maps); ++ } else { ++ /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */ ++ kfree(map); ++ } ++} ++ ++void pinctrl_dt_free_maps(struct pinctrl *p) ++{ ++ struct pinctrl_dt_map *dt_map, *n1; ++ ++ list_for_each_entry_safe(dt_map, n1, &p->dt_maps, node) { ++ pinctrl_unregister_map(dt_map->map); ++ list_del(&dt_map->node); ++ dt_free_map(dt_map->pctldev, dt_map->map, ++ dt_map->num_maps); ++ kfree(dt_map); ++ } ++ ++ of_node_put(p->dev->of_node); ++} ++ ++static int dt_remember_or_free_map(struct pinctrl *p, const char *statename, ++ struct pinctrl_dev *pctldev, ++ struct pinctrl_map *map, unsigned num_maps) ++{ ++ int i; ++ struct pinctrl_dt_map *dt_map; ++ ++ /* Initialize common mapping table entry fields */ ++ for (i = 0; i < num_maps; i++) { ++ map[i].dev_name = dev_name(p->dev); ++ map[i].name = statename; ++ if (pctldev) ++ map[i].ctrl_dev_name = dev_name(pctldev->dev); ++ } ++ ++ /* Remember the converted mapping table entries */ ++ dt_map = kzalloc(sizeof(*dt_map), GFP_KERNEL); ++ if (!dt_map) { ++ dev_err(p->dev, "failed to alloc struct pinctrl_dt_map\n"); ++ dt_free_map(pctldev, map, num_maps); ++ return -ENOMEM; ++ } ++ ++ dt_map->pctldev = pctldev; ++ dt_map->map = map; ++ dt_map->num_maps = num_maps; ++ list_add_tail(&dt_map->node, &p->dt_maps); ++ ++ return pinctrl_register_map(map, num_maps, false, true); ++} ++ ++static struct pinctrl_dev *find_pinctrl_by_of_node(struct device_node *np) ++{ ++ struct pinctrl_dev *pctldev; ++ ++ list_for_each_entry(pctldev, &pinctrldev_list, node) ++ if (pctldev->dev->of_node == np) ++ return pctldev; ++ ++ return NULL; ++} ++ ++static int dt_to_map_one_config(struct pinctrl *p, const char *statename, ++ struct device_node *np_config) ++{ ++ struct device_node *np_pctldev; ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_ops *ops; ++ int ret; ++ struct pinctrl_map *map; ++ unsigned num_maps; ++ ++ /* Find the pin controller containing np_config */ ++ np_pctldev = of_node_get(np_config); ++ for (;;) { ++ np_pctldev = of_get_next_parent(np_pctldev); ++ if (!np_pctldev || of_node_is_root(np_pctldev)) { ++ dev_err(p->dev, "could not find pctldev for node %s\n", ++ np_config->full_name); ++ of_node_put(np_pctldev); ++ /* FIXME: This should trigger deferrered probe */ ++ return -ENODEV; ++ } ++ pctldev = find_pinctrl_by_of_node(np_pctldev); ++ if (pctldev) ++ break; ++ } ++ of_node_put(np_pctldev); ++ ++ /* ++ * Call pinctrl driver to parse device tree node, and ++ * generate mapping table entries ++ */ ++ ops = pctldev->desc->pctlops; ++ if (!ops->dt_node_to_map) { ++ dev_err(p->dev, "pctldev %s doesn't support DT\n", ++ dev_name(pctldev->dev)); ++ return -ENODEV; ++ } ++ ret = ops->dt_node_to_map(pctldev, np_config, &map, &num_maps); ++ if (ret < 0) ++ return ret; ++ ++ /* Stash the mapping table chunk away for later use */ ++ return dt_remember_or_free_map(p, statename, pctldev, map, num_maps); ++} ++ ++static int dt_remember_dummy_state(struct pinctrl *p, const char *statename) ++{ ++ struct pinctrl_map *map; ++ ++ map = kzalloc(sizeof(*map), GFP_KERNEL); ++ if (!map) { ++ dev_err(p->dev, "failed to alloc struct pinctrl_map\n"); ++ return -ENOMEM; ++ } ++ ++ /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */ ++ map->type = PIN_MAP_TYPE_DUMMY_STATE; ++ ++ return dt_remember_or_free_map(p, statename, NULL, map, 1); ++} ++ ++int pinctrl_dt_to_map(struct pinctrl *p) ++{ ++ struct device_node *np = p->dev->of_node; ++ int state, ret; ++ char *propname; ++ struct property *prop; ++ const char *statename; ++ const __be32 *list; ++ int size, config; ++ phandle phandle; ++ struct device_node *np_config; ++ ++ /* CONFIG_OF enabled, p->dev not instantiated from DT */ ++ if (!np) { ++ dev_dbg(p->dev, "no of_node; not parsing pinctrl DT\n"); ++ return 0; ++ } ++ ++ /* We may store pointers to property names within the node */ ++ of_node_get(np); ++ ++ /* For each defined state ID */ ++ for (state = 0; ; state++) { ++ /* Retrieve the pinctrl-* property */ ++ propname = kasprintf(GFP_KERNEL, "pinctrl-%d", state); ++ prop = of_find_property(np, propname, &size); ++ kfree(propname); ++ if (!prop) ++ break; ++ list = prop->value; ++ size /= sizeof(*list); ++ ++ /* Determine whether pinctrl-names property names the state */ ++ ret = of_property_read_string_index(np, "pinctrl-names", ++ state, &statename); ++ /* ++ * If not, statename is just the integer state ID. But rather ++ * than dynamically allocate it and have to free it later, ++ * just point part way into the property name for the string. ++ */ ++ if (ret < 0) { ++ /* strlen("pinctrl-") == 8 */ ++ statename = prop->name + 8; ++ } ++ ++ /* For every referenced pin configuration node in it */ ++ for (config = 0; config < size; config++) { ++ phandle = be32_to_cpup(list++); ++ ++ /* Look up the pin configuration node */ ++ np_config = of_find_node_by_phandle(phandle); ++ if (!np_config) { ++ dev_err(p->dev, ++ "prop %s index %i invalid phandle\n", ++ prop->name, config); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ /* Parse the node */ ++ ret = dt_to_map_one_config(p, statename, np_config); ++ of_node_put(np_config); ++ if (ret < 0) ++ goto err; ++ } ++ ++ /* No entries in DT? Generate a dummy state table entry */ ++ if (!size) { ++ ret = dt_remember_dummy_state(p, statename); ++ if (ret < 0) ++ goto err; ++ } ++ } ++ ++ return 0; ++ ++err: ++ pinctrl_dt_free_maps(p); ++ return ret; ++} +diff --git a/drivers/pinctrl/devicetree.h b/drivers/pinctrl/devicetree.h +new file mode 100644 +index 0000000..760bc49 +--- /dev/null ++++ b/drivers/pinctrl/devicetree.h +@@ -0,0 +1,35 @@ ++/* ++ * Internal interface to pinctrl device tree integration ++ * ++ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#ifdef CONFIG_OF ++ ++void pinctrl_dt_free_maps(struct pinctrl *p); ++int pinctrl_dt_to_map(struct pinctrl *p); ++ ++#else ++ ++static inline int pinctrl_dt_to_map(struct pinctrl *p) ++{ ++ return 0; ++} ++ ++static inline void pinctrl_dt_free_maps(struct pinctrl *p) ++{ ++} ++ ++#endif +diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h +index 4e9f078..aa92cde 100644 +--- a/include/linux/pinctrl/pinctrl.h ++++ b/include/linux/pinctrl/pinctrl.h +@@ -21,9 +21,11 @@ + + struct device; + struct pinctrl_dev; ++struct pinctrl_map; + struct pinmux_ops; + struct pinconf_ops; + struct gpio_chip; ++struct device_node; + + /** + * struct pinctrl_pin_desc - boards/machines provide information on their +@@ -83,6 +85,11 @@ struct pinctrl_ops { + unsigned *num_pins); + void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, + unsigned offset); ++ int (*dt_node_to_map) (struct pinctrl_dev *pctldev, ++ struct device_node *np_config, ++ struct pinctrl_map **map, unsigned *num_maps); ++ void (*dt_free_map) (struct pinctrl_dev *pctldev, ++ struct pinctrl_map *map, unsigned num_maps); + }; + + /** +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0086-input-at91-add-tsadcc_data-for-9x5.patch b/patches.at91/0086-input-at91-add-tsadcc_data-for-9x5.patch deleted file mode 100644 index 3b361bce87d4..000000000000 --- a/patches.at91/0086-input-at91-add-tsadcc_data-for-9x5.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6fa3817bddf46d9e1fc43a6a217826ec84ededa4 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Thu, 7 Jun 2012 14:19:11 +0800 -Subject: input: at91: add tsadcc_data for 9x5 - -Signed-off-by: Josh Wu ---- - arch/arm/mach-at91/include/mach/board.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h -index 369afc2..726e5f3 100644 ---- a/arch/arm/mach-at91/include/mach/board.h -+++ b/arch/arm/mach-at91/include/mach/board.h -@@ -175,7 +175,9 @@ extern void __init at91_add_device_isi(struct isi_platform_data *data, - /* Touchscreen Controller */ - struct at91_tsadcc_data { - unsigned int adc_clock; -+ u8 filtering_average; - u8 pendet_debounce; -+ u8 pendet_sensitivity; - u8 ts_sample_hold_time; - }; - extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0086-pinctrl-fix-build-when-CONFIG_OF-CONFIG_PINCTRL.patch b/patches.at91/0086-pinctrl-fix-build-when-CONFIG_OF-CONFIG_PINCTRL.patch new file mode 100644 index 000000000000..2f855d34b188 --- /dev/null +++ b/patches.at91/0086-pinctrl-fix-build-when-CONFIG_OF-CONFIG_PINCTRL.patch @@ -0,0 +1,37 @@ +From e159086ce1559954a5f30e4b42feab3934459208 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Tue, 3 Apr 2012 21:53:56 -0600 +Subject: pinctrl: fix build when CONFIG_OF && !CONFIG_PINCTRL + +commit eafeb7a44aa8f79c992b9d557ede740c739f4b25 upstream. + +pinctrl/devicetree.c won't compile when !CONFIG_PINCTRL, since the +pinctrl headers don't declare some types when !PINCTRL. Make sure +pinctrl/Makefile only attempts to compile devicetree.c when OF && +PINCTRL. + +Acked-by: Dong Aisheng +Signed-off-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/Makefile | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile +index 049c9fb..8e3c95a 100644 +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -5,7 +5,9 @@ ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG + obj-$(CONFIG_PINCTRL) += core.o + obj-$(CONFIG_PINMUX) += pinmux.o + obj-$(CONFIG_PINCONF) += pinconf.o +-obj-$(CONFIG_OF) += devicetree.o ++ifeq ($(CONFIG_OF),y) ++obj-$(CONFIG_PINCTRL) += devicetree.o ++endif + obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o + obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o + obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0087-input-at91-add-dt-support-for-atmel-touch-screen-adc.patch b/patches.at91/0087-input-at91-add-dt-support-for-atmel-touch-screen-adc.patch deleted file mode 100644 index 1a432fc80602..000000000000 --- a/patches.at91/0087-input-at91-add-dt-support-for-atmel-touch-screen-adc.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 9dec1a67c24abf90346706d2fb3172c14d0fbcdf Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Wed, 13 Jun 2012 17:28:40 +0800 -Subject: input: at91: add dt support for atmel touch screen adc controller. - -Signed-off-by: Josh Wu ---- - drivers/input/touchscreen/atmel_tsadcc.c | 86 ++++++++++++++++++++++++++++++-- - 1 file changed, 82 insertions(+), 4 deletions(-) - -diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c -index 397d17a..021f87e 100644 ---- a/drivers/input/touchscreen/atmel_tsadcc.c -+++ b/drivers/input/touchscreen/atmel_tsadcc.c -@@ -40,6 +40,8 @@ struct atmel_tsadcc { - unsigned int prev_absx; - unsigned int prev_absy; - unsigned int prev_absz; -+ -+ struct at91_tsadcc_data board; - }; - - static void __iomem *tsc_base; -@@ -62,7 +64,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - { - struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; - struct input_dev *input_dev = ts_dev->input; -- struct at91_tsadcc_data *pdata = input_dev->dev.parent->platform_data; -+ struct at91_tsadcc_data *pdata = &ts_dev->board; - - unsigned int status; - unsigned int reg; -@@ -172,6 +174,63 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) - return IRQ_HANDLED; - } - -+#if defined(CONFIG_OF) -+static int __devinit atmel_of_init_tsadcc(struct device_node *np, -+ struct at91_tsadcc_data *pdata, -+ struct platform_device *pdev) -+{ -+ u32 val; -+ -+ if (of_property_read_u32(np, "atmel,tsadcc_clock", &val) == 0) -+ pdata->adc_clock = val; -+ -+ if (of_property_read_u32(np, "atmel,filtering_average", &val) == 0) { -+ if (val > 0x03) { -+ dev_err(&pdev->dev, "invalid touch average setting, 0x%02x\n", -+ val); -+ return -EINVAL; -+ } -+ pdata->filtering_average = (u8)val; -+ } -+ -+ if (of_property_read_u32(np, "atmel,pendet_debounce", &val) == 0) { -+ if (val > 0x0f) { -+ dev_err(&pdev->dev, "invalid pen detect debounce, 0x%02x\n", -+ val); -+ return -EINVAL; -+ } -+ pdata->pendet_debounce = (u8)val; -+ } -+ -+ if (of_property_read_u32(np, "atmel,pendet_sensitivity", &val) == 0) { -+ if (val > 0x03) { -+ dev_err(&pdev->dev, "invalid pen detective sensitivity setting, 0x%02x\n", -+ val); -+ return -EINVAL; -+ } -+ pdata->pendet_sensitivity = (u8)val; -+ } -+ -+ if (of_property_read_u32(np, "atmel,ts_sample_hold_time", &val) == 0) { -+ if (val > 0x0f) { -+ dev_err(&pdev->dev, "invalid ts sample hold time, 0x%02x\n", -+ val); -+ return -EINVAL; -+ } -+ pdata->ts_sample_hold_time = (u8)val; -+ } -+ -+ return 0; -+} -+#else -+static int __devinit atmel_of_init_tsadcc(struct device_node *np, -+ struct at91_tsadcc_data *pdata, -+ struct platform_device *pdev) -+{ -+ return -EINVAL; -+} -+#endif -+ - /* - * The functions for inserting/removing us as a module. - */ -@@ -181,7 +240,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - struct atmel_tsadcc *ts_dev; - struct input_dev *input_dev; - struct resource *res; -- struct at91_tsadcc_data *pdata = pdev->dev.platform_data; -+ struct at91_tsadcc_data *pdata; - int err = 0; - unsigned int prsc; - unsigned int reg; -@@ -199,6 +258,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - return -ENOMEM; - } - platform_set_drvdata(pdev, ts_dev); -+ pdata = &ts_dev->board; - - input_dev = input_allocate_device(); - if (!input_dev) { -@@ -264,8 +324,16 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) - prsc = clk_get_rate(ts_dev->clk); - dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc); - -- if (!pdata) -- goto err_fail; -+ if (pdev->dev.of_node) { -+ err = atmel_of_init_tsadcc(pdev->dev.of_node, pdata, pdev); -+ if (err) -+ goto err_fail; -+ } else { -+ if (!pdev->dev.platform_data) -+ goto err_fail; -+ else -+ memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); -+ } - - if (!pdata->adc_clock) - pdata->adc_clock = ADC_DEFAULT_CLOCK; -@@ -374,11 +442,21 @@ static int __devexit atmel_tsadcc_remove(struct platform_device *pdev) - return 0; - } - -+#if defined(CONFIG_OF) -+static const struct of_device_id atmel_tsaddcc_dt_ids[] = { -+ { .compatible = "atmel,at91sam9x5-tsadcc"}, -+ { /* sentinel */ } -+} -+ -+MODULE_DEVICE_TABLE(of, atmel_tsaddcc_dt_ids); -+#endif -+ - static struct platform_driver atmel_tsadcc_driver = { - .probe = atmel_tsadcc_probe, - .remove = __devexit_p(atmel_tsadcc_remove), - .driver = { - .name = "atmel_tsadcc", -+ .of_match_table = of_match_ptr(atmel_tsaddcc_dt_ids), - }, - }; - module_platform_driver(atmel_tsadcc_driver); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0087-pinctrl-fix-dangling-comment.patch b/patches.at91/0087-pinctrl-fix-dangling-comment.patch new file mode 100644 index 000000000000..b6eaa383c781 --- /dev/null +++ b/patches.at91/0087-pinctrl-fix-dangling-comment.patch @@ -0,0 +1,31 @@ +From 1a5a72c0a928388e178aca6290fd866b67b045d8 Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Tue, 24 Apr 2012 15:20:02 +0200 +Subject: pinctrl: fix dangling comment + +commit dd5127010afa560b1cfde7e2cffeadabdd20885d upstream. + +This comment was referring to an older PINMUX define, it should +be PINCTRL now. + +Reported-by: Jean-Christophe PLAGNIOL-VILLARD +Acked-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + include/linux/pinctrl/machine.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h +index e4d1de7..9c4a198 100644 +--- a/include/linux/pinctrl/machine.h ++++ b/include/linux/pinctrl/machine.h +@@ -163,5 +163,5 @@ static inline int pinctrl_register_mappings(struct pinctrl_map const *map, + return 0; + } + +-#endif /* !CONFIG_PINMUX */ ++#endif /* !CONFIG_PINCTRL */ + #endif +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0088-net-macb-Add-support-for-Gigabit-Ethernet-mode.patch b/patches.at91/0088-net-macb-Add-support-for-Gigabit-Ethernet-mode.patch deleted file mode 100644 index df89e312b3d3..000000000000 --- a/patches.at91/0088-net-macb-Add-support-for-Gigabit-Ethernet-mode.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 5c2ed1407b5a897a7bd9c9ba0bb6dbc550c71d64 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 6 Sep 2012 14:55:37 +0200 -Subject: net/macb: Add support for Gigabit Ethernet mode - -Add Gigabit Ethernet mode to GEM cadence IP and enable RGMII connection. - -Signed-off-by: Patrice Vilchez -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 15 ++++++++++++--- - drivers/net/ethernet/cadence/macb.h | 4 ++++ - 2 files changed, 16 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 6100b85..e9b909a 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -152,13 +152,17 @@ static void macb_handle_link_change(struct net_device *dev) - - reg = macb_readl(bp, NCFGR); - reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); -+ if (macb_is_gem(bp)) -+ reg &= ~GEM_BIT(GBE); - - if (phydev->duplex) - reg |= MACB_BIT(FD); - if (phydev->speed == SPEED_100) - reg |= MACB_BIT(SPD); -+ if (phydev->speed == SPEED_1000) -+ reg |= GEM_BIT(GBE); - -- macb_writel(bp, NCFGR, reg); -+ macb_or_gem_writel(bp, NCFGR, reg); - - bp->speed = phydev->speed; - bp->duplex = phydev->duplex; -@@ -216,7 +220,10 @@ static int macb_mii_probe(struct net_device *dev) - } - - /* mask with MAC supported features */ -- phydev->supported &= PHY_BASIC_FEATURES; -+ if (macb_is_gem(bp)) -+ phydev->supported &= PHY_GBIT_FEATURES; -+ else -+ phydev->supported &= PHY_BASIC_FEATURES; - - phydev->advertising = phydev->supported; - -@@ -1383,7 +1390,9 @@ static int __init macb_probe(struct platform_device *pdev) - bp->phy_interface = err; - } - -- if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) -+ if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) -+ macb_or_gem_writel(bp, USRIO, GEM_BIT(RGMII)); -+ else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) - #if defined(CONFIG_ARCH_AT91) - macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) | - MACB_BIT(CLKEN))); -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index 335e288..f69ceef 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -145,6 +145,8 @@ - #define MACB_IRXFCS_SIZE 1 - - /* GEM specific NCFGR bitfields. */ -+#define GEM_GBE_OFFSET 10 -+#define GEM_GBE_SIZE 1 - #define GEM_CLK_OFFSET 18 - #define GEM_CLK_SIZE 3 - #define GEM_DBW_OFFSET 21 -@@ -246,6 +248,8 @@ - /* Bitfields in USRIO (AT91) */ - #define MACB_RMII_OFFSET 0 - #define MACB_RMII_SIZE 1 -+#define GEM_RGMII_OFFSET 0 /* GEM gigabit mode */ -+#define GEM_RGMII_SIZE 1 - #define MACB_CLKEN_OFFSET 1 - #define MACB_CLKEN_SIZE 1 - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0088-pinctrl-implement-devm_pinctrl_get-put.patch b/patches.at91/0088-pinctrl-implement-devm_pinctrl_get-put.patch new file mode 100644 index 000000000000..0ed9b2229f5b --- /dev/null +++ b/patches.at91/0088-pinctrl-implement-devm_pinctrl_get-put.patch @@ -0,0 +1,310 @@ +From 6697baae87bbd04741c77c498d560a16edceb42a Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Mon, 16 Apr 2012 10:51:00 -0600 +Subject: pinctrl: implement devm_pinctrl_get()/put() + +commit 6d4ca1fb467932773da7b808c52f3d7ef4461ba0 upstream. + +These functions allow the driver core to automatically clean up any +allocations made by drivers, thus leading to simplified drivers. + +Signed-off-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + Documentation/driver-model/devres.txt | 4 +++ + Documentation/pinctrl.txt | 48 ++++++++++++++++++------------ + drivers/pinctrl/core.c | 56 +++++++++++++++++++++++++++++++++++ + include/linux/pinctrl/consumer.h | 44 +++++++++++++++++++++++++++ + 4 files changed, 133 insertions(+), 19 deletions(-) + +diff --git a/Documentation/driver-model/devres.txt b/Documentation/driver-model/devres.txt +index 2a596a4..ef4fa7b 100644 +--- a/Documentation/driver-model/devres.txt ++++ b/Documentation/driver-model/devres.txt +@@ -276,3 +276,7 @@ REGULATOR + devm_regulator_get() + devm_regulator_put() + devm_regulator_bulk_get() ++ ++PINCTRL ++ devm_pinctrl_get() ++ devm_pinctrl_put() +diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt +index d97bccf..fa829f1 100644 +--- a/Documentation/pinctrl.txt ++++ b/Documentation/pinctrl.txt +@@ -952,13 +952,13 @@ case), we define a mapping like this: + The result of grabbing this mapping from the device with something like + this (see next paragraph): + +- p = pinctrl_get(dev); ++ p = devm_pinctrl_get(dev); + s = pinctrl_lookup_state(p, "8bit"); + ret = pinctrl_select_state(p, s); + + or more simply: + +- p = pinctrl_get_select(dev, "8bit"); ++ p = devm_pinctrl_get_select(dev, "8bit"); + + Will be that you activate all the three bottom records in the mapping at + once. Since they share the same name, pin controller device, function and +@@ -992,7 +992,7 @@ foo_probe() + /* Allocate a state holder named "foo" etc */ + struct foo_state *foo = ...; + +- foo->p = pinctrl_get(&device); ++ foo->p = devm_pinctrl_get(&device); + if (IS_ERR(foo->p)) { + /* FIXME: clean up "foo" here */ + return PTR_ERR(foo->p); +@@ -1000,24 +1000,17 @@ foo_probe() + + foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT); + if (IS_ERR(foo->s)) { +- pinctrl_put(foo->p); + /* FIXME: clean up "foo" here */ + return PTR_ERR(s); + } + + ret = pinctrl_select_state(foo->s); + if (ret < 0) { +- pinctrl_put(foo->p); + /* FIXME: clean up "foo" here */ + return ret; + } + } + +-foo_remove() +-{ +- pinctrl_put(state->p); +-} +- + This get/lookup/select/put sequence can just as well be handled by bus drivers + if you don't want each and every driver to handle it and you know the + arrangement on your bus. +@@ -1029,6 +1022,11 @@ The semantics of the pinctrl APIs are: + kernel memory to hold the pinmux state. All mapping table parsing or similar + slow operations take place within this API. + ++- devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put() ++ to be called automatically on the retrieved pointer when the associated ++ device is removed. It is recommended to use this function over plain ++ pinctrl_get(). ++ + - pinctrl_lookup_state() is called in process context to obtain a handle to a + specific state for a the client device. This operation may be slow too. + +@@ -1041,14 +1039,25 @@ The semantics of the pinctrl APIs are: + + - pinctrl_put() frees all information associated with a pinctrl handle. + ++- devm_pinctrl_put() is a variant of pinctrl_put() that may be used to ++ explicitly destroy a pinctrl object returned by devm_pinctrl_get(). ++ However, use of this function will be rare, due to the automatic cleanup ++ that will occur even without calling it. ++ ++ pinctrl_get() must be paired with a plain pinctrl_put(). ++ pinctrl_get() may not be paired with devm_pinctrl_put(). ++ devm_pinctrl_get() can optionally be paired with devm_pinctrl_put(). ++ devm_pinctrl_get() may not be paired with plain pinctrl_put(). ++ + Usually the pin control core handled the get/put pair and call out to the + device drivers bookkeeping operations, like checking available functions and + the associated pins, whereas the enable/disable pass on to the pin controller + driver which takes care of activating and/or deactivating the mux setting by + quickly poking some registers. + +-The pins are allocated for your device when you issue the pinctrl_get() call, +-after this you should be able to see this in the debugfs listing of all pins. ++The pins are allocated for your device when you issue the devm_pinctrl_get() ++call, after this you should be able to see this in the debugfs listing of all ++pins. + + + System pin control hogging +@@ -1094,13 +1103,13 @@ it, disables and releases it, and muxes it in on the pins defined by group B: + + #include + +-foo_switch() +-{ +- struct pinctrl *p; +- struct pinctrl_state *s1, *s2; ++struct pinctrl *p; ++struct pinctrl_state *s1, *s2; + ++foo_probe() ++{ + /* Setup */ +- p = pinctrl_get(&device); ++ p = devm_pinctrl_get(&device); + if (IS_ERR(p)) + ... + +@@ -1111,7 +1120,10 @@ foo_switch() + s2 = pinctrl_lookup_state(foo->p, "pos-B"); + if (IS_ERR(s2)) + ... ++} + ++foo_switch() ++{ + /* Enable on position A */ + ret = pinctrl_select_state(s1); + if (ret < 0) +@@ -1125,8 +1137,6 @@ foo_switch() + ... + + ... +- +- pinctrl_put(p); + } + + The above has to be done from process context. +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 832f71d..f4544f4 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include "core.h" +@@ -797,6 +798,61 @@ int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) + } + EXPORT_SYMBOL_GPL(pinctrl_select_state); + ++static void devm_pinctrl_release(struct device *dev, void *res) ++{ ++ pinctrl_put(*(struct pinctrl **)res); ++} ++ ++/** ++ * struct devm_pinctrl_get() - Resource managed pinctrl_get() ++ * @dev: the device to obtain the handle for ++ * ++ * If there is a need to explicitly destroy the returned struct pinctrl, ++ * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). ++ */ ++struct pinctrl *devm_pinctrl_get(struct device *dev) ++{ ++ struct pinctrl **ptr, *p; ++ ++ ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); ++ if (!ptr) ++ return ERR_PTR(-ENOMEM); ++ ++ p = pinctrl_get(dev); ++ if (!IS_ERR(p)) { ++ *ptr = p; ++ devres_add(dev, ptr); ++ } else { ++ devres_free(ptr); ++ } ++ ++ return p; ++} ++EXPORT_SYMBOL_GPL(devm_pinctrl_get); ++ ++static int devm_pinctrl_match(struct device *dev, void *res, void *data) ++{ ++ struct pinctrl **p = res; ++ ++ return *p == data; ++} ++ ++/** ++ * devm_pinctrl_put() - Resource managed pinctrl_put() ++ * @p: the pinctrl handle to release ++ * ++ * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally ++ * this function will not need to be called and the resource management ++ * code will ensure that the resource is freed. ++ */ ++void devm_pinctrl_put(struct pinctrl *p) ++{ ++ WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, ++ devm_pinctrl_match, p)); ++ pinctrl_put(p); ++} ++EXPORT_SYMBOL_GPL(devm_pinctrl_put); ++ + int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, + bool dup, bool locked) + { +diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h +index 191e726..6dd96fb 100644 +--- a/include/linux/pinctrl/consumer.h ++++ b/include/linux/pinctrl/consumer.h +@@ -36,6 +36,9 @@ extern struct pinctrl_state * __must_check pinctrl_lookup_state( + const char *name); + extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s); + ++extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev); ++extern void devm_pinctrl_put(struct pinctrl *p); ++ + #else /* !CONFIG_PINCTRL */ + + static inline int pinctrl_request_gpio(unsigned gpio) +@@ -79,6 +82,15 @@ static inline int pinctrl_select_state(struct pinctrl *p, + return 0; + } + ++static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev) ++{ ++ return NULL; ++} ++ ++static inline void devm_pinctrl_put(struct pinctrl *p) ++{ ++} ++ + #endif /* CONFIG_PINCTRL */ + + static inline struct pinctrl * __must_check pinctrl_get_select( +@@ -113,6 +125,38 @@ static inline struct pinctrl * __must_check pinctrl_get_select_default( + return pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); + } + ++static inline struct pinctrl * __must_check devm_pinctrl_get_select( ++ struct device *dev, const char *name) ++{ ++ struct pinctrl *p; ++ struct pinctrl_state *s; ++ int ret; ++ ++ p = devm_pinctrl_get(dev); ++ if (IS_ERR(p)) ++ return p; ++ ++ s = pinctrl_lookup_state(p, name); ++ if (IS_ERR(s)) { ++ devm_pinctrl_put(p); ++ return ERR_PTR(PTR_ERR(s)); ++ } ++ ++ ret = pinctrl_select_state(p, s); ++ if (ret < 0) { ++ devm_pinctrl_put(p); ++ return ERR_PTR(ret); ++ } ++ ++ return p; ++} ++ ++static inline struct pinctrl * __must_check devm_pinctrl_get_select_default( ++ struct device *dev) ++{ ++ return devm_pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); ++} ++ + #ifdef CONFIG_PINCONF + + extern int pin_config_get(const char *dev_name, const char *name, +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0089-net-macb-memory-barriers-cleanup.patch b/patches.at91/0089-net-macb-memory-barriers-cleanup.patch deleted file mode 100644 index 7950edb7c417..000000000000 --- a/patches.at91/0089-net-macb-memory-barriers-cleanup.patch +++ /dev/null @@ -1,96 +0,0 @@ -From fe758f5a6775fb6b71fdf086c07e5247cafd53f3 Mon Sep 17 00:00:00 2001 -From: Havard Skinnemoen -Date: Fri, 28 May 2010 17:13:33 +0200 -Subject: net/macb: memory barriers cleanup - -Remove a couple of unneeded barriers and document the remaining ones. - -Signed-off-by: Havard Skinnemoen -[nicolas.ferre@atmel.com: split patch in topics] -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 18 ++++++++++++++---- - 1 file changed, 14 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index e9b909a..a4dcd11 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -372,7 +372,9 @@ static void macb_tx(struct macb *bp) - - BUG_ON(skb == NULL); - -+ /* Make hw descriptor updates visible to CPU */ - rmb(); -+ - bufstat = bp->tx_ring[tail].ctrl; - - if (!(bufstat & MACB_BIT(TX_USED))) -@@ -415,7 +417,10 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - if (frag == last_frag) - break; - } -+ -+ /* Make descriptor updates visible to hardware */ - wmb(); -+ - return 1; - } - -@@ -436,12 +441,14 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - frag_len); - offset += RX_BUFFER_SIZE; - bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); -- wmb(); - - if (frag == last_frag) - break; - } - -+ /* Make descriptor updates visible to hardware */ -+ wmb(); -+ - skb->protocol = eth_type_trans(skb, bp->dev); - - bp->stats.rx_packets++; -@@ -461,6 +468,8 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin, - - for (frag = begin; frag != end; frag = NEXT_RX(frag)) - bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); -+ -+ /* Make descriptor updates visible to hardware */ - wmb(); - - /* -@@ -479,7 +488,9 @@ static int macb_rx(struct macb *bp, int budget) - for (; budget > 0; tail = NEXT_RX(tail)) { - u32 addr, ctrl; - -+ /* Make hw descriptor updates visible to CPU */ - rmb(); -+ - addr = bp->rx_ring[tail].addr; - ctrl = bp->rx_ring[tail].ctrl; - -@@ -674,6 +685,8 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - - bp->tx_ring[entry].addr = mapping; - bp->tx_ring[entry].ctrl = ctrl; -+ -+ /* Make newly initialized descriptor visible to hardware */ - wmb(); - - entry = NEXT_TX(entry); -@@ -782,9 +795,6 @@ static void macb_init_rings(struct macb *bp) - - static void macb_reset_hw(struct macb *bp) - { -- /* Make sure we have the write buffer for ourselves */ -- wmb(); -- - /* - * Disable RX and TX (XXX: Should we halt the transmission - * more gracefully?) --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0089-pinctrl-add-pinctrl_provide_dummies-interface-for-pl.patch b/patches.at91/0089-pinctrl-add-pinctrl_provide_dummies-interface-for-pl.patch new file mode 100644 index 000000000000..0f78817d0fa7 --- /dev/null +++ b/patches.at91/0089-pinctrl-add-pinctrl_provide_dummies-interface-for-pl.patch @@ -0,0 +1,117 @@ +From 1329721ec7c0898aea3607ac6c02fb8d68b42fea Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Thu, 26 Apr 2012 16:15:50 +0800 +Subject: pinctrl: add pinctrl_provide_dummies interface for platforms to use + +commit 5b3aa5f7c6287b1a0698950a91e94546888e553b upstream. + +Add a interface pinctrl_provide_dummies for platform to indicate +whether it needs use pinctrl dummy state. + +ChangeLog v3->v4: +* remove dummy gpio support in pinctrl subsystem. + Let gpio driver decide whether it wants to use pinctrl gpio mux + function. +ChangeLog v2->v3: +* Also changed the missed pinctrl gpio APIs in v1. +ChangeLog v1->v2: +* Based on sascha's suggestion, drop using kconfig since it will hide + pinctrl errors on all other boards. + See: https://lkml.org/lkml/2012/4/18/282 + It seemed both Linus and Stephen agreed with this way, so i'm ok + with it too. +* Add dummy gpio support. + pinctrl gpio in the same situation as state. +* Patch name changed. + Original is pinctrl: handle dummy state in core. +* Split removing old dt dummy interface into a separate patch + +Cc: Linus Walleij +Cc: Sascha Hauer +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 29 +++++++++++++++++++++++++++-- + include/linux/pinctrl/machine.h | 5 ++++- + 2 files changed, 31 insertions(+), 3 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index f4544f4..2b6363c5 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -43,6 +43,8 @@ struct pinctrl_maps { + unsigned num_maps; + }; + ++static bool pinctrl_dummy_state; ++ + /* Mutex taken by all entry points */ + DEFINE_MUTEX(pinctrl_mutex); + +@@ -61,6 +63,19 @@ static LIST_HEAD(pinctrl_maps); + _i_ < _maps_node_->num_maps; \ + i++, _map_ = &_maps_node_->maps[_i_]) + ++/** ++ * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support ++ * ++ * Usually this function is called by platforms without pinctrl driver support ++ * but run with some shared drivers using pinctrl APIs. ++ * After calling this function, the pinctrl core will return successfully ++ * with creating a dummy state for the driver to keep going smoothly. ++ */ ++void pinctrl_provide_dummies(void) ++{ ++ pinctrl_dummy_state = true; ++} ++ + const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) + { + /* We're not allowed to register devices without name */ +@@ -696,8 +711,18 @@ static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, + struct pinctrl_state *state; + + state = find_state(p, name); +- if (!state) +- return ERR_PTR(-ENODEV); ++ if (!state) { ++ if (pinctrl_dummy_state) { ++ /* create dummy state */ ++ dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", ++ name); ++ state = create_state(p, name); ++ if (IS_ERR(state)) ++ return state; ++ } else { ++ return ERR_PTR(-ENODEV); ++ } ++ } + + return state; + } +diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h +index 9c4a198..7d22ab0 100644 +--- a/include/linux/pinctrl/machine.h ++++ b/include/linux/pinctrl/machine.h +@@ -154,7 +154,7 @@ struct pinctrl_map { + + extern int pinctrl_register_mappings(struct pinctrl_map const *map, + unsigned num_maps); +- ++extern void pinctrl_provide_dummies(void); + #else + + static inline int pinctrl_register_mappings(struct pinctrl_map const *map, +@@ -163,5 +163,8 @@ static inline int pinctrl_register_mappings(struct pinctrl_map const *map, + return 0; + } + ++static inline void pinctrl_provide_dummies(void) ++{ ++} + #endif /* !CONFIG_PINCTRL */ + #endif +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0090-net-macb-change-debugging-messages.patch b/patches.at91/0090-net-macb-change-debugging-messages.patch deleted file mode 100644 index 014d00ddc601..000000000000 --- a/patches.at91/0090-net-macb-change-debugging-messages.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 7dd52f7f7728c264880ed982dcc5cebeb2ee76c0 Mon Sep 17 00:00:00 2001 -From: Havard Skinnemoen -Date: Fri, 28 May 2010 17:45:43 +0200 -Subject: net/macb: change debugging messages - -Convert some noisy netdev_dbg() statements to netdev_vdbg(). Defining -DEBUG will no longer fill up the logs; VERBOSE_DEBUG still does. -Add one more verbose debug for ISR status. - -Signed-off-by: Havard Skinnemoen -[nicolas.ferre@atmel.com: split patch in topics, add ISR status] -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 22 ++++++++++++---------- - 1 file changed, 12 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index a4dcd11..ce1f558 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -313,7 +313,7 @@ static void macb_tx(struct macb *bp) - status = macb_readl(bp, TSR); - macb_writel(bp, TSR, status); - -- netdev_dbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status); -+ netdev_vdbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status); - - if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { - int i; -@@ -380,7 +380,7 @@ static void macb_tx(struct macb *bp) - if (!(bufstat & MACB_BIT(TX_USED))) - break; - -- netdev_dbg(bp->dev, "skb %u (data %p) TX complete\n", -+ netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", - tail, skb->data); - dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, - DMA_TO_DEVICE); -@@ -406,7 +406,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - - len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); - -- netdev_dbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", -+ netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", - first_frag, last_frag, len); - - skb = netdev_alloc_skb(bp->dev, len + RX_OFFSET); -@@ -453,7 +453,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - - bp->stats.rx_packets++; - bp->stats.rx_bytes += len; -- netdev_dbg(bp->dev, "received skb of length %u, csum: %08x\n", -+ netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", - skb->len, skb->csum); - netif_receive_skb(skb); - -@@ -535,7 +535,7 @@ static int macb_poll(struct napi_struct *napi, int budget) - - work_done = 0; - -- netdev_dbg(bp->dev, "poll: status = %08lx, budget = %d\n", -+ netdev_vdbg(bp->dev, "poll: status = %08lx, budget = %d\n", - (unsigned long)status, budget); - - work_done = macb_rx(bp, budget); -@@ -574,6 +574,8 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) - break; - } - -+ netdev_vdbg(bp->dev, "isr = 0x%08lx\n", (unsigned long)status); -+ - if (status & MACB_RX_INT_FLAGS) { - /* - * There's no point taking any more interrupts -@@ -585,7 +587,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) - macb_writel(bp, IDR, MACB_RX_INT_FLAGS); - - if (napi_schedule_prep(&bp->napi)) { -- netdev_dbg(bp->dev, "scheduling RX softirq\n"); -+ netdev_vdbg(bp->dev, "scheduling RX softirq\n"); - __napi_schedule(&bp->napi); - } - } -@@ -647,8 +649,8 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - u32 ctrl; - unsigned long flags; - --#ifdef DEBUG -- netdev_dbg(bp->dev, -+#if defined(DEBUG) && defined(VERBOSE_DEBUG) -+ netdev_vdbg(bp->dev, - "start_xmit: len %u head %p data %p tail %p end %p\n", - skb->len, skb->head, skb->data, - skb_tail_pointer(skb), skb_end_pointer(skb)); -@@ -670,12 +672,12 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - } - - entry = bp->tx_head; -- netdev_dbg(bp->dev, "Allocated ring entry %u\n", entry); -+ netdev_vdbg(bp->dev, "Allocated ring entry %u\n", entry); - mapping = dma_map_single(&bp->pdev->dev, skb->data, - len, DMA_TO_DEVICE); - bp->tx_skb[entry].skb = skb; - bp->tx_skb[entry].mapping = mapping; -- netdev_dbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", -+ netdev_vdbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", - skb->data, (unsigned long)mapping); - - ctrl = MACB_BF(TX_FRMLEN, len); --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0090-pinctrl-remove-pinctrl_remove_gpio_range.patch b/patches.at91/0090-pinctrl-remove-pinctrl_remove_gpio_range.patch new file mode 100644 index 000000000000..d89af2fdb5fd --- /dev/null +++ b/patches.at91/0090-pinctrl-remove-pinctrl_remove_gpio_range.patch @@ -0,0 +1,105 @@ +From 87d3596781005abbbadb4b5acc43c0820f80a112 Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Wed, 23 May 2012 21:22:40 +0800 +Subject: pinctrl: remove pinctrl_remove_gpio_range + +commit 5d589b092ab212bbcc27828167e1c036e7fc77d2 upstream. + +The gpio ranges will be automatically removed when the pinctrl +driver is unregistered. + +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 19 +++++-------------- + drivers/pinctrl/pinctrl-tegra.c | 1 - + drivers/pinctrl/pinctrl-u300.c | 2 -- + include/linux/pinctrl/pinctrl.h | 2 -- + 4 files changed, 5 insertions(+), 19 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 2b6363c5..7b3fc93 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -313,20 +313,6 @@ void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, + EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); + + /** +- * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller +- * @pctldev: pin controller device to remove the range from +- * @range: the GPIO range to remove +- */ +-void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, +- struct pinctrl_gpio_range *range) +-{ +- mutex_lock(&pinctrl_mutex); +- list_del(&range->node); +- mutex_unlock(&pinctrl_mutex); +-} +-EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); +- +-/** + * pinctrl_get_group_selector() - returns the group selector for a group + * @pctldev: the pin controller handling the group + * @pin_group: the pin group to look up +@@ -1456,6 +1442,7 @@ EXPORT_SYMBOL_GPL(pinctrl_register); + */ + void pinctrl_unregister(struct pinctrl_dev *pctldev) + { ++ struct pinctrl_gpio_range *range, *n; + if (pctldev == NULL) + return; + +@@ -1471,6 +1458,10 @@ void pinctrl_unregister(struct pinctrl_dev *pctldev) + /* Destroy descriptor tree */ + pinctrl_free_pindescs(pctldev, pctldev->desc->pins, + pctldev->desc->npins); ++ /* remove gpio ranges map */ ++ list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) ++ list_del(&range->node); ++ + kfree(pctldev); + + mutex_unlock(&pinctrl_mutex); +diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c +index 9b32968..0b3c02f 100644 +--- a/drivers/pinctrl/pinctrl-tegra.c ++++ b/drivers/pinctrl/pinctrl-tegra.c +@@ -525,7 +525,6 @@ static int __devexit tegra_pinctrl_remove(struct platform_device *pdev) + { + struct tegra_pmx *pmx = platform_get_drvdata(pdev); + +- pinctrl_remove_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range); + pinctrl_unregister(pmx->pctl); + + return 0; +diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c +index 26eb8cc..9ff6207 100644 +--- a/drivers/pinctrl/pinctrl-u300.c ++++ b/drivers/pinctrl/pinctrl-u300.c +@@ -1185,8 +1185,6 @@ static int __devexit u300_pmx_remove(struct platform_device *pdev) + struct u300_pmx *upmx = platform_get_drvdata(pdev); + int i; + +- for (i = 0; i < ARRAY_SIZE(u300_gpio_ranges); i++) +- pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_ranges[i]); + pinctrl_unregister(upmx->pctl); + iounmap(upmx->virtbase); + release_mem_region(upmx->phybase, upmx->physize); +diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h +index aa92cde..6e30132 100644 +--- a/include/linux/pinctrl/pinctrl.h ++++ b/include/linux/pinctrl/pinctrl.h +@@ -124,8 +124,6 @@ extern void pinctrl_unregister(struct pinctrl_dev *pctldev); + extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin); + extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range); +-extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, +- struct pinctrl_gpio_range *range); + extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); + extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); + #else +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0091-net-macb-remove-macb_get_drvinfo.patch b/patches.at91/0091-net-macb-remove-macb_get_drvinfo.patch deleted file mode 100644 index c9e7cdb252c1..000000000000 --- a/patches.at91/0091-net-macb-remove-macb_get_drvinfo.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 93c3f8300d6da2e5a670ac681548509d4aa3b020 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Thu, 6 Sep 2012 15:23:47 +0200 -Subject: net/macb: remove macb_get_drvinfo() - -This function has little meaning so remove it altogether and -let ethtool core fill in the fields automatically. - -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 11 ----------- - 1 file changed, 11 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index ce1f558..dc34ff1 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -1223,20 +1223,9 @@ static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - return phy_ethtool_sset(phydev, cmd); - } - --static void macb_get_drvinfo(struct net_device *dev, -- struct ethtool_drvinfo *info) --{ -- struct macb *bp = netdev_priv(dev); -- -- strcpy(info->driver, bp->pdev->dev.driver->name); -- strcpy(info->version, "$Revision: 1.14 $"); -- strcpy(info->bus_info, dev_name(&bp->pdev->dev)); --} -- - static const struct ethtool_ops macb_ethtool_ops = { - .get_settings = macb_get_settings, - .set_settings = macb_set_settings, -- .get_drvinfo = macb_get_drvinfo, - .get_link = ethtool_op_get_link, - }; - --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0091-pinctrl-add-pinctrl_add_gpio_ranges-function.patch b/patches.at91/0091-pinctrl-add-pinctrl_add_gpio_ranges-function.patch new file mode 100644 index 000000000000..a1cbaf5fcafd --- /dev/null +++ b/patches.at91/0091-pinctrl-add-pinctrl_add_gpio_ranges-function.patch @@ -0,0 +1,57 @@ +From a41052a3f24aebed6c1adb152bba379c729693e0 Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Wed, 23 May 2012 21:22:41 +0800 +Subject: pinctrl: add pinctrl_add_gpio_ranges function + +commit 3e5e00b654997aa2c3998d30f7213b9611eb23d7 upstream. + +Often GPIO ranges are added in batch, so create a special +function for that. + +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 11 +++++++++++ + include/linux/pinctrl/pinctrl.h | 3 +++ + 2 files changed, 14 insertions(+) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 7b3fc93..fa8a440 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -312,6 +312,17 @@ void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, + } + EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); + ++void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *ranges, ++ unsigned nranges) ++{ ++ int i; ++ ++ for (i = 0; i < nranges; i++) ++ pinctrl_add_gpio_range(pctldev, &ranges[i]); ++} ++EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); ++ + /** + * pinctrl_get_group_selector() - returns the group selector for a group + * @pctldev: the pin controller handling the group +diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h +index 6e30132..e162710 100644 +--- a/include/linux/pinctrl/pinctrl.h ++++ b/include/linux/pinctrl/pinctrl.h +@@ -124,6 +124,9 @@ extern void pinctrl_unregister(struct pinctrl_dev *pctldev); + extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin); + extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range); ++extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *ranges, ++ unsigned nranges); + extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); + extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); + #else +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0092-net-macb-tx-status-is-more-than-8-bits-now.patch b/patches.at91/0092-net-macb-tx-status-is-more-than-8-bits-now.patch deleted file mode 100644 index 9c0d4ce58f49..000000000000 --- a/patches.at91/0092-net-macb-tx-status-is-more-than-8-bits-now.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 69eb5ddf7b65fe255a87b7613360c17fc8db2bbc Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 3 Sep 2012 17:52:09 +0200 -Subject: net/macb: tx status is more than 8 bits now - -On some revision of GEM, TSR status register has more information. - -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index dc34ff1..4e05a29 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -313,7 +313,7 @@ static void macb_tx(struct macb *bp) - status = macb_readl(bp, TSR); - macb_writel(bp, TSR, status); - -- netdev_vdbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status); -+ netdev_vdbg(bp->dev, "macb_tx status = 0x%03lx\n", (unsigned long)status); - - if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { - int i; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0092-pinctrl-support-gpio-request-deferred-probing.patch b/patches.at91/0092-pinctrl-support-gpio-request-deferred-probing.patch new file mode 100644 index 000000000000..9faae9aefa74 --- /dev/null +++ b/patches.at91/0092-pinctrl-support-gpio-request-deferred-probing.patch @@ -0,0 +1,53 @@ +From 0de7501c1c0b0fa626a51fecb9af7487e128c1fe Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Wed, 25 Apr 2012 19:38:13 +0800 +Subject: pinctrl: support gpio request deferred probing + +commit 4650b7cbea4db73f459181f67f939b510e3a17b2 upstream. + +As pinctrl handles, it may be possible the pinctrl gpio ranges +are still not got registered when user call pinctrl_gpio_request. +Thus, add defer support for it too. + +Signed-off-by: Dong Aisheng +Acked-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index fa8a440..c9c74dc 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -272,7 +272,8 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) + * + * Find the pin controller handling a certain GPIO pin from the pinspace of + * the GPIO subsystem, return the device and the matching GPIO range. Returns +- * negative if the GPIO range could not be found in any device. ++ * -EPROBE_DEFER if the GPIO range could not be found in any device since it ++ * may still have not been registered. + */ + static int pinctrl_get_device_gpio_range(unsigned gpio, + struct pinctrl_dev **outdev, +@@ -292,7 +293,7 @@ static int pinctrl_get_device_gpio_range(unsigned gpio, + } + } + +- return -EINVAL; ++ return -EPROBE_DEFER; + } + + /** +@@ -374,7 +375,7 @@ int pinctrl_request_gpio(unsigned gpio) + ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); + if (ret) { + mutex_unlock(&pinctrl_mutex); +- return -EINVAL; ++ return ret; + } + + /* Convert to the pin controllers number space */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0093-net-macb-clean-up-ring-buffer-logic.patch b/patches.at91/0093-net-macb-clean-up-ring-buffer-logic.patch deleted file mode 100644 index 4e781ee0d844..000000000000 --- a/patches.at91/0093-net-macb-clean-up-ring-buffer-logic.patch +++ /dev/null @@ -1,409 +0,0 @@ -From 5c7c8fe88a651f0e3313e644a952d40f83ce8dee Mon Sep 17 00:00:00 2001 -From: Havard Skinnemoen -Date: Mon, 21 Jun 2010 18:56:29 +0200 -Subject: net/macb: clean up ring buffer logic - -Instead of masking head and tail every time we increment them, just let them -wrap through UINT_MAX and mask them when subscripting. Add simple accessor -functions to do the subscripting properly to minimize the chances of messing -this up. - -This makes the code slightly smaller, and hopefully faster as well. Also, -doing the ring buffer management this way will simplify things a lot when -making the ring sizes configurable in the future. - -Signed-off-by: Havard Skinnemoen -[nicolas.ferre@atmel.com: split patch in topics, adapt to newer kernel] -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 168 +++++++++++++++++++++++------------- - drivers/net/ethernet/cadence/macb.h | 22 +++-- - 2 files changed, 122 insertions(+), 68 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 4e05a29..2554354 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -31,24 +31,13 @@ - - #define RX_BUFFER_SIZE 128 - #define RX_RING_SIZE 512 --#define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE) -+#define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) - - /* Make the IP header word-aligned (the ethernet header is 14 bytes) */ - #define RX_OFFSET 2 - - #define TX_RING_SIZE 128 --#define DEF_TX_RING_PENDING (TX_RING_SIZE - 1) --#define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE) -- --#define TX_RING_GAP(bp) \ -- (TX_RING_SIZE - (bp)->tx_pending) --#define TX_BUFFS_AVAIL(bp) \ -- (((bp)->tx_tail <= (bp)->tx_head) ? \ -- (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \ -- (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp)) --#define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1)) -- --#define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1)) -+#define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) - - /* minimum number of free TX descriptors before waking up TX process */ - #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4) -@@ -56,6 +45,51 @@ - #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \ - | MACB_BIT(ISR_ROVR)) - -+/* Ring buffer accessors */ -+static unsigned int macb_tx_ring_wrap(unsigned int index) -+{ -+ return index & (TX_RING_SIZE - 1); -+} -+ -+static unsigned int macb_tx_ring_avail(struct macb *bp) -+{ -+ return TX_RING_SIZE - (bp->tx_head - bp->tx_tail); -+} -+ -+static struct macb_dma_desc *macb_tx_desc(struct macb *bp, unsigned int index) -+{ -+ return &bp->tx_ring[macb_tx_ring_wrap(index)]; -+} -+ -+static struct macb_tx_skb *macb_tx_skb(struct macb *bp, unsigned int index) -+{ -+ return &bp->tx_skb[macb_tx_ring_wrap(index)]; -+} -+ -+static dma_addr_t macb_tx_dma(struct macb *bp, unsigned int index) -+{ -+ dma_addr_t offset; -+ -+ offset = macb_tx_ring_wrap(index) * sizeof(struct macb_dma_desc); -+ -+ return bp->tx_ring_dma + offset; -+} -+ -+static unsigned int macb_rx_ring_wrap(unsigned int index) -+{ -+ return index & (RX_RING_SIZE - 1); -+} -+ -+static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index) -+{ -+ return &bp->rx_ring[macb_rx_ring_wrap(index)]; -+} -+ -+static void *macb_rx_buffer(struct macb *bp, unsigned int index) -+{ -+ return bp->rx_buffers + RX_BUFFER_SIZE * macb_rx_ring_wrap(index); -+} -+ - static void __macb_set_hwaddr(struct macb *bp) - { - u32 bottom; -@@ -335,17 +369,18 @@ static void macb_tx(struct macb *bp) - bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); - - /* free transmit buffer in upper layer*/ -- for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) { -- struct ring_info *rp = &bp->tx_skb[tail]; -- struct sk_buff *skb = rp->skb; -- -- BUG_ON(skb == NULL); -+ for (tail = bp->tx_tail; tail != head; tail++) { -+ struct macb_tx_skb *tx_skb; -+ struct sk_buff *skb; - - rmb(); - -- dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, -- DMA_TO_DEVICE); -- rp->skb = NULL; -+ tx_skb = macb_tx_skb(bp, tail); -+ skb = tx_skb->skb; -+ -+ dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, -+ skb->len, DMA_TO_DEVICE); -+ tx_skb->skb = NULL; - dev_kfree_skb_irq(skb); - } - -@@ -365,34 +400,38 @@ static void macb_tx(struct macb *bp) - return; - - head = bp->tx_head; -- for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) { -- struct ring_info *rp = &bp->tx_skb[tail]; -- struct sk_buff *skb = rp->skb; -- u32 bufstat; -+ for (tail = bp->tx_tail; tail != head; tail++) { -+ struct macb_tx_skb *tx_skb; -+ struct sk_buff *skb; -+ struct macb_dma_desc *desc; -+ u32 ctrl; - -- BUG_ON(skb == NULL); -+ desc = macb_tx_desc(bp, tail); - - /* Make hw descriptor updates visible to CPU */ - rmb(); - -- bufstat = bp->tx_ring[tail].ctrl; -+ ctrl = desc->ctrl; - -- if (!(bufstat & MACB_BIT(TX_USED))) -+ if (!(ctrl & MACB_BIT(TX_USED))) - break; - -+ tx_skb = macb_tx_skb(bp, tail); -+ skb = tx_skb->skb; -+ - netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", -- tail, skb->data); -- dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, -+ macb_tx_ring_wrap(tail), skb->data); -+ dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len, - DMA_TO_DEVICE); - bp->stats.tx_packets++; - bp->stats.tx_bytes += skb->len; -- rp->skb = NULL; -+ tx_skb->skb = NULL; - dev_kfree_skb_irq(skb); - } - - bp->tx_tail = tail; -- if (netif_queue_stopped(bp->dev) && -- TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH) -+ if (netif_queue_stopped(bp->dev) -+ && macb_tx_ring_avail(bp) > MACB_TX_WAKEUP_THRESH) - netif_wake_queue(bp->dev); - } - -@@ -403,17 +442,21 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - unsigned int frag; - unsigned int offset = 0; - struct sk_buff *skb; -+ struct macb_dma_desc *desc; - -- len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); -+ desc = macb_rx_desc(bp, last_frag); -+ len = MACB_BFEXT(RX_FRMLEN, desc->ctrl); - - netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", -- first_frag, last_frag, len); -+ macb_rx_ring_wrap(first_frag), -+ macb_rx_ring_wrap(last_frag), len); - - skb = netdev_alloc_skb(bp->dev, len + RX_OFFSET); - if (!skb) { - bp->stats.rx_dropped++; -- for (frag = first_frag; ; frag = NEXT_RX(frag)) { -- bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); -+ for (frag = first_frag; ; frag++) { -+ desc = macb_rx_desc(bp, frag); -+ desc->addr &= ~MACB_BIT(RX_USED); - if (frag == last_frag) - break; - } -@@ -428,7 +471,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - skb_checksum_none_assert(skb); - skb_put(skb, len); - -- for (frag = first_frag; ; frag = NEXT_RX(frag)) { -+ for (frag = first_frag; ; frag++) { - unsigned int frag_len = RX_BUFFER_SIZE; - - if (offset + frag_len > len) { -@@ -436,11 +479,10 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - frag_len = len - offset; - } - skb_copy_to_linear_data_offset(skb, offset, -- (bp->rx_buffers + -- (RX_BUFFER_SIZE * frag)), -- frag_len); -+ macb_rx_buffer(bp, frag), frag_len); - offset += RX_BUFFER_SIZE; -- bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); -+ desc = macb_rx_desc(bp, frag); -+ desc->addr &= ~MACB_BIT(RX_USED); - - if (frag == last_frag) - break; -@@ -466,8 +508,10 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin, - { - unsigned int frag; - -- for (frag = begin; frag != end; frag = NEXT_RX(frag)) -- bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); -+ for (frag = begin; frag != end; frag++) { -+ struct macb_dma_desc *desc = macb_rx_desc(bp, frag); -+ desc->addr &= ~MACB_BIT(RX_USED); -+ } - - /* Make descriptor updates visible to hardware */ - wmb(); -@@ -482,17 +526,18 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin, - static int macb_rx(struct macb *bp, int budget) - { - int received = 0; -- unsigned int tail = bp->rx_tail; -+ unsigned int tail; - int first_frag = -1; - -- for (; budget > 0; tail = NEXT_RX(tail)) { -+ for (tail = bp->rx_tail; budget > 0; tail++) { -+ struct macb_dma_desc *desc = macb_rx_desc(bp, tail); - u32 addr, ctrl; - - /* Make hw descriptor updates visible to CPU */ - rmb(); - -- addr = bp->rx_ring[tail].addr; -- ctrl = bp->rx_ring[tail].ctrl; -+ addr = desc->addr; -+ ctrl = desc->ctrl; - - if (!(addr & MACB_BIT(RX_USED))) - break; -@@ -646,6 +691,8 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - struct macb *bp = netdev_priv(dev); - dma_addr_t mapping; - unsigned int len, entry; -+ struct macb_dma_desc *desc; -+ struct macb_tx_skb *tx_skb; - u32 ctrl; - unsigned long flags; - -@@ -662,7 +709,7 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - spin_lock_irqsave(&bp->lock, flags); - - /* This is a hard error, log it. */ -- if (TX_BUFFS_AVAIL(bp) < 1) { -+ if (macb_tx_ring_avail(bp) < 1) { - netif_stop_queue(dev); - spin_unlock_irqrestore(&bp->lock, flags); - netdev_err(bp->dev, "BUG! Tx Ring full when queue awake!\n"); -@@ -671,12 +718,15 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - return NETDEV_TX_BUSY; - } - -- entry = bp->tx_head; -+ entry = macb_tx_ring_wrap(bp->tx_head); -+ bp->tx_head++; - netdev_vdbg(bp->dev, "Allocated ring entry %u\n", entry); - mapping = dma_map_single(&bp->pdev->dev, skb->data, - len, DMA_TO_DEVICE); -- bp->tx_skb[entry].skb = skb; -- bp->tx_skb[entry].mapping = mapping; -+ -+ tx_skb = &bp->tx_skb[entry]; -+ tx_skb->skb = skb; -+ tx_skb->mapping = mapping; - netdev_vdbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", - skb->data, (unsigned long)mapping); - -@@ -685,20 +735,18 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - if (entry == (TX_RING_SIZE - 1)) - ctrl |= MACB_BIT(TX_WRAP); - -- bp->tx_ring[entry].addr = mapping; -- bp->tx_ring[entry].ctrl = ctrl; -+ desc = &bp->tx_ring[entry]; -+ desc->addr = mapping; -+ desc->ctrl = ctrl; - - /* Make newly initialized descriptor visible to hardware */ - wmb(); - -- entry = NEXT_TX(entry); -- bp->tx_head = entry; -- - skb_tx_timestamp(skb); - - macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); - -- if (TX_BUFFS_AVAIL(bp) < 1) -+ if (macb_tx_ring_avail(bp) < 1) - netif_stop_queue(dev); - - spin_unlock_irqrestore(&bp->lock, flags); -@@ -734,7 +782,7 @@ static int macb_alloc_consistent(struct macb *bp) - { - int size; - -- size = TX_RING_SIZE * sizeof(struct ring_info); -+ size = TX_RING_SIZE * sizeof(struct macb_tx_skb); - bp->tx_skb = kmalloc(size, GFP_KERNEL); - if (!bp->tx_skb) - goto out_err; -@@ -1407,8 +1455,6 @@ static int __init macb_probe(struct platform_device *pdev) - macb_or_gem_writel(bp, USRIO, MACB_BIT(MII)); - #endif - -- bp->tx_pending = DEF_TX_RING_PENDING; -- - err = register_netdev(dev); - if (err) { - dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index f69ceef..8a4ee2f 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -356,7 +356,12 @@ - __v; \ - }) - --struct dma_desc { -+/** -+ * struct macb_dma_desc - Hardware DMA descriptor -+ * @addr: DMA address of data buffer -+ * @ctrl: Control and status bits -+ */ -+struct macb_dma_desc { - u32 addr; - u32 ctrl; - }; -@@ -421,7 +426,12 @@ struct dma_desc { - #define MACB_TX_USED_OFFSET 31 - #define MACB_TX_USED_SIZE 1 - --struct ring_info { -+/** -+ * struct macb_tx_skb - data about an skb which is being transmitted -+ * @skb: skb currently being transmitted -+ * @mapping: DMA address of the skb's data buffer -+ */ -+struct macb_tx_skb { - struct sk_buff *skb; - dma_addr_t mapping; - }; -@@ -506,12 +516,12 @@ struct macb { - void __iomem *regs; - - unsigned int rx_tail; -- struct dma_desc *rx_ring; -+ struct macb_dma_desc *rx_ring; - void *rx_buffers; - - unsigned int tx_head, tx_tail; -- struct dma_desc *tx_ring; -- struct ring_info *tx_skb; -+ struct macb_dma_desc *tx_ring; -+ struct macb_tx_skb *tx_skb; - - spinlock_t lock; - struct platform_device *pdev; -@@ -529,8 +539,6 @@ struct macb { - dma_addr_t tx_ring_dma; - dma_addr_t rx_buffers_dma; - -- unsigned int rx_pending, tx_pending; -- - struct mii_bus *mii_bus; - struct phy_device *phy_dev; - unsigned int link; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0093-pinctrl-propagate-map-validation-errors.patch b/patches.at91/0093-pinctrl-propagate-map-validation-errors.patch new file mode 100644 index 000000000000..1c5e936d3e8d --- /dev/null +++ b/patches.at91/0093-pinctrl-propagate-map-validation-errors.patch @@ -0,0 +1,40 @@ +From e9c7b63720ebd0869e642f4aae9f4ff1a53c349c Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Wed, 25 Apr 2012 10:32:16 -0600 +Subject: pinctrl: propagate map validation errors + +commit fde04f419a230fb7f7dc018a9deca6f5d431831e upstream. + +pinctrl_register_map() was returning early if pinmux_validate_map() or +pinconf_validate_map() failed, but was not actually returning the error +code. + +Signed-off-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index c9c74dc..6ae3a33 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -911,13 +911,13 @@ int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, + case PIN_MAP_TYPE_MUX_GROUP: + ret = pinmux_validate_map(&maps[i], i); + if (ret < 0) +- return 0; ++ return ret; + break; + case PIN_MAP_TYPE_CONFIGS_PIN: + case PIN_MAP_TYPE_CONFIGS_GROUP: + ret = pinconf_validate_map(&maps[i], i); + if (ret < 0) +- return 0; ++ return ret; + break; + default: + pr_err("failed to register map %s (%d): invalid type given\n", +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0094-net-macb-ethtool-interface-add-register-dump-feature.patch b/patches.at91/0094-net-macb-ethtool-interface-add-register-dump-feature.patch deleted file mode 100644 index 0b4bc9cbb76a..000000000000 --- a/patches.at91/0094-net-macb-ethtool-interface-add-register-dump-feature.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 07007d3c709662f4cc5e186cb8dd0596e8b0d769 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Mon, 3 Sep 2012 17:56:18 +0200 -Subject: net/macb: ethtool interface: add register dump feature - -Add macb_get_regs() ethtool function and its helper function: -macb_get_regs_len(). -The version field is deduced from the IP revision which gives the -"MACB or GEM" information. An additional version field is reserved. - -Signed-off-by: Nicolas Ferre -Reviewed-by: Ben Hutchings ---- - drivers/net/ethernet/cadence/macb.c | 40 +++++++++++++++++++++++++++++++++++++ - drivers/net/ethernet/cadence/macb.h | 3 +++ - 2 files changed, 43 insertions(+) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 2554354..6486a56 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -1271,9 +1271,49 @@ static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - return phy_ethtool_sset(phydev, cmd); - } - -+static int macb_get_regs_len(struct net_device *netdev) -+{ -+ return MACB_GREGS_NBR * sizeof(u32); -+} -+ -+static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs, -+ void *p) -+{ -+ struct macb *bp = netdev_priv(dev); -+ unsigned int tail, head; -+ u32 *regs_buff = p; -+ -+ regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1)) -+ | MACB_GREGS_VERSION; -+ -+ tail = macb_tx_ring_wrap(bp->tx_tail); -+ head = macb_tx_ring_wrap(bp->tx_head); -+ -+ regs_buff[0] = macb_readl(bp, NCR); -+ regs_buff[1] = macb_or_gem_readl(bp, NCFGR); -+ regs_buff[2] = macb_readl(bp, NSR); -+ regs_buff[3] = macb_readl(bp, TSR); -+ regs_buff[4] = macb_readl(bp, RBQP); -+ regs_buff[5] = macb_readl(bp, TBQP); -+ regs_buff[6] = macb_readl(bp, RSR); -+ regs_buff[7] = macb_readl(bp, IMR); -+ -+ regs_buff[8] = tail; -+ regs_buff[9] = head; -+ regs_buff[10] = macb_tx_dma(bp, tail); -+ regs_buff[11] = macb_tx_dma(bp, head); -+ -+ if (macb_is_gem(bp)) { -+ regs_buff[12] = gem_readl(bp, USRIO); -+ regs_buff[13] = gem_readl(bp, DMACFG); -+ } -+} -+ - static const struct ethtool_ops macb_ethtool_ops = { - .get_settings = macb_get_settings, - .set_settings = macb_set_settings, -+ .get_regs_len = macb_get_regs_len, -+ .get_regs = macb_get_regs, - .get_link = ethtool_op_get_link, - }; - -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index 8a4ee2f..5be5900 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -10,6 +10,9 @@ - #ifndef _MACB_H - #define _MACB_H - -+#define MACB_GREGS_NBR 16 -+#define MACB_GREGS_VERSION 1 -+ - /* MACB register offsets */ - #define MACB_NCR 0x0000 - #define MACB_NCFGR 0x0004 --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0094-pinctrl-mark-non-EXPERIMENTAL.patch b/patches.at91/0094-pinctrl-mark-non-EXPERIMENTAL.patch new file mode 100644 index 000000000000..c494a9ee7ab9 --- /dev/null +++ b/patches.at91/0094-pinctrl-mark-non-EXPERIMENTAL.patch @@ -0,0 +1,32 @@ +From 7b9faf9925d33fe49a04ccad79dbb7ca08a8cc67 Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Thu, 12 Apr 2012 19:48:42 +0200 +Subject: pinctrl: mark non-EXPERIMENTAL + +commit 630e2d0494f001cc3c435cac374f92e4bde0f518 upstream. + +With the finalization of the external driver API and the device +tree support, this subsystem is now mature and can be promoted to +non-experimental status. + +Acked-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/Kconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig +index abfb964..f73a5ea 100644 +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -4,7 +4,6 @@ + + config PINCTRL + bool +- depends on EXPERIMENTAL + + if PINCTRL + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0095-net-macb-better-manage-tx-errors.patch b/patches.at91/0095-net-macb-better-manage-tx-errors.patch deleted file mode 100644 index 1be968b607b3..000000000000 --- a/patches.at91/0095-net-macb-better-manage-tx-errors.patch +++ /dev/null @@ -1,257 +0,0 @@ -From 950c22b78992b706fd8f446efbabb695e2fa2ac1 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Tue, 22 Jun 2010 18:38:26 +0200 -Subject: net/macb: better manage tx errors - -Handle all TX errors, not only underruns. TX error management is -deferred to a dedicated workqueue. -Reinitialize the TX ring after treating all remaining frames, and -restart the controller when everything has been cleaned up properly. -Napi is not stopped during this task as the driver only handles -napi for RX for now. -With this sequence, we do not need a special check during the xmit -method as the packets will be caught by TX disable during workqueue -execution. - -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 166 ++++++++++++++++++++++++------------ - drivers/net/ethernet/cadence/macb.h | 1 + - 2 files changed, 113 insertions(+), 54 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 6486a56..cd24ce6 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -44,6 +44,16 @@ - - #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \ - | MACB_BIT(ISR_ROVR)) -+#define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \ -+ | MACB_BIT(ISR_RLE) \ -+ | MACB_BIT(TXERR)) -+#define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP)) -+ -+/* -+ * Graceful stop timeouts in us. We should allow up to -+ * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions) -+ */ -+#define MACB_HALT_TIMEOUT 1230 - - /* Ring buffer accessors */ - static unsigned int macb_tx_ring_wrap(unsigned int index) -@@ -338,66 +348,113 @@ static void macb_update_stats(struct macb *bp) - *p += __raw_readl(reg); - } - --static void macb_tx(struct macb *bp) -+static int macb_halt_tx(struct macb *bp) - { -- unsigned int tail; -- unsigned int head; -- u32 status; -+ unsigned long halt_time, timeout; -+ u32 status; - -- status = macb_readl(bp, TSR); -- macb_writel(bp, TSR, status); -+ macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT)); - -- netdev_vdbg(bp->dev, "macb_tx status = 0x%03lx\n", (unsigned long)status); -+ timeout = jiffies + usecs_to_jiffies(MACB_HALT_TIMEOUT); -+ do { -+ halt_time = jiffies; -+ status = macb_readl(bp, TSR); -+ if (!(status & MACB_BIT(TGO))) -+ return 0; - -- if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { -- int i; -- netdev_err(bp->dev, "TX %s, resetting buffers\n", -- status & MACB_BIT(UND) ? -- "underrun" : "retry limit exceeded"); -+ usleep_range(10, 250); -+ } while (time_before(halt_time, timeout)); - -- /* Transfer ongoing, disable transmitter, to avoid confusion */ -- if (status & MACB_BIT(TGO)) -- macb_writel(bp, NCR, macb_readl(bp, NCR) & ~MACB_BIT(TE)); -+ return -ETIMEDOUT; -+} - -- head = bp->tx_head; -+static void macb_tx_error_task(struct work_struct *work) -+{ -+ struct macb *bp = container_of(work, struct macb, tx_error_task); -+ struct macb_tx_skb *tx_skb; -+ struct sk_buff *skb; -+ unsigned int tail; - -- /*Mark all the buffer as used to avoid sending a lost buffer*/ -- for (i = 0; i < TX_RING_SIZE; i++) -- bp->tx_ring[i].ctrl = MACB_BIT(TX_USED); -+ netdev_vdbg(bp->dev, "macb_tx_error_task: t = %u, h = %u\n", -+ bp->tx_tail, bp->tx_head); - -- /* Add wrap bit */ -- bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); -+ /* Make sure nobody is trying to queue up new packets */ -+ netif_stop_queue(bp->dev); - -- /* free transmit buffer in upper layer*/ -- for (tail = bp->tx_tail; tail != head; tail++) { -- struct macb_tx_skb *tx_skb; -- struct sk_buff *skb; -+ /* -+ * Stop transmission now -+ * (in case we have just queued new packets) -+ */ -+ if (macb_halt_tx(bp)) -+ /* Just complain for now, reinitializing TX path can be good */ -+ netdev_err(bp->dev, "BUG: halt tx timed out\n"); - -- rmb(); -+ /* No need for the lock here as nobody will interrupt us anymore */ - -- tx_skb = macb_tx_skb(bp, tail); -- skb = tx_skb->skb; -+ /* -+ * Treat frames in TX queue including the ones that caused the error. -+ * Free transmit buffers in upper layer. -+ */ -+ for (tail = bp->tx_tail; tail != bp->tx_head; tail++) { -+ struct macb_dma_desc *desc; -+ u32 ctrl; - -- dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, -- skb->len, DMA_TO_DEVICE); -- tx_skb->skb = NULL; -- dev_kfree_skb_irq(skb); -- } -+ desc = macb_tx_desc(bp, tail); -+ ctrl = desc->ctrl; -+ tx_skb = macb_tx_skb(bp, tail); -+ skb = tx_skb->skb; - -- bp->tx_head = bp->tx_tail = 0; -+ if (ctrl & MACB_BIT(TX_USED)) { -+ netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n", -+ macb_tx_ring_wrap(tail), skb->data); -+ bp->stats.tx_packets++; -+ bp->stats.tx_bytes += skb->len; -+ } else { -+ /* -+ * "Buffers exhausted mid-frame" errors may only happen -+ * if the driver is buggy, so complain loudly about those. -+ * Statistics are updated by hardware. -+ */ -+ if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED)) -+ netdev_err(bp->dev, -+ "BUG: TX buffers exhausted mid-frame\n"); - -- /* Enable the transmitter again */ -- if (status & MACB_BIT(TGO)) -- macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TE)); -+ desc->ctrl = ctrl | MACB_BIT(TX_USED); -+ } -+ -+ dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len, -+ DMA_TO_DEVICE); -+ tx_skb->skb = NULL; -+ dev_kfree_skb(skb); - } - -- if (!(status & MACB_BIT(COMP))) -- /* -- * This may happen when a buffer becomes complete -- * between reading the ISR and scanning the -- * descriptors. Nothing to worry about. -- */ -- return; -+ /* Make descriptor updates visible to hardware */ -+ wmb(); -+ -+ /* Reinitialize the TX desc queue */ -+ macb_writel(bp, TBQP, bp->tx_ring_dma); -+ /* Make TX ring reflect state of hardware */ -+ bp->tx_head = bp->tx_tail = 0; -+ -+ /* Now we are ready to start transmission again */ -+ netif_wake_queue(bp->dev); -+ -+ /* Housework before enabling TX IRQ */ -+ macb_writel(bp, TSR, macb_readl(bp, TSR)); -+ macb_writel(bp, IER, MACB_TX_INT_FLAGS); -+} -+ -+static void macb_tx_interrupt(struct macb *bp) -+{ -+ unsigned int tail; -+ unsigned int head; -+ u32 status; -+ -+ status = macb_readl(bp, TSR); -+ macb_writel(bp, TSR, status); -+ -+ netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n", -+ (unsigned long)status); - - head = bp->tx_head; - for (tail = bp->tx_tail; tail != head; tail++) { -@@ -637,9 +694,14 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) - } - } - -- if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND) | -- MACB_BIT(ISR_RLE))) -- macb_tx(bp); -+ if (unlikely(status & (MACB_TX_ERR_FLAGS))) { -+ macb_writel(bp, IDR, MACB_TX_INT_FLAGS); -+ schedule_work(&bp->tx_error_task); -+ break; -+ } -+ -+ if (status & MACB_BIT(TCOMP)) -+ macb_tx_interrupt(bp); - - /* - * Link change detection isn't possible with RMII, so we'll -@@ -969,13 +1031,8 @@ static void macb_init_hw(struct macb *bp) - macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE)); - - /* Enable interrupts */ -- macb_writel(bp, IER, (MACB_BIT(RCOMP) -- | MACB_BIT(RXUBR) -- | MACB_BIT(ISR_TUND) -- | MACB_BIT(ISR_RLE) -- | MACB_BIT(TXERR) -- | MACB_BIT(TCOMP) -- | MACB_BIT(ISR_ROVR) -+ macb_writel(bp, IER, (MACB_RX_INT_FLAGS -+ | MACB_TX_INT_FLAGS - | MACB_BIT(HRESP))); - - } -@@ -1423,6 +1480,7 @@ static int __init macb_probe(struct platform_device *pdev) - bp->dev = dev; - - spin_lock_init(&bp->lock); -+ INIT_WORK(&bp->tx_error_task, macb_tx_error_task); - - bp->pclk = clk_get(&pdev->dev, "pclk"); - if (IS_ERR(bp->pclk)) { -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index 5be5900..bfab8ef 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -532,6 +532,7 @@ struct macb { - struct clk *hclk; - struct net_device *dev; - struct napi_struct napi; -+ struct work_struct tx_error_task; - struct net_device_stats stats; - union { - struct macb_stats macb; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0095-pinctrl-implement-pinctrl-deferred-probing.patch b/patches.at91/0095-pinctrl-implement-pinctrl-deferred-probing.patch new file mode 100644 index 000000000000..b842a4f0055b --- /dev/null +++ b/patches.at91/0095-pinctrl-implement-pinctrl-deferred-probing.patch @@ -0,0 +1,84 @@ +From ca7138a65812dda79268a64d765335279d4f917c Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Tue, 10 Apr 2012 10:00:38 +0200 +Subject: pinctrl: implement pinctrl deferred probing + +commit c05127c4e2c6e7d9949347a76fd05c337bcd5e84 upstream. + +If drivers try to obtain pinctrl handles for a pin controller that +has not yet registered to the subsystem, we need to be able to +back out and retry with deferred probing. So let's return +-EPROBE_DEFER whenever this location fails. Also downgrade the +errors to info, maybe we will even set them to debug once the +deferred probing is commonplace. + +Cc: Arnd Bergmann +Reviewed-by: Mark Brown +Acked-by: Stephen Warren +Signed-off-by: Linus Walleij +--- + Documentation/pinctrl.txt | 5 +++++ + drivers/pinctrl/core.c | 9 ++++++--- + drivers/pinctrl/devicetree.c | 6 +++--- + 3 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt +index fa829f1..b85f0bd 100644 +--- a/Documentation/pinctrl.txt ++++ b/Documentation/pinctrl.txt +@@ -1059,6 +1059,11 @@ The pins are allocated for your device when you issue the devm_pinctrl_get() + call, after this you should be able to see this in the debugfs listing of all + pins. + ++NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the ++requested pinctrl handles, for example if the pinctrl driver has not yet ++registered. Thus make sure that the error path in your driver gracefully ++cleans up and is ready to retry the probing later in the startup process. ++ + + System pin control hogging + ========================== +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 6ae3a33..ff78028 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -531,11 +531,14 @@ static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) + + setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); + if (setting->pctldev == NULL) { +- dev_err(p->dev, "unknown pinctrl device %s in map entry", ++ dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", + map->ctrl_dev_name); + kfree(setting); +- /* Eventually, this should trigger deferred probe */ +- return -ENODEV; ++ /* ++ * OK let us guess that the driver is not there yet, and ++ * let's defer obtaining this pinctrl handle to later... ++ */ ++ return -EPROBE_DEFER; + } + + switch (map->type) { +diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c +index 5ef2feb..fcb1de4 100644 +--- a/drivers/pinctrl/devicetree.c ++++ b/drivers/pinctrl/devicetree.c +@@ -121,11 +121,11 @@ static int dt_to_map_one_config(struct pinctrl *p, const char *statename, + for (;;) { + np_pctldev = of_get_next_parent(np_pctldev); + if (!np_pctldev || of_node_is_root(np_pctldev)) { +- dev_err(p->dev, "could not find pctldev for node %s\n", ++ dev_info(p->dev, "could not find pctldev for node %s, deferring probe\n", + np_config->full_name); + of_node_put(np_pctldev); +- /* FIXME: This should trigger deferrered probe */ +- return -ENODEV; ++ /* OK let's just assume this will appear later then */ ++ return -EPROBE_DEFER; + } + pctldev = find_pinctrl_by_of_node(np_pctldev); + if (pctldev) +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0096-net-macb-Offset-first-RX-buffer-by-two-bytes.patch b/patches.at91/0096-net-macb-Offset-first-RX-buffer-by-two-bytes.patch deleted file mode 100644 index 8037759a4005..000000000000 --- a/patches.at91/0096-net-macb-Offset-first-RX-buffer-by-two-bytes.patch +++ /dev/null @@ -1,94 +0,0 @@ -From ebff9d35a64e87d3a6c6d05421b7be4ceedbb589 Mon Sep 17 00:00:00 2001 -From: Havard Skinnemoen -Date: Tue, 24 Mar 2009 10:45:18 +0100 -Subject: net/macb: Offset first RX buffer by two bytes - -Make the ethernet frame payload word-aligned, possibly making the -memcpy into the skb a bit faster. This will be even more important -after we eliminate the copy altogether. - -Also eliminate the redundant RX_OFFSET constant -- it has the same -definition and purpose as NET_IP_ALIGN. - -Signed-off-by: Havard Skinnemoen -[nicolas.ferre@atmel.com: adapt to newer kernel] -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 23 ++++++++++++++++------- - 1 file changed, 16 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index cd24ce6..88a1d20 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -33,9 +33,6 @@ - #define RX_RING_SIZE 512 - #define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) - --/* Make the IP header word-aligned (the ethernet header is 14 bytes) */ --#define RX_OFFSET 2 -- - #define TX_RING_SIZE 128 - #define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) - -@@ -497,7 +494,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - { - unsigned int len; - unsigned int frag; -- unsigned int offset = 0; -+ unsigned int offset; - struct sk_buff *skb; - struct macb_dma_desc *desc; - -@@ -508,7 +505,16 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - macb_rx_ring_wrap(first_frag), - macb_rx_ring_wrap(last_frag), len); - -- skb = netdev_alloc_skb(bp->dev, len + RX_OFFSET); -+ /* -+ * The ethernet header starts NET_IP_ALIGN bytes into the -+ * first buffer. Since the header is 14 bytes, this makes the -+ * payload word-aligned. -+ * -+ * Instead of calling skb_reserve(NET_IP_ALIGN), we just copy -+ * the two padding bytes into the skb so that we avoid hitting -+ * the slowpath in memcpy(), and pull them off afterwards. -+ */ -+ skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN); - if (!skb) { - bp->stats.rx_dropped++; - for (frag = first_frag; ; frag++) { -@@ -524,7 +530,8 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - return 1; - } - -- skb_reserve(skb, RX_OFFSET); -+ offset = 0; -+ len += NET_IP_ALIGN; - skb_checksum_none_assert(skb); - skb_put(skb, len); - -@@ -548,10 +555,11 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - /* Make descriptor updates visible to hardware */ - wmb(); - -+ __skb_pull(skb, NET_IP_ALIGN); - skb->protocol = eth_type_trans(skb, bp->dev); - - bp->stats.rx_packets++; -- bp->stats.rx_bytes += len; -+ bp->stats.rx_bytes += skb->len; - netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", - skb->len, skb->csum); - netif_receive_skb(skb); -@@ -1011,6 +1019,7 @@ static void macb_init_hw(struct macb *bp) - __macb_set_hwaddr(bp); - - config = macb_mdc_clk_div(bp); -+ config |= MACB_BF(RBOF, NET_IP_ALIGN); /* Make eth data aligned */ - config |= MACB_BIT(PAE); /* PAuse Enable */ - config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ - config |= MACB_BIT(BIG); /* Receive oversized frames */ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0096-pinctrl-replace-list_-with-get_-_count.patch b/patches.at91/0096-pinctrl-replace-list_-with-get_-_count.patch new file mode 100644 index 000000000000..5e9e51e07082 --- /dev/null +++ b/patches.at91/0096-pinctrl-replace-list_-with-get_-_count.patch @@ -0,0 +1,636 @@ +From 9ef4d54b79f8a5da7112864968dcf12cb1bcedb4 Mon Sep 17 00:00:00 2001 +From: Viresh Kumar +Date: Fri, 30 Mar 2012 11:25:40 +0530 +Subject: pinctrl: replace list_*() with get_*_count() + +commit d1e90e9e7467dbfe521b25ba79f520bf676ebc36 upstream. + +Most of the SoC drivers implement list_groups() and list_functions() +routines for pinctrl and pinmux. These routines continue returning +zero until the selector argument is greater than total count of +available groups or functions. + +This patch replaces these list_*() routines with get_*_count() +routines, which returns the number of available selection for SoC +driver. pinctrl layer will use this value to check the range it can +choose. + +This patch fixes all user drivers for this change. There are other +routines in user drivers, which have checks to check validity of +selector passed to them. It is also no more required and hence +removed. + +Documentation updated as well. + +Acked-by: Stephen Warren +Signed-off-by: Viresh Kumar +[Folded in fix and fixed a minor merge artifact manually] +Signed-off-by: Linus Walleij +--- + Documentation/pinctrl.txt | 37 +++++++++++++++---------------------- + drivers/pinctrl/core.c | 10 ++++++---- + drivers/pinctrl/pinconf.c | 3 ++- + drivers/pinctrl/pinctrl-pxa3xx.c | 24 ++++++++++-------------- + drivers/pinctrl/pinctrl-sirf.c | 20 ++++++-------------- + drivers/pinctrl/pinctrl-tegra.c | 40 ++++++---------------------------------- + drivers/pinctrl/pinctrl-u300.c | 20 ++++++-------------- + drivers/pinctrl/pinmux.c | 11 +++++++---- + include/linux/pinctrl/pinctrl.h | 6 ++---- + include/linux/pinctrl/pinmux.h | 7 +++---- + 10 files changed, 63 insertions(+), 115 deletions(-) + +diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt +index b85f0bd..f5add79 100644 +--- a/Documentation/pinctrl.txt ++++ b/Documentation/pinctrl.txt +@@ -152,11 +152,9 @@ static const struct foo_group foo_groups[] = { + }; + + +-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) ++static int foo_get_groups_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(foo_groups)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(foo_groups); + } + + static const char *foo_get_group_name(struct pinctrl_dev *pctldev, +@@ -175,7 +173,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, + } + + static struct pinctrl_ops foo_pctrl_ops = { +- .list_groups = foo_list_groups, ++ .get_groups_count = foo_get_groups_count, + .get_group_name = foo_get_group_name, + .get_group_pins = foo_get_group_pins, + }; +@@ -186,13 +184,12 @@ static struct pinctrl_desc foo_desc = { + .pctlops = &foo_pctrl_ops, + }; + +-The pin control subsystem will call the .list_groups() function repeatedly +-beginning on 0 until it returns non-zero to determine legal selectors, then +-it will call the other functions to retrieve the name and pins of the group. +-Maintaining the data structure of the groups is up to the driver, this is +-just a simple example - in practice you may need more entries in your group +-structure, for example specific register ranges associated with each group +-and so on. ++The pin control subsystem will call the .get_groups_count() function to ++determine total number of legal selectors, then it will call the other functions ++to retrieve the name and pins of the group. Maintaining the data structure of ++the groups is up to the driver, this is just a simple example - in practice you ++may need more entries in your group structure, for example specific register ++ranges associated with each group and so on. + + + Pin configuration +@@ -606,11 +603,9 @@ static const struct foo_group foo_groups[] = { + }; + + +-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) ++static int foo_get_groups_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(foo_groups)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(foo_groups); + } + + static const char *foo_get_group_name(struct pinctrl_dev *pctldev, +@@ -629,7 +624,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, + } + + static struct pinctrl_ops foo_pctrl_ops = { +- .list_groups = foo_list_groups, ++ .get_groups_count = foo_get_groups_count, + .get_group_name = foo_get_group_name, + .get_group_pins = foo_get_group_pins, + }; +@@ -663,11 +658,9 @@ static const struct foo_pmx_func foo_functions[] = { + }, + }; + +-int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) ++int foo_get_functions_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(foo_functions)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(foo_functions); + } + + const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) +@@ -703,7 +696,7 @@ void foo_disable(struct pinctrl_dev *pctldev, unsigned selector, + } + + struct pinmux_ops foo_pmxops = { +- .list_functions = foo_list_funcs, ++ .get_functions_count = foo_get_functions_count, + .get_function_name = foo_get_fname, + .get_function_groups = foo_get_groups, + .enable = foo_enable, +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index ff78028..c70ae2d 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -333,9 +333,10 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, + const char *pin_group) + { + const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; ++ unsigned ngroups = pctlops->get_groups_count(pctldev); + unsigned group_selector = 0; + +- while (pctlops->list_groups(pctldev, group_selector) >= 0) { ++ while (group_selector < ngroups) { + const char *gname = pctlops->get_group_name(pctldev, + group_selector); + if (!strcmp(gname, pin_group)) { +@@ -1023,12 +1024,13 @@ static int pinctrl_groups_show(struct seq_file *s, void *what) + { + struct pinctrl_dev *pctldev = s->private; + const struct pinctrl_ops *ops = pctldev->desc->pctlops; +- unsigned selector = 0; ++ unsigned ngroups, selector = 0; + ++ ngroups = ops->get_groups_count(pctldev); + mutex_lock(&pinctrl_mutex); + + seq_puts(s, "registered pin groups:\n"); +- while (ops->list_groups(pctldev, selector) >= 0) { ++ while (selector < ngroups) { + const unsigned *pins; + unsigned num_pins; + const char *gname = ops->get_group_name(pctldev, selector); +@@ -1343,7 +1345,7 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev) + const struct pinctrl_ops *ops = pctldev->desc->pctlops; + + if (!ops || +- !ops->list_groups || ++ !ops->get_groups_count || + !ops->get_group_name || + !ops->get_group_pins) + return -EINVAL; +diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c +index 7321e86..eb3a14f4 100644 +--- a/drivers/pinctrl/pinconf.c ++++ b/drivers/pinctrl/pinconf.c +@@ -495,6 +495,7 @@ static int pinconf_groups_show(struct seq_file *s, void *what) + struct pinctrl_dev *pctldev = s->private; + const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; + const struct pinconf_ops *ops = pctldev->desc->confops; ++ unsigned ngroups = pctlops->get_groups_count(pctldev); + unsigned selector = 0; + + if (!ops || !ops->pin_config_group_get) +@@ -505,7 +506,7 @@ static int pinconf_groups_show(struct seq_file *s, void *what) + + mutex_lock(&pinctrl_mutex); + +- while (pctlops->list_groups(pctldev, selector) >= 0) { ++ while (selector < ngroups) { + const char *gname = pctlops->get_group_name(pctldev, selector); + + seq_printf(s, "%u (%s):", selector, gname); +diff --git a/drivers/pinctrl/pinctrl-pxa3xx.c b/drivers/pinctrl/pinctrl-pxa3xx.c +index 079dce0..7644e42 100644 +--- a/drivers/pinctrl/pinctrl-pxa3xx.c ++++ b/drivers/pinctrl/pinctrl-pxa3xx.c +@@ -25,20 +25,18 @@ static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = { + .pin_base = 0, + }; + +-static int pxa3xx_list_groups(struct pinctrl_dev *pctrldev, unsigned selector) ++static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev) + { + struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev); +- if (selector >= info->num_grps) +- return -EINVAL; +- return 0; ++ ++ return info->num_grps; + } + + static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev, + unsigned selector) + { + struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev); +- if (selector >= info->num_grps) +- return NULL; ++ + return info->grps[selector].name; + } + +@@ -48,25 +46,23 @@ static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev, + unsigned *num_pins) + { + struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev); +- if (selector >= info->num_grps) +- return -EINVAL; ++ + *pins = info->grps[selector].pins; + *num_pins = info->grps[selector].npins; + return 0; + } + + static struct pinctrl_ops pxa3xx_pctrl_ops = { +- .list_groups = pxa3xx_list_groups, ++ .get_groups_count = pxa3xx_get_groups_count, + .get_group_name = pxa3xx_get_group_name, + .get_group_pins = pxa3xx_get_group_pins, + }; + +-static int pxa3xx_pmx_list_func(struct pinctrl_dev *pctrldev, unsigned func) ++static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev) + { + struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev); +- if (func >= info->num_funcs) +- return -EINVAL; +- return 0; ++ ++ return info->num_funcs; + } + + static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev, +@@ -170,7 +166,7 @@ static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev, + } + + static struct pinmux_ops pxa3xx_pmx_ops = { +- .list_functions = pxa3xx_pmx_list_func, ++ .get_functions_count = pxa3xx_pmx_get_funcs_count, + .get_function_name = pxa3xx_pmx_get_func_name, + .get_function_groups = pxa3xx_pmx_get_groups, + .enable = pxa3xx_pmx_enable, +diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c +index 6b3534c..ba15b1a 100644 +--- a/drivers/pinctrl/pinctrl-sirf.c ++++ b/drivers/pinctrl/pinctrl-sirf.c +@@ -853,18 +853,14 @@ static const struct sirfsoc_pin_group sirfsoc_pin_groups[] = { + SIRFSOC_PIN_GROUP("gpsgrp", gps_pins), + }; + +-static int sirfsoc_list_groups(struct pinctrl_dev *pctldev, unsigned selector) ++static int sirfsoc_get_groups_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(sirfsoc_pin_groups); + } + + static const char *sirfsoc_get_group_name(struct pinctrl_dev *pctldev, + unsigned selector) + { +- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups)) +- return NULL; + return sirfsoc_pin_groups[selector].name; + } + +@@ -872,8 +868,6 @@ static int sirfsoc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector + const unsigned **pins, + unsigned *num_pins) + { +- if (selector >= ARRAY_SIZE(sirfsoc_pin_groups)) +- return -EINVAL; + *pins = sirfsoc_pin_groups[selector].pins; + *num_pins = sirfsoc_pin_groups[selector].num_pins; + return 0; +@@ -886,7 +880,7 @@ static void sirfsoc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s + } + + static struct pinctrl_ops sirfsoc_pctrl_ops = { +- .list_groups = sirfsoc_list_groups, ++ .get_groups_count = sirfsoc_get_groups_count, + .get_group_name = sirfsoc_get_group_name, + .get_group_pins = sirfsoc_get_group_pins, + .pin_dbg_show = sirfsoc_pin_dbg_show, +@@ -1033,11 +1027,9 @@ static void sirfsoc_pinmux_disable(struct pinctrl_dev *pmxdev, unsigned selector + sirfsoc_pinmux_endisable(spmx, selector, false); + } + +-static int sirfsoc_pinmux_list_funcs(struct pinctrl_dev *pmxdev, unsigned selector) ++static int sirfsoc_pinmux_get_funcs_count(struct pinctrl_dev *pmxdev) + { +- if (selector >= ARRAY_SIZE(sirfsoc_pmx_functions)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(sirfsoc_pmx_functions); + } + + static const char *sirfsoc_pinmux_get_func_name(struct pinctrl_dev *pctldev, +@@ -1074,9 +1066,9 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev, + } + + static struct pinmux_ops sirfsoc_pinmux_ops = { +- .list_functions = sirfsoc_pinmux_list_funcs, + .enable = sirfsoc_pinmux_enable, + .disable = sirfsoc_pinmux_disable, ++ .get_functions_count = sirfsoc_pinmux_get_funcs_count, + .get_function_name = sirfsoc_pinmux_get_func_name, + .get_function_groups = sirfsoc_pinmux_get_groups, + .gpio_request_enable = sirfsoc_pinmux_request_gpio, +diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c +index 0b3c02f..c4c47c5 100644 +--- a/drivers/pinctrl/pinctrl-tegra.c ++++ b/drivers/pinctrl/pinctrl-tegra.c +@@ -53,15 +53,11 @@ static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg) + writel(val, pmx->regs[bank] + reg); + } + +-static int tegra_pinctrl_list_groups(struct pinctrl_dev *pctldev, +- unsigned group) ++static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (group >= pmx->soc->ngroups) +- return -EINVAL; +- +- return 0; ++ return pmx->soc->ngroups; + } + + static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev, +@@ -69,9 +65,6 @@ static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (group >= pmx->soc->ngroups) +- return NULL; +- + return pmx->soc->groups[group].name; + } + +@@ -82,9 +75,6 @@ static int tegra_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (group >= pmx->soc->ngroups) +- return -EINVAL; +- + *pins = pmx->soc->groups[group].pins; + *num_pins = pmx->soc->groups[group].npins; + +@@ -99,21 +89,17 @@ static void tegra_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev, + } + + static struct pinctrl_ops tegra_pinctrl_ops = { +- .list_groups = tegra_pinctrl_list_groups, ++ .get_groups_count = tegra_pinctrl_get_groups_count, + .get_group_name = tegra_pinctrl_get_group_name, + .get_group_pins = tegra_pinctrl_get_group_pins, + .pin_dbg_show = tegra_pinctrl_pin_dbg_show, + }; + +-static int tegra_pinctrl_list_funcs(struct pinctrl_dev *pctldev, +- unsigned function) ++static int tegra_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (function >= pmx->soc->nfunctions) +- return -EINVAL; +- +- return 0; ++ return pmx->soc->nfunctions; + } + + static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev, +@@ -121,9 +107,6 @@ static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (function >= pmx->soc->nfunctions) +- return NULL; +- + return pmx->soc->functions[function].name; + } + +@@ -134,9 +117,6 @@ static int tegra_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, + { + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + +- if (function >= pmx->soc->nfunctions) +- return -EINVAL; +- + *groups = pmx->soc->functions[function].groups; + *num_groups = pmx->soc->functions[function].ngroups; + +@@ -151,8 +131,6 @@ static int tegra_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function, + int i; + u32 val; + +- if (group >= pmx->soc->ngroups) +- return -EINVAL; + g = &pmx->soc->groups[group]; + + if (g->mux_reg < 0) +@@ -180,8 +158,6 @@ static void tegra_pinctrl_disable(struct pinctrl_dev *pctldev, + const struct tegra_pingroup *g; + u32 val; + +- if (group >= pmx->soc->ngroups) +- return; + g = &pmx->soc->groups[group]; + + if (g->mux_reg < 0) +@@ -194,7 +170,7 @@ static void tegra_pinctrl_disable(struct pinctrl_dev *pctldev, + } + + static struct pinmux_ops tegra_pinmux_ops = { +- .list_functions = tegra_pinctrl_list_funcs, ++ .get_functions_count = tegra_pinctrl_get_funcs_count, + .get_function_name = tegra_pinctrl_get_func_name, + .get_function_groups = tegra_pinctrl_get_func_groups, + .enable = tegra_pinctrl_enable, +@@ -324,8 +300,6 @@ static int tegra_pinconf_group_get(struct pinctrl_dev *pctldev, + s16 reg; + u32 val, mask; + +- if (group >= pmx->soc->ngroups) +- return -EINVAL; + g = &pmx->soc->groups[group]; + + ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width); +@@ -353,8 +327,6 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev, + s16 reg; + u32 val, mask; + +- if (group >= pmx->soc->ngroups) +- return -EINVAL; + g = &pmx->soc->groups[group]; + + ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width); +diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c +index 9ff6207..10de43c 100644 +--- a/drivers/pinctrl/pinctrl-u300.c ++++ b/drivers/pinctrl/pinctrl-u300.c +@@ -836,18 +836,14 @@ static const struct u300_pin_group u300_pin_groups[] = { + }, + }; + +-static int u300_list_groups(struct pinctrl_dev *pctldev, unsigned selector) ++static int u300_get_groups_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(u300_pin_groups)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(u300_pin_groups); + } + + static const char *u300_get_group_name(struct pinctrl_dev *pctldev, + unsigned selector) + { +- if (selector >= ARRAY_SIZE(u300_pin_groups)) +- return NULL; + return u300_pin_groups[selector].name; + } + +@@ -855,8 +851,6 @@ static int u300_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, + const unsigned **pins, + unsigned *num_pins) + { +- if (selector >= ARRAY_SIZE(u300_pin_groups)) +- return -EINVAL; + *pins = u300_pin_groups[selector].pins; + *num_pins = u300_pin_groups[selector].num_pins; + return 0; +@@ -869,7 +863,7 @@ static void u300_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, + } + + static struct pinctrl_ops u300_pctrl_ops = { +- .list_groups = u300_list_groups, ++ .get_groups_count = u300_get_groups_count, + .get_group_name = u300_get_group_name, + .get_group_pins = u300_get_group_pins, + .pin_dbg_show = u300_pin_dbg_show, +@@ -991,11 +985,9 @@ static void u300_pmx_disable(struct pinctrl_dev *pctldev, unsigned selector, + u300_pmx_endisable(upmx, selector, false); + } + +-static int u300_pmx_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) ++static int u300_pmx_get_funcs_count(struct pinctrl_dev *pctldev) + { +- if (selector >= ARRAY_SIZE(u300_pmx_functions)) +- return -EINVAL; +- return 0; ++ return ARRAY_SIZE(u300_pmx_functions); + } + + static const char *u300_pmx_get_func_name(struct pinctrl_dev *pctldev, +@@ -1014,7 +1006,7 @@ static int u300_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector, + } + + static struct pinmux_ops u300_pmx_ops = { +- .list_functions = u300_pmx_list_funcs, ++ .get_functions_count = u300_pmx_get_funcs_count, + .get_function_name = u300_pmx_get_func_name, + .get_function_groups = u300_pmx_get_groups, + .enable = u300_pmx_enable, +diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c +index 4e62783..375b214 100644 +--- a/drivers/pinctrl/pinmux.c ++++ b/drivers/pinctrl/pinmux.c +@@ -33,10 +33,11 @@ + int pinmux_check_ops(struct pinctrl_dev *pctldev) + { + const struct pinmux_ops *ops = pctldev->desc->pmxops; ++ unsigned nfuncs = ops->get_functions_count(pctldev); + unsigned selector = 0; + + /* Check that we implement required operations */ +- if (!ops->list_functions || ++ if (!ops->get_functions_count || + !ops->get_function_name || + !ops->get_function_groups || + !ops->enable || +@@ -44,7 +45,7 @@ int pinmux_check_ops(struct pinctrl_dev *pctldev) + return -EINVAL; + + /* Check that all functions registered have names */ +- while (ops->list_functions(pctldev, selector) >= 0) { ++ while (selector < nfuncs) { + const char *fname = ops->get_function_name(pctldev, + selector); + if (!fname) { +@@ -287,10 +288,11 @@ static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, + const char *function) + { + const struct pinmux_ops *ops = pctldev->desc->pmxops; ++ unsigned nfuncs = ops->get_functions_count(pctldev); + unsigned selector = 0; + + /* See if this pctldev has this function */ +- while (ops->list_functions(pctldev, selector) >= 0) { ++ while (selector < nfuncs) { + const char *fname = ops->get_function_name(pctldev, + selector); + +@@ -477,11 +479,12 @@ static int pinmux_functions_show(struct seq_file *s, void *what) + { + struct pinctrl_dev *pctldev = s->private; + const struct pinmux_ops *pmxops = pctldev->desc->pmxops; ++ unsigned nfuncs = pmxops->get_functions_count(pctldev); + unsigned func_selector = 0; + + mutex_lock(&pinctrl_mutex); + +- while (pmxops->list_functions(pctldev, func_selector) >= 0) { ++ while (func_selector < nfuncs) { + const char *func = pmxops->get_function_name(pctldev, + func_selector); + const char * const *groups; +diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h +index e162710..ba08516 100644 +--- a/include/linux/pinctrl/pinctrl.h ++++ b/include/linux/pinctrl/pinctrl.h +@@ -66,9 +66,7 @@ struct pinctrl_gpio_range { + /** + * struct pinctrl_ops - global pin control operations, to be implemented by + * pin controller drivers. +- * @list_groups: list the number of selectable named groups available +- * in this pinmux driver, the core will begin on 0 and call this +- * repeatedly as long as it returns >= 0 to enumerate the groups ++ * @get_groups_count: Returns the count of total number of groups registered. + * @get_group_name: return the group name of the pin group + * @get_group_pins: return an array of pins corresponding to a certain + * group selector @pins, and the size of the array in @num_pins +@@ -76,7 +74,7 @@ struct pinctrl_gpio_range { + * info for a certain pin in debugfs + */ + struct pinctrl_ops { +- int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector); ++ int (*get_groups_count) (struct pinctrl_dev *pctldev); + const char *(*get_group_name) (struct pinctrl_dev *pctldev, + unsigned selector); + int (*get_group_pins) (struct pinctrl_dev *pctldev, +diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h +index 47e9237..dd7bef6 100644 +--- a/include/linux/pinctrl/pinmux.h ++++ b/include/linux/pinctrl/pinmux.h +@@ -29,9 +29,8 @@ struct pinctrl_dev; + * is allowed to answer "no" by returning a negative error code + * @free: the reverse function of the request() callback, frees a pin after + * being requested +- * @list_functions: list the number of selectable named functions available +- * in this pinmux driver, the core will begin on 0 and call this +- * repeatedly as long as it returns >= 0 to enumerate mux settings ++ * @get_functions_count: returns number of selectable named functions available ++ * in this pinmux driver + * @get_function_name: return the function name of the muxing selector, + * called by the core to figure out which mux setting it shall map a + * certain device to +@@ -62,7 +61,7 @@ struct pinctrl_dev; + struct pinmux_ops { + int (*request) (struct pinctrl_dev *pctldev, unsigned offset); + int (*free) (struct pinctrl_dev *pctldev, unsigned offset); +- int (*list_functions) (struct pinctrl_dev *pctldev, unsigned selector); ++ int (*get_functions_count) (struct pinctrl_dev *pctldev); + const char *(*get_function_name) (struct pinctrl_dev *pctldev, + unsigned selector); + int (*get_function_groups) (struct pinctrl_dev *pctldev, +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0097-net-macb-GEM-DMA-configuration-register-update.patch b/patches.at91/0097-net-macb-GEM-DMA-configuration-register-update.patch deleted file mode 100644 index 2cfd5c29859c..000000000000 --- a/patches.at91/0097-net-macb-GEM-DMA-configuration-register-update.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 5d30336b8a420e0a8b24572d3fbc7458477e2a2e Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Wed, 19 Sep 2012 15:14:34 +0200 -Subject: net/macb: GEM DMA configuration register update - -Add information to the DMA Configuration Register to -maximize system performance: -- rx/tx packet buffer full memory size -- allow possibility to use INCR16 if supported - -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 10 ++++++++-- - drivers/net/ethernet/cadence/macb.h | 11 +++++++++++ - 2 files changed, 19 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 88a1d20..56bab3c 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -997,8 +997,12 @@ static u32 macb_dbw(struct macb *bp) - } - - /* -- * Configure the receive DMA engine to use the correct receive buffer size. -- * This is a configurable parameter for GEM. -+ * Configure the receive DMA engine -+ * - use the correct receive buffer size -+ * - set the possibility to use INCR16 bursts -+ * (if not supported by FIFO, it will fallback to default) -+ * - set both rx/tx packet buffers to full memory size -+ * These are configurable parameters for GEM. - */ - static void macb_configure_dma(struct macb *bp) - { -@@ -1007,6 +1011,8 @@ static void macb_configure_dma(struct macb *bp) - if (macb_is_gem(bp)) { - dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); - dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64); -+ dmacfg |= GEM_BF(FBLDO, 16); -+ dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); - gem_writel(bp, DMACFG, dmacfg); - } - } -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index bfab8ef..256559d 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -161,8 +161,19 @@ - #define GEM_DBW128 2 - - /* Bitfields in DMACFG. */ -+#define GEM_FBLDO_OFFSET 0 -+#define GEM_FBLDO_SIZE 5 -+#define GEM_RXBMS_OFFSET 8 -+#define GEM_RXBMS_SIZE 2 -+#define GEM_TXPBMS_OFFSET 10 -+#define GEM_TXPBMS_SIZE 1 -+#define GEM_TXCOEN_OFFSET 11 -+#define GEM_TXCOEN_SIZE 1 - #define GEM_RXBS_OFFSET 16 - #define GEM_RXBS_SIZE 8 -+#define GEM_DDRP_OFFSET 24 -+#define GEM_DDRP_SIZE 1 -+ - - /* Bitfields in NSR */ - #define MACB_NSR_LINK_OFFSET 0 --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0097-pinctrl-show-pin-name-when-request-pins.patch b/patches.at91/0097-pinctrl-show-pin-name-when-request-pins.patch new file mode 100644 index 000000000000..cb5279bd7d44 --- /dev/null +++ b/patches.at91/0097-pinctrl-show-pin-name-when-request-pins.patch @@ -0,0 +1,42 @@ +From 063384f9528680eae1564f69f66bbb240c6398ea Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Tue, 17 Apr 2012 15:00:45 +0800 +Subject: pinctrl: show pin name when request pins + +commit d0bd8df56ebffe4a5ca42e27aca2a1243c70ed53 upstream. + +Pin name is more useful to users. + +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/pinmux.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c +index 375b214..d6f6823 100644 +--- a/drivers/pinctrl/pinmux.c ++++ b/drivers/pinctrl/pinmux.c +@@ -86,8 +86,6 @@ static int pin_request(struct pinctrl_dev *pctldev, + const struct pinmux_ops *ops = pctldev->desc->pmxops; + int status = -EINVAL; + +- dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); +- + desc = pin_desc_get(pctldev, pin); + if (desc == NULL) { + dev_err(pctldev->dev, +@@ -95,6 +93,9 @@ static int pin_request(struct pinctrl_dev *pctldev, + goto out; + } + ++ dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", ++ pin, desc->name, owner); ++ + if (gpio_range) { + /* There's no need to support multiple GPIO requests */ + if (desc->gpio_owner) { +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0098-net-macb-Use-non-coherent-memory-for-rx-buffers.patch b/patches.at91/0098-net-macb-Use-non-coherent-memory-for-rx-buffers.patch deleted file mode 100644 index 19fb2b0a74ab..000000000000 --- a/patches.at91/0098-net-macb-Use-non-coherent-memory-for-rx-buffers.patch +++ /dev/null @@ -1,378 +0,0 @@ -From d753b91290e2caf097dcb0d216710fcce4208327 Mon Sep 17 00:00:00 2001 -From: Havard Skinnemoen -Date: Tue, 24 Mar 2009 10:45:19 +0100 -Subject: net/macb: Use non-coherent memory for rx buffers - -Allocate regular pages to use as backing for the RX ring and use the -DMA API to sync the caches. This should give a bit better performance -since it allows the CPU to do burst transfers from memory. It is also -a necessary step on the way to reduce the amount of copying done by -the driver. - -Signed-off-by: Havard Skinnemoen -[nicolas.ferre@atmel.com: adapt to newer kernel] -Signed-off-by: Nicolas Ferre ---- - drivers/net/ethernet/cadence/macb.c | 206 +++++++++++++++++++++++------------- - drivers/net/ethernet/cadence/macb.h | 20 +++- - 2 files changed, 148 insertions(+), 78 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index 56bab3c..e3168bf 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -10,6 +10,7 @@ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - #include -+#include - #include - #include - #include -@@ -32,6 +33,8 @@ - #define RX_BUFFER_SIZE 128 - #define RX_RING_SIZE 512 - #define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) -+#define RX_BUFFERS_PER_PAGE (PAGE_SIZE / RX_BUFFER_SIZE) -+#define RX_RING_PAGES (RX_RING_SIZE / RX_BUFFERS_PER_PAGE) - - #define TX_RING_SIZE 128 - #define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) -@@ -92,9 +95,16 @@ static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index) - return &bp->rx_ring[macb_rx_ring_wrap(index)]; - } - --static void *macb_rx_buffer(struct macb *bp, unsigned int index) -+static struct macb_rx_page *macb_rx_page(struct macb *bp, unsigned int index) - { -- return bp->rx_buffers + RX_BUFFER_SIZE * macb_rx_ring_wrap(index); -+ unsigned int entry = macb_rx_ring_wrap(index); -+ -+ return &bp->rx_page[entry / RX_BUFFERS_PER_PAGE]; -+} -+ -+static unsigned int macb_rx_page_offset(struct macb *bp, unsigned int index) -+{ -+ return (index % RX_BUFFERS_PER_PAGE) * RX_BUFFER_SIZE; - } - - static void __macb_set_hwaddr(struct macb *bp) -@@ -492,11 +502,15 @@ static void macb_tx_interrupt(struct macb *bp) - static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - unsigned int last_frag) - { -- unsigned int len; -- unsigned int frag; -- unsigned int offset; -- struct sk_buff *skb; -- struct macb_dma_desc *desc; -+ unsigned int len; -+ unsigned int frag; -+ unsigned int skb_offset; -+ unsigned int pg_offset; -+ struct macb_rx_page *rx_page; -+ dma_addr_t phys; -+ void *buf; -+ struct sk_buff *skb; -+ struct macb_dma_desc *desc; - - desc = macb_rx_desc(bp, last_frag); - len = MACB_BFEXT(RX_FRMLEN, desc->ctrl); -@@ -530,7 +544,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - return 1; - } - -- offset = 0; -+ skb_offset = 0; - len += NET_IP_ALIGN; - skb_checksum_none_assert(skb); - skb_put(skb, len); -@@ -538,13 +552,28 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, - for (frag = first_frag; ; frag++) { - unsigned int frag_len = RX_BUFFER_SIZE; - -- if (offset + frag_len > len) { -+ if (skb_offset + frag_len > len) { - BUG_ON(frag != last_frag); -- frag_len = len - offset; -+ frag_len = len - skb_offset; - } -- skb_copy_to_linear_data_offset(skb, offset, -- macb_rx_buffer(bp, frag), frag_len); -- offset += RX_BUFFER_SIZE; -+ -+ rx_page = macb_rx_page(bp, frag); -+ pg_offset = macb_rx_page_offset(bp, frag); -+ phys = rx_page->phys; -+ -+ dma_sync_single_range_for_cpu(&bp->pdev->dev, phys, -+ pg_offset, frag_len, DMA_FROM_DEVICE); -+ -+ buf = kmap_atomic(rx_page->page); -+ skb_copy_to_linear_data_offset(skb, skb_offset, -+ buf + pg_offset, frag_len); -+ kunmap_atomic(buf); -+ -+ skb_offset += frag_len; -+ -+ dma_sync_single_range_for_device(&bp->pdev->dev, phys, -+ pg_offset, frag_len, DMA_FROM_DEVICE); -+ - desc = macb_rx_desc(bp, frag); - desc->addr &= ~MACB_BIT(RX_USED); - -@@ -824,86 +853,90 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) - return NETDEV_TX_OK; - } - --static void macb_free_consistent(struct macb *bp) -+static void macb_free_rings(struct macb *bp) - { -- if (bp->tx_skb) { -- kfree(bp->tx_skb); -- bp->tx_skb = NULL; -- } -- if (bp->rx_ring) { -- dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES, -- bp->rx_ring, bp->rx_ring_dma); -- bp->rx_ring = NULL; -- } -- if (bp->tx_ring) { -- dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES, -- bp->tx_ring, bp->tx_ring_dma); -- bp->tx_ring = NULL; -- } -- if (bp->rx_buffers) { -- dma_free_coherent(&bp->pdev->dev, -- RX_RING_SIZE * RX_BUFFER_SIZE, -- bp->rx_buffers, bp->rx_buffers_dma); -- bp->rx_buffers = NULL; -+ int i; -+ -+ for (i = 0; i < RX_RING_PAGES; i++) { -+ struct macb_rx_page *rx_page = &bp->rx_page[i]; -+ -+ if (!rx_page->page) -+ continue; -+ -+ dma_unmap_page(&bp->pdev->dev, rx_page->phys, -+ PAGE_SIZE, DMA_FROM_DEVICE); -+ put_page(rx_page->page); -+ rx_page->page = NULL; - } -+ -+ kfree(bp->tx_skb); -+ kfree(bp->rx_page); -+ dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES, bp->tx_ring, -+ bp->tx_ring_dma); -+ dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES, bp->rx_ring, -+ bp->rx_ring_dma); - } - --static int macb_alloc_consistent(struct macb *bp) -+static int macb_init_rings(struct macb *bp) - { -- int size; -+ struct page *page; -+ dma_addr_t phys; -+ unsigned int page_idx; -+ unsigned int ring_idx; -+ unsigned int i; - -- size = TX_RING_SIZE * sizeof(struct macb_tx_skb); -- bp->tx_skb = kmalloc(size, GFP_KERNEL); -- if (!bp->tx_skb) -- goto out_err; -- -- size = RX_RING_BYTES; -- bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size, -+ bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, RX_RING_BYTES, - &bp->rx_ring_dma, GFP_KERNEL); - if (!bp->rx_ring) -- goto out_err; -+ goto err_alloc_rx_ring; -+ - netdev_dbg(bp->dev, - "Allocated RX ring of %d bytes at %08lx (mapped %p)\n", -- size, (unsigned long)bp->rx_ring_dma, bp->rx_ring); -+ RX_RING_BYTES, (unsigned long)bp->rx_ring_dma, bp->rx_ring); - -- size = TX_RING_BYTES; -- bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, -+ bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, TX_RING_BYTES, - &bp->tx_ring_dma, GFP_KERNEL); - if (!bp->tx_ring) -- goto out_err; -- netdev_dbg(bp->dev, -- "Allocated TX ring of %d bytes at %08lx (mapped %p)\n", -- size, (unsigned long)bp->tx_ring_dma, bp->tx_ring); -- -- size = RX_RING_SIZE * RX_BUFFER_SIZE; -- bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, -- &bp->rx_buffers_dma, GFP_KERNEL); -- if (!bp->rx_buffers) -- goto out_err; -+ goto err_alloc_tx_ring; -+ - netdev_dbg(bp->dev, -- "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", -- size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); -+ "Allocated TX ring of %d bytes at 0x%08lx (mapped %p)\n", -+ TX_RING_BYTES, (unsigned long)bp->tx_ring_dma, bp->tx_ring); - -- return 0; -+ bp->rx_page = kcalloc(RX_RING_PAGES, sizeof(struct macb_rx_page), -+ GFP_KERNEL); -+ if (!bp->rx_page) -+ goto err_alloc_rx_page; - --out_err: -- macb_free_consistent(bp); -- return -ENOMEM; --} -+ bp->tx_skb = kcalloc(TX_RING_SIZE, sizeof(struct macb_tx_skb), -+ GFP_KERNEL); -+ if (!bp->tx_skb) -+ goto err_alloc_tx_skb; - --static void macb_init_rings(struct macb *bp) --{ -- int i; -- dma_addr_t addr; -+ for (page_idx = 0, ring_idx = 0; page_idx < RX_RING_PAGES; page_idx++) { -+ page = alloc_page(GFP_KERNEL); -+ if (!page) -+ goto err_alloc_page; -+ -+ phys = dma_map_page(&bp->pdev->dev, page, 0, PAGE_SIZE, -+ DMA_FROM_DEVICE); -+ if (dma_mapping_error(&bp->pdev->dev, phys)) -+ goto err_map_page; -+ -+ bp->rx_page[page_idx].page = page; -+ bp->rx_page[page_idx].phys = phys; - -- addr = bp->rx_buffers_dma; -- for (i = 0; i < RX_RING_SIZE; i++) { -- bp->rx_ring[i].addr = addr; -- bp->rx_ring[i].ctrl = 0; -- addr += RX_BUFFER_SIZE; -+ for (i = 0; i < RX_BUFFERS_PER_PAGE; i++, ring_idx++) { -+ bp->rx_ring[ring_idx].addr = phys; -+ bp->rx_ring[ring_idx].ctrl = 0; -+ phys += RX_BUFFER_SIZE; -+ } - } - bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP); - -+ netdev_dbg(bp->dev, "Allocated %u RX buffers (%lu pages)\n", -+ RX_RING_SIZE, RX_RING_PAGES); -+ - for (i = 0; i < TX_RING_SIZE; i++) { - bp->tx_ring[i].addr = 0; - bp->tx_ring[i].ctrl = MACB_BIT(TX_USED); -@@ -911,6 +944,28 @@ static void macb_init_rings(struct macb *bp) - bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); - - bp->rx_tail = bp->tx_head = bp->tx_tail = 0; -+ -+ return 0; -+ -+err_map_page: -+ __free_page(page); -+err_alloc_page: -+ while (page_idx--) { -+ dma_unmap_page(&bp->pdev->dev, bp->rx_page[page_idx].phys, -+ PAGE_SIZE, DMA_FROM_DEVICE); -+ __free_page(bp->rx_page[page_idx].page); -+ } -+ kfree(bp->tx_skb); -+err_alloc_tx_skb: -+ kfree(bp->rx_page); -+err_alloc_rx_page: -+ dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES, bp->tx_ring, -+ bp->tx_ring_dma); -+err_alloc_tx_ring: -+ dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES, bp->rx_ring, -+ bp->rx_ring_dma); -+err_alloc_rx_ring: -+ return -ENOMEM; - } - - static void macb_reset_hw(struct macb *bp) -@@ -1185,16 +1240,15 @@ static int macb_open(struct net_device *dev) - if (!is_valid_ether_addr(dev->dev_addr)) - return -EADDRNOTAVAIL; - -- err = macb_alloc_consistent(bp); -+ err = macb_init_rings(bp); - if (err) { -- netdev_err(dev, "Unable to allocate DMA memory (error %d)\n", -+ netdev_err(dev, "Unable to allocate DMA rings (error %d)\n", - err); - return err; - } - - napi_enable(&bp->napi); - -- macb_init_rings(bp); - macb_init_hw(bp); - - /* schedule a link state check */ -@@ -1221,7 +1275,7 @@ static int macb_close(struct net_device *dev) - netif_carrier_off(dev); - spin_unlock_irqrestore(&bp->lock, flags); - -- macb_free_consistent(bp); -+ macb_free_rings(bp); - - return 0; - } -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index 256559d..01aecea 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -441,6 +441,23 @@ struct macb_dma_desc { - #define MACB_TX_USED_SIZE 1 - - /** -+ * struct macb_rx_page - data associated with a page used as RX buffers -+ * @page: Physical page used as storage for the buffers -+ * @phys: DMA address of the page -+ * -+ * Each page is used to provide %MACB_RX_BUFFERS_PER_PAGE RX buffers. -+ * The page gets an initial reference when it is inserted into the -+ * ring, and an additional reference each time it is passed up the -+ * stack as a fragment. When all the buffers have been used, we drop -+ * the initial reference and allocate a new page. Any additional -+ * references are dropped when the higher layers free the skb. -+ */ -+struct macb_rx_page { -+ struct page *page; -+ dma_addr_t phys; -+}; -+ -+/** - * struct macb_tx_skb - data about an skb which is being transmitted - * @skb: skb currently being transmitted - * @mapping: DMA address of the skb's data buffer -@@ -531,7 +548,7 @@ struct macb { - - unsigned int rx_tail; - struct macb_dma_desc *rx_ring; -- void *rx_buffers; -+ struct macb_rx_page *rx_page; - - unsigned int tx_head, tx_tail; - struct macb_dma_desc *tx_ring; -@@ -552,7 +569,6 @@ struct macb { - - dma_addr_t rx_ring_dma; - dma_addr_t tx_ring_dma; -- dma_addr_t rx_buffers_dma; - - struct mii_bus *mii_bus; - struct phy_device *phy_dev; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0098-pinctrl-show-pin-name-for-pingroups-in-sysfs.patch b/patches.at91/0098-pinctrl-show-pin-name-for-pingroups-in-sysfs.patch new file mode 100644 index 000000000000..d62b4c381440 --- /dev/null +++ b/patches.at91/0098-pinctrl-show-pin-name-for-pingroups-in-sysfs.patch @@ -0,0 +1,108 @@ +From 98e0834df26052480b71e183d23b6cc38d51d7a0 Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Tue, 17 Apr 2012 15:00:46 +0800 +Subject: pinctrl: show pin name for pingroups in sysfs + +commit dcb5dbc305b975cccf40942feba40964069541d3 upstream. + +Pin name is more useful to users. + +After change, when cat pingroups in sysfs, it becomes: +root@freescale /sys/kernel/debug/pinctrl/20e0000.iomuxc$ cat pingroups +registered pin groups: +group: uart4grp-1 +pin 219 (MX6Q_PAD_KEY_ROW0) +pin 218 (MX6Q_PAD_KEY_COL0) + +group: usdhc4grp-1 +pin 305 (MX6Q_PAD_SD4_CMD) +pin 306 (MX6Q_PAD_SD4_CLK) +pin 315 (MX6Q_PAD_SD4_DAT0) +pin 316 (MX6Q_PAD_SD4_DAT1) +pin 317 (MX6Q_PAD_SD4_DAT2) +pin 318 (MX6Q_PAD_SD4_DAT3) +pin 319 (MX6Q_PAD_SD4_DAT4) +pin 320 (MX6Q_PAD_SD4_DAT5) +pin 321 (MX6Q_PAD_SD4_DAT6) +pin 322 (MX6Q_PAD_SD4_DAT7) + +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/core.c | 32 ++++++++++++++++++++++++++++---- + drivers/pinctrl/core.h | 1 + + 2 files changed, 29 insertions(+), 4 deletions(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index c70ae2d..5f8a7d2 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -141,6 +141,25 @@ int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) + } + + /** ++ * pin_get_name_from_id() - look up a pin name from a pin id ++ * @pctldev: the pin control device to lookup the pin on ++ * @name: the name of the pin to look up ++ */ ++const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) ++{ ++ const struct pin_desc *desc; ++ ++ desc = pin_desc_get(pctldev, pin); ++ if (desc == NULL) { ++ dev_err(pctldev->dev, "failed to get pin(%d) name\n", ++ pin); ++ return NULL; ++ } ++ ++ return desc->name; ++} ++ ++/** + * pin_is_valid() - check if pin exists on controller + * @pctldev: the pin control device to check the pin on + * @pin: pin to check, use the local pin controller index number +@@ -1034,6 +1053,7 @@ static int pinctrl_groups_show(struct seq_file *s, void *what) + const unsigned *pins; + unsigned num_pins; + const char *gname = ops->get_group_name(pctldev, selector); ++ const char *pname; + int ret; + int i; + +@@ -1043,10 +1063,14 @@ static int pinctrl_groups_show(struct seq_file *s, void *what) + seq_printf(s, "%s [ERROR GETTING PINS]\n", + gname); + else { +- seq_printf(s, "group: %s, pins = [ ", gname); +- for (i = 0; i < num_pins; i++) +- seq_printf(s, "%d ", pins[i]); +- seq_puts(s, "]\n"); ++ seq_printf(s, "group: %s\n", gname); ++ for (i = 0; i < num_pins; i++) { ++ pname = pin_get_name(pctldev, pins[i]); ++ if (WARN_ON(!pname)) ++ return -EINVAL; ++ seq_printf(s, "pin %d (%s)\n", pins[i], pname); ++ } ++ seq_puts(s, "\n"); + } + selector++; + } +diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h +index 98ae808..1f40ff6 100644 +--- a/drivers/pinctrl/core.h ++++ b/drivers/pinctrl/core.h +@@ -148,6 +148,7 @@ struct pin_desc { + + struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name); + int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name); ++const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin); + int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, + const char *pin_group); + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0099-dt-add-of_get_child_count-helper-function.patch b/patches.at91/0099-dt-add-of_get_child_count-helper-function.patch new file mode 100644 index 000000000000..1c6d1c7717f2 --- /dev/null +++ b/patches.at91/0099-dt-add-of_get_child_count-helper-function.patch @@ -0,0 +1,51 @@ +From c71effdb46261af0b8304ed628c0f2d97e9b56d6 Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Fri, 27 Apr 2012 11:36:20 +0800 +Subject: dt: add of_get_child_count helper function + +commit 183f1d0c6450ee032d97a2d01ed5eb00e0dbaa49 upstream. + +Currently most code to get child count in kernel are almost same, +add a helper to implement this function for dt to use. + +Cc: Grant Likely +Acked-by: Rob Herring +Acked-by: Stephen Warren +Signed-off-by: Dong Aisheng +Signed-off-by: Linus Walleij +--- + include/linux/of.h | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/include/linux/of.h ++++ b/include/linux/of.h +@@ -194,6 +194,17 @@ extern struct device_node *of_get_next_c + for (child = of_get_next_child(parent, NULL); child != NULL; \ + child = of_get_next_child(parent, child)) + ++static inline int of_get_child_count(const struct device_node *np) ++{ ++ struct device_node *child; ++ int num = 0; ++ ++ for_each_child_of_node(np, child) ++ num++; ++ ++ return num; ++} ++ + extern struct device_node *of_find_node_with_property( + struct device_node *from, const char *prop_name); + #define for_each_node_with_property(dn, prop_name) \ +@@ -306,6 +317,11 @@ static inline bool of_have_populated_dt( + #define for_each_child_of_node(parent, child) \ + while (0) + ++static inline int of_get_child_count(const struct device_node *np) ++{ ++ return 0; ++} ++ + static inline int of_device_is_compatible(const struct device_node *device, + const char *name) + { diff --git a/patches.at91/0099-phy-micrel-Use-proper-phy-in-gmac.patch b/patches.at91/0099-phy-micrel-Use-proper-phy-in-gmac.patch deleted file mode 100644 index 2c1d4bb38c47..000000000000 --- a/patches.at91/0099-phy-micrel-Use-proper-phy-in-gmac.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 0a488fbfdd0525849b8a67cc8158523643aaba7e Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Tue, 26 Jun 2012 11:07:32 +0200 -Subject: phy/micrel: Use proper phy in gmac - -Signed-off-by: Nicolas Ferre ---- - drivers/net/phy/micrel.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c -index 590f902..cc7f75b 100644 ---- a/drivers/net/phy/micrel.c -+++ b/drivers/net/phy/micrel.c -@@ -191,6 +191,7 @@ static int __init ksphy_init(void) - { - int ret; - -+#if 0 - ret = phy_driver_register(&ks8001_driver); - if (ret) - goto err1; -@@ -208,9 +209,15 @@ static int __init ksphy_init(void) - ret = phy_driver_register(&ks8051_driver); - if (ret) - goto err5; -+#endif -+ -+ ret = phy_driver_register(&ksz9021_driver); -+ if (ret) -+ goto err1; - - return 0; - -+#if 0 - err5: - phy_driver_unregister(&ks8041_driver); - err4: -@@ -219,6 +226,7 @@ err3: - phy_driver_unregister(&ksz9021_driver); - err2: - phy_driver_unregister(&ks8001_driver); -+#endif - err1: - return ret; - } --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0100-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch b/patches.at91/0100-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch new file mode 100644 index 000000000000..3c7309c8b431 --- /dev/null +++ b/patches.at91/0100-MTD-atmel_nand-add-9x5-to-list-of-SoC-with-DMA.patch @@ -0,0 +1,28 @@ +From 8eaef7cd81925116f062014a50057edf8b24ebc3 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Mon, 24 Sep 2012 14:57:08 +0200 +Subject: MTD: atmel_nand: add 9x5 to list of SoC with DMA + +Temporary: may have to be replaced by a device-tree property. + +Signed-off-by: Nicolas Ferre +--- + drivers/mtd/nand/atmel_nand.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index b5e5a76..a1b5468 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -127,7 +127,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo; + + static int cpu_has_dma(void) + { +- return cpu_is_at91sam9rl() || cpu_is_at91sam9g45(); ++ return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() || cpu_is_at91sam9x5(); + } + + /* +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0100-phy-micrel-we-need-to-register-ks8051-phy-for-emac.patch b/patches.at91/0100-phy-micrel-we-need-to-register-ks8051-phy-for-emac.patch deleted file mode 100644 index 32d46d482232..000000000000 --- a/patches.at91/0100-phy-micrel-we-need-to-register-ks8051-phy-for-emac.patch +++ /dev/null @@ -1,39 +0,0 @@ -From db4349884ad9dd53c6a3e866aefd00a78532907f Mon Sep 17 00:00:00 2001 -From: Ludovic Desroches -Date: Tue, 10 Jul 2012 12:03:54 +0200 -Subject: phy/micrel: we need to register ks8051 phy for emac - -Signed-off-by: Ludovic Desroches ---- - drivers/net/phy/micrel.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c -index cc7f75b..2d80e01 100644 ---- a/drivers/net/phy/micrel.c -+++ b/drivers/net/phy/micrel.c -@@ -206,10 +206,10 @@ static int __init ksphy_init(void) - ret = phy_driver_register(&ks8041_driver); - if (ret) - goto err4; -+#endif - ret = phy_driver_register(&ks8051_driver); - if (ret) -- goto err5; --#endif -+ goto err2; - - ret = phy_driver_register(&ksz9021_driver); - if (ret) -@@ -227,6 +227,8 @@ err3: - err2: - phy_driver_unregister(&ks8001_driver); - #endif -+err2: -+ phy_driver_unregister(&ks8051_driver); - err1: - return ret; - } --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0101-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch b/patches.at91/0101-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch new file mode 100644 index 000000000000..e24f8a398a98 --- /dev/null +++ b/patches.at91/0101-MTD-atmel_nand-POI-fall-back-is-not-an-issue-change-.patch @@ -0,0 +1,26 @@ +From 7e46312721b0ed2c4a893b2b38cca0fcd39c1cc5 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Mon, 24 Sep 2012 15:07:06 +0200 +Subject: MTD: atmel_nand: POI fall back is not an issue: change log + +Signed-off-by: Nicolas Ferre +--- + drivers/mtd/nand/atmel_nand.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index a1b5468..cacccba 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -281,7 +281,7 @@ err_dma: + dma_unmap_single(dma_dev->dev, phys_addr, len, dir); + err_buf: + if (err != 0) +- dev_warn(host->dev, "Fall back to CPU I/O\n"); ++ dev_dbg(host->dev, "Fall back to CPU I/O\n"); + return err; + } + +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0101-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch b/patches.at91/0101-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch deleted file mode 100644 index b28e71bae404..000000000000 --- a/patches.at91/0101-usb-gadget-at91_udc-move-the-dereference-below-the-N.patch +++ /dev/null @@ -1,40 +0,0 @@ -From ae50ff05ab833b25bb7d581dd0beaeec1ab830da Mon Sep 17 00:00:00 2001 -From: Wei Yongjun -Date: Fri, 7 Sep 2012 14:54:25 +0800 -Subject: usb: gadget: at91_udc: move the dereference below the NULL test - -The dereference should be moved below the NULL test. - -spatch with a semantic match is used to found this. -(http://coccinelle.lip6.fr/) - -Signed-off-by: Wei Yongjun -Signed-off-by: Felipe Balbi ---- - drivers/usb/gadget/at91_udc.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c -index 9d7bcd9..d6249f0 100644 ---- a/drivers/usb/gadget/at91_udc.c -+++ b/drivers/usb/gadget/at91_udc.c -@@ -469,7 +469,7 @@ static int at91_ep_enable(struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) - { - struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); -- struct at91_udc *udc = ep->udc; -+ struct at91_udc *udc; - u16 maxpacket; - u32 tmp; - unsigned long flags; -@@ -484,6 +484,7 @@ static int at91_ep_enable(struct usb_ep *_ep, - return -EINVAL; - } - -+ udc = ep->udc; - if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { - DBG("bogus device state\n"); - return -ESHUTDOWN; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0102-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch b/patches.at91/0102-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch new file mode 100644 index 000000000000..6cc9cf8a1254 --- /dev/null +++ b/patches.at91/0102-MTD-atmel_nand-add-9n12-to-list-of-SoC-with-DMA.patch @@ -0,0 +1,29 @@ +From bfa303b459025a62eae939042183bb3b78fe5107 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Mon, 8 Oct 2012 16:55:29 +0200 +Subject: MTD: atmel_nand: add 9n12 to list of SoC with DMA + +Temporary: may have to be replaced by a device-tree property. + +Signed-off-by: Nicolas Ferre +--- + drivers/mtd/nand/atmel_nand.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c +index cacccba..a92f603 100644 +--- a/drivers/mtd/nand/atmel_nand.c ++++ b/drivers/mtd/nand/atmel_nand.c +@@ -127,7 +127,8 @@ static struct nand_ecclayout atmel_pmecc_oobinfo; + + static int cpu_has_dma(void) + { +- return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() || cpu_is_at91sam9x5(); ++ return cpu_is_at91sam9rl() || cpu_is_at91sam9g45() ++ || cpu_is_at91sam9x5() || cpu_is_at91sam9n12(); + } + + /* +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0103-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch b/patches.at91/0103-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch deleted file mode 100644 index 4f7467a03a8c..000000000000 --- a/patches.at91/0103-USB-ohci-at91-fix-PIO-handling-in-relation-with-numb.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 42e76043636c925fe4de3223092e587d12a1be2a Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Wed, 29 Aug 2012 11:49:18 +0200 -Subject: USB: ohci-at91: fix PIO handling in relation with number of ports - -If the number of ports present on the SoC/board is not the maximum -and that the platform data is not filled with all data, there is -an easy way to mess the PIO setup for this interface. -This quick fix addresses mis-configuration in USB host platform data -that is common in at91 boards since commit 0ee6d1e (USB: ohci-at91: -change maximum number of ports) that did not modified the associatd -board files. - -Reported-by: Klaus Falkner -Signed-off-by: Nicolas Ferre -Cc: Stable [3.4+] -Acked-by: Alan Stern -Signed-off-by: Greg Kroah-Hartman ---- - drivers/usb/host/ohci-at91.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/usb/host/ohci-at91.c -+++ b/drivers/usb/host/ohci-at91.c -@@ -647,6 +647,16 @@ static int __devexit ohci_hcd_at91_drv_r - - if (pdata) { - at91_for_each_port(i) { -+ /* -+ * do not configure PIO if not in relation with -+ * real USB port on board -+ */ -+ if (i >= pdata->ports) { -+ pdata->vbus_pin[i] = -EINVAL; -+ pdata->overcurrent_pin[i] = -EINVAL; -+ break; -+ } -+ - if (!gpio_is_valid(pdata->vbus_pin[i])) - continue; - ohci_at91_usb_set_power(pdata, i, 0); diff --git a/patches.at91/0103-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch b/patches.at91/0103-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch new file mode 100644 index 000000000000..059f6d5ce0b4 --- /dev/null +++ b/patches.at91/0103-input-atmel_tsadcc-add-support-for-ARCH_AT91SAM9X5.patch @@ -0,0 +1,392 @@ +From 1fe1424112c1385a4f3b89fb8944150692279ba9 Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Wed, 17 Nov 2010 12:28:13 +0100 +Subject: input: atmel_tsadcc: add support for ARCH_AT91SAM9X5 + +XXX: split header creation in a new patch (or don't do it) + +Signed-off-by: Josh Wu +--- + drivers/input/touchscreen/atmel_tsadcc.c | 150 ++++++++++++---------------- + drivers/input/touchscreen/atmel_tsadcc.h | 162 +++++++++++++++++++++++++++++++ + 2 files changed, 222 insertions(+), 90 deletions(-) + create mode 100644 drivers/input/touchscreen/atmel_tsadcc.h + +diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c +index 201b2d2..a0e8d52 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.c ++++ b/drivers/input/touchscreen/atmel_tsadcc.c +@@ -25,74 +25,9 @@ + #include + #include + +-/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */ +- +-#define ATMEL_TSADCC_CR 0x00 /* Control register */ +-#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/ +-#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */ +- +-#define ATMEL_TSADCC_MR 0x04 /* Mode register */ +-#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */ +-#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */ +-#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */ +-#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ +-#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ +-#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ +-#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ +-#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ +-#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ +-#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */ +-#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */ +-#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */ +- +-#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */ +-#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */ +-#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0) +-#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0) +-#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0) +-#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0) +-#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0) +-#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0) +-#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0) +-#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */ +- +-#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */ +-#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */ +-#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */ +- +-#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */ +-#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */ +-#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */ +-#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */ +- +-#define ATMEL_TSADCC_SR 0x1C /* Status register */ +-#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */ +-#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */ +-#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */ +-#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */ +-#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */ +-#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */ +-#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */ +-#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */ +- +-#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */ +-#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */ +- +-#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */ +-#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */ +-#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */ +-#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */ +-#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */ +-#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */ +-#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */ +-#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */ +-#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */ +- +-#define ATMEL_TSADCC_XPOS 0x50 +-#define ATMEL_TSADCC_Z1DAT 0x54 +-#define ATMEL_TSADCC_Z2DAT 0x58 +- +-#define PRESCALER_VAL(x) ((x) >> 8) ++#include "atmel_tsadcc.h" ++ ++#define cpu_has_9x5_adc() (cpu_is_at91sam9x5()) + + #define ADC_DEFAULT_CLOCK 100000 + +@@ -124,12 +59,17 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + + if (status & ATMEL_TSADCC_NOCNT) { + /* Contact lost */ +- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; +- +- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); ++ if (cpu_has_9x5_adc()) { ++ /* 9X5 using TSMR to set PENDBC time */ ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ATMEL_TSADCC_PENDBC; ++ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); ++ } else { ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; ++ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); ++ } + atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); + atmel_tsadcc_write(ATMEL_TSADCC_IDR, +- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); ++ ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); + atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); + + input_report_key(input_dev, BTN_TOUCH, 0); +@@ -138,23 +78,31 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + + } else if (status & ATMEL_TSADCC_PENCNT) { + /* Pen detected */ +- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR); +- reg &= ~ATMEL_TSADCC_PENDBC; ++ if (cpu_has_9x5_adc()) { ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR); ++ reg &= ~ATMEL_TSADCC_PENDBC; ++ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); ++ } else { ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR); ++ reg &= ~ATMEL_TSADCC_PENDBC; ++ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); ++ } + + atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT); +- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); + atmel_tsadcc_write(ATMEL_TSADCC_IER, +- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); ++ ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); + atmel_tsadcc_write(ATMEL_TSADCC_TRGR, + ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16)); + +- } else if (status & ATMEL_TSADCC_EOC(3)) { ++ } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { + /* Conversion finished */ + + if (ts_dev->bufferedmeasure) { + /* Last measurement is always discarded, since it can + * be erroneous. + * Always report previous measurement */ ++ dev_dbg(&input_dev->dev, "x = %d, y = %d\n", ++ ts_dev->prev_absx, ts_dev->prev_absy); + input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); + input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); + input_report_key(input_dev, BTN_TOUCH, 1); +@@ -163,11 +111,16 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + ts_dev->bufferedmeasure = 1; + + /* Now make new measurement */ +- ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; +- ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); +- +- ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; +- ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); ++ if (cpu_has_9x5_adc()) { ++ ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; ++ ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; ++ } else { ++ ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; ++ ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); ++ ++ ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; ++ ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); ++ } + } + + return IRQ_HANDLED; +@@ -284,18 +237,35 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + + dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc); + +- reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | +- ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */ +- ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */ +- (prsc << 8) | +- ((0x26 << 16) & ATMEL_TSADCC_STARTUP) | +- ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); ++ if (cpu_has_9x5_adc()) { ++ reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ ++ (prsc << 8) | ++ ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | ++ ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); ++ } else { ++ reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | ++ ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */ ++ ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */ ++ (prsc << 8) | ++ ((0x26 << 16) & ATMEL_TSADCC_STARTUP) | ++ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); ++ } + + atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST); + atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); + atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); +- atmel_tsadcc_write(ATMEL_TSADCC_TSR, +- (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); ++ ++ if (cpu_has_9x5_adc()) { ++ atmel_tsadcc_write(ATMEL_TSADCC_TSMR, ++ ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS | ++ ATMEL_TSADCC_NOTSDMA | ++ ATMEL_TSADCC_PENDET_ENA | ++ (pdata->pendet_debounce << 28) | ++ (0x0 << 8)); ++ } else { ++ atmel_tsadcc_write(ATMEL_TSADCC_TSR, ++ (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); ++ } + + atmel_tsadcc_read(ATMEL_TSADCC_SR); + atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); +diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h +new file mode 100644 +index 0000000..5918c20 +--- /dev/null ++++ b/drivers/input/touchscreen/atmel_tsadcc.h +@@ -0,0 +1,162 @@ ++/* ++ * Header file for AT91/AT32 ADC + touchscreen Controller ++ * ++ * Data structure and register user interface ++ * ++ * Copyright (C) 2010 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef __ATMEL_TSADCC_H__ ++#define __ATMEL_TSADCC_H__ ++ ++/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */ ++#define ATMEL_TSADCC_CR 0x00 /* Control register */ ++#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/ ++#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */ ++ ++#define ATMEL_TSADCC_MR 0x04 /* Mode register */ ++#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */ ++#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */ ++#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */ ++#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ ++#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ ++#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ ++#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ ++#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ ++#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ ++#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */ ++#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */ ++#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */ ++ ++#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */ ++#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */ ++#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0) ++#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0) ++#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0) ++#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0) ++#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0) ++#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0) ++#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0) ++#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */ ++ ++#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */ ++#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */ ++#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */ ++ ++#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */ ++#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */ ++#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */ ++#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */ ++ ++#define ATMEL_TSADCC_SR 0x1C /* Status register */ ++#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */ ++#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */ ++#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */ ++#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */ ++#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */ ++#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */ ++#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */ ++#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */ ++ ++#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */ ++#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */ ++ ++#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */ ++#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */ ++#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */ ++#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */ ++#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */ ++#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */ ++#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */ ++#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */ ++#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */ ++ ++#define ATMEL_TSADCC_XPOS 0x50 ++#define ATMEL_TSADCC_Z1DAT 0x54 ++#define ATMEL_TSADCC_Z2DAT 0x58 ++ ++#define ATMEL_TSADCC_CONVERSION_END (ATMEL_TSADCC_EOC(3)) ++ ++/* Register definitions based on AT91SAM9X5 preliminary draft datasheet */ ++#define ATMEL_TSADCC_TRACKTIM (0x0f << 24) /* Tracking Time */ ++ ++#define ATMEL_TSADCC_ISR 0x30 /* Interrupt Status register */ ++#define ATMEL_TSADCC_XRDY (1 << 20) /* Measure XPOS Ready */ ++#define ATMEL_TSADCC_YRDY (1 << 21) /* Measure YPOS Ready */ ++#define ATMEL_TSADCC_PRDY (1 << 22) /* Measure Pressure Ready */ ++#define ATMEL_TSADCC_COMPE (1 << 26) /* Comparison Event */ ++#define ATMEL_TSADCC_PEN (1 << 29) /* Pen Contact */ ++#define ATMEL_TSADCC_NOPEN (1 << 30) /* No Pen Contact */ ++#define ATMEL_TSADCC_PENDET_STATUS (1 << 31) /* Pen Detect Status (not interrupt source) */ ++ ++#define ATMEL_TSADCC_TSMR 0xb0 ++#define ATMEL_TSADCC_TSMODE (3 << 0) /* Touch Screen Mode */ ++#define ATMEL_TSADCC_TSMODE_NO (0 << 0) /* No Touch Screen */ ++#define ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS (1 << 0) /* 4-wire Touch Screen without pressure measurement */ ++#define ATMEL_TSADCC_TSMODE_4WIRE_PRESS (2 << 0) /* 4-wire Touch Screen with pressure measurement */ ++#define ATMEL_TSADCC_TSMODE_5WIRE (3 << 0) /* 5-wire Touch Screen */ ++#define ATMEL_TSADCC_TSAV (3 << 4) /* Touch Screen Average */ ++#define ATMEL_TSADCC_TSAV_1 (0 << 4) /* No filtering. Only one conversion ADC per measure */ ++#define ATMEL_TSADCC_TSAV_2 (1 << 4) /* Averages 2 ADC conversions */ ++#define ATMEL_TSADCC_TSAV_4 (2 << 4) /* Averages 4 ADC conversions */ ++#define ATMEL_TSADCC_TSAV_8 (3 << 4) /* Averages 8 ADC conversions */ ++#define ATMEL_TSADCC_TSSCTIM (0x0f << 16) /* Touch Screen switches closure time */ ++ ++#define ATMEL_TSADCC_NOTSDMA (1 << 22) /* No Touchscreen DMA */ ++#define ATMEL_TSADCC_PENDET_DIS (0 << 24) /* Pen contact detection disable */ ++#define ATMEL_TSADCC_PENDET_ENA (1 << 24) /* Pen contact detection enable */ ++ ++#define ATMEL_TSADCC_XPOSR 0xb4 ++#define ATMEL_TSADCC_XSCALE (0x3ff << 16) /* Scale of X Position */ ++ ++#define ATMEL_TSADCC_YPOSR 0xb8 ++#define ATMEL_TSADCC_YPOS (0x3ff << 0) /* Y Position */ ++#define ATMEL_TSADCC_YSCALE (0x3ff << 16) /* Scale of Y Position */ ++ ++/* 9x5 ADC registers which conflict with previous definition */ ++#ifdef CONFIG_ARCH_AT91SAM9X5 ++#undef ATMEL_TSADCC_TRGR ++#undef ATMEL_TSADCC_SR ++#define ATMEL_TSADCC_SR ATMEL_TSADCC_ISR ++#define ATMEL_TSADCC_TRGR 0xc0 ++ ++/* For code compatiable, redefine with 9x5 value */ ++#undef ATMEL_TSADCC_STARTUP ++#define ATMEL_TSADCC_STARTUP (0x0f << 16) /* Startup Time */ ++#undef ATMEL_TSADCC_DRDY ++#define ATMEL_TSADCC_DRDY (1 << 24) /* Data Ready */ ++#undef ATMEL_TSADCC_GOVRE ++#define ATMEL_TSADCC_GOVRE (1 << 25) /* General Overrun */ ++#undef ATMEL_TSADCC_TSFREQ ++#define ATMEL_TSADCC_TSFREQ (0x0f << 8) /* Touch Screen Frequency */ ++#undef ATMEL_TSADCC_PENDET ++#define ATMEL_TSADCC_PENDET (1 << 24) /* Pen Contact Detection Enable */ ++#undef ATMEL_TSADCC_XPOS ++#define ATMEL_TSADCC_XPOS (0x3ff << 0) /* X Position */ ++ ++#undef ATMEL_TSADCC_NOCNT ++#define ATMEL_TSADCC_NOCNT ATMEL_TSADCC_NOPEN ++#undef ATMEL_TSADCC_PENCNT ++#define ATMEL_TSADCC_PENCNT ATMEL_TSADCC_PEN ++#undef ATMEL_TSADCC_CONVERSION_END ++#define ATMEL_TSADCC_CONVERSION_END (ATMEL_TSADCC_XRDY | ATMEL_TSADCC_YRDY | ATMEL_TSADCC_PRDY) ++ ++#endif ++ ++/* Retrieve prescaler value */ ++#define PRESCALER_VAL(x) ((x) >> 8) ++ ++#endif /* __ATMEL_TSADCC_H__ */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0104-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch b/patches.at91/0104-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch new file mode 100644 index 000000000000..fa6d702cb74b --- /dev/null +++ b/patches.at91/0104-input-atmel_tsadcc-add-touch-screen-pressure-measure.patch @@ -0,0 +1,104 @@ +From 2cdc659b4c98955fbd33065c56c468b494129321 Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Wed, 17 Nov 2010 13:12:11 +0100 +Subject: input: atmel_tsadcc: add touch screen pressure measurement + +Signed-off-by: Josh Wu +--- + drivers/input/touchscreen/atmel_tsadcc.c | 26 +++++++++++++++++++++++--- + drivers/input/touchscreen/atmel_tsadcc.h | 4 ++++ + 2 files changed, 27 insertions(+), 3 deletions(-) + +diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c +index a0e8d52..b6a1630 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.c ++++ b/drivers/input/touchscreen/atmel_tsadcc.c +@@ -38,6 +38,7 @@ struct atmel_tsadcc { + int irq; + unsigned int prev_absx; + unsigned int prev_absy; ++ unsigned int prev_absz; + unsigned char bufferedmeasure; + }; + +@@ -53,6 +54,9 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + + unsigned int status; + unsigned int reg; ++ unsigned int z1, z2; ++ unsigned int Rxp = 1; ++ unsigned int factor = 1000; + + status = atmel_tsadcc_read(ATMEL_TSADCC_SR); + status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR); +@@ -101,11 +105,15 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + /* Last measurement is always discarded, since it can + * be erroneous. + * Always report previous measurement */ +- dev_dbg(&input_dev->dev, "x = %d, y = %d\n", +- ts_dev->prev_absx, ts_dev->prev_absy); ++ dev_dbg(&input_dev->dev, ++ "x = %d, y = %d, pressure = %d\n", ++ ts_dev->prev_absx, ts_dev->prev_absy, ++ ts_dev->prev_absz); + input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); + input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); + input_report_key(input_dev, BTN_TOUCH, 1); ++ if (cpu_has_9x5_adc()) ++ input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); + input_sync(input_dev); + } else + ts_dev->bufferedmeasure = 1; +@@ -114,6 +122,17 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + if (cpu_has_9x5_adc()) { + ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; + ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; ++ ++ /* calculate the pressure */ ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_PRESSR); ++ z1 = reg & ATMEL_TSADCC_PRESSR_Z1; ++ z2 = (reg & ATMEL_TSADCC_PRESSR_Z2) >> 16; ++ ++ if (z1 != 0) ++ ts_dev->prev_absz = Rxp * (ts_dev->prev_absx * factor / 1024) * (z2 * factor / z1 - factor) / factor; ++ else ++ ts_dev->prev_absz = 0; ++ + } else { + ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; + ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); +@@ -209,6 +228,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + __set_bit(EV_ABS, input_dev->evbit); + input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0); + input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0); ++ input_set_abs_params(input_dev, ABS_PRESSURE, 0, 0xffffff, 0, 0); + + input_set_capability(input_dev, EV_KEY, BTN_TOUCH); + +@@ -257,7 +277,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + + if (cpu_has_9x5_adc()) { + atmel_tsadcc_write(ATMEL_TSADCC_TSMR, +- ATMEL_TSADCC_TSMODE_4WIRE_NO_PRESS | ++ ATMEL_TSADCC_TSMODE_4WIRE_PRESS | + ATMEL_TSADCC_NOTSDMA | + ATMEL_TSADCC_PENDET_ENA | + (pdata->pendet_debounce << 28) | +diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h +index 5918c20..231497e 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.h ++++ b/drivers/input/touchscreen/atmel_tsadcc.h +@@ -126,6 +126,10 @@ + #define ATMEL_TSADCC_YPOS (0x3ff << 0) /* Y Position */ + #define ATMEL_TSADCC_YSCALE (0x3ff << 16) /* Scale of Y Position */ + ++#define ATMEL_TSADCC_PRESSR 0xbc /* Touchscreen Pressure Register */ ++#define ATMEL_TSADCC_PRESSR_Z1 (0x3ff << 0) /* Data of Z1 Measurement */ ++#define ATMEL_TSADCC_PRESSR_Z2 (0x3ff << 16) /* Data of Z2 Measurement */ ++ + /* 9x5 ADC registers which conflict with previous definition */ + #ifdef CONFIG_ARCH_AT91SAM9X5 + #undef ATMEL_TSADCC_TRGR +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0104-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch b/patches.at91/0104-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch deleted file mode 100644 index 014d66dc902d..000000000000 --- a/patches.at91/0104-usb-gadget-at91_udc-Propagate-devicetree-to-gadget-d.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 3be7e4694db4d894b3bbb2252d033a58a8805cf0 Mon Sep 17 00:00:00 2001 -From: Alexandre Pereira da Silva -Date: Tue, 26 Jun 2012 11:27:12 -0300 -Subject: usb: gadget: at91_udc: Propagate devicetree to gadget drivers - -Fill dev.of_node of gadget drivers, so they can use devicetree - -Signed-off-by: Alexandre Pereira da Silva -Signed-off-by: Felipe Balbi ---- - drivers/usb/gadget/at91_udc.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c -index ffb46bc..ddeaadb 100644 ---- a/drivers/usb/gadget/at91_udc.c -+++ b/drivers/usb/gadget/at91_udc.c -@@ -1650,6 +1650,7 @@ static int at91_start(struct usb_gadget_driver *driver, - - udc->driver = driver; - udc->gadget.dev.driver = &driver->driver; -+ udc->gadget.dev.of_node = udc->pdev->dev.of_node; - dev_set_drvdata(&udc->gadget.dev, &driver->driver); - udc->enabled = 1; - udc->selfpowered = 1; --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0105-USB-ohci-at91.c-remove-err-usage.patch b/patches.at91/0105-USB-ohci-at91.c-remove-err-usage.patch deleted file mode 100644 index c90aef45d3d8..000000000000 --- a/patches.at91/0105-USB-ohci-at91.c-remove-err-usage.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 3b08384658865b98f31a74f07550ac0a562887e8 Mon Sep 17 00:00:00 2001 -From: Greg Kroah-Hartman -Date: Fri, 27 Apr 2012 11:24:39 -0700 -Subject: USB: ohci-at91.c: remove err() usage - -err() was a very old USB-specific macro that I thought had -gone away. This patch removes it from being used in the -driver and uses dev_err() instead. - -CC: Alan Stern -CC: Grant Likely -CC: Rob Herring -Signed-off-by: Greg Kroah-Hartman ---- - drivers/usb/host/ohci-at91.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c -index 5dfea46..aaa8d2b 100644 ---- a/drivers/usb/host/ohci-at91.c -+++ b/drivers/usb/host/ohci-at91.c -@@ -243,7 +243,8 @@ ohci_at91_start (struct usb_hcd *hcd) - int ret; - - if ((ret = ohci_run(ohci)) < 0) { -- err("can't start %s", hcd->self.bus_name); -+ dev_err(hcd->self.controller, "can't start %s\n", -+ hcd->self.bus_name); - ohci_stop(hcd); - return ret; - } --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0105-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch b/patches.at91/0105-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch new file mode 100644 index 000000000000..822a7a6ff370 --- /dev/null +++ b/patches.at91/0105-input-atmel_tsadcc-enable-touchscreen-averaging-and-.patch @@ -0,0 +1,77 @@ +From 647050060bff19f002e3c0aef95410ab0915dfe1 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Tue, 5 Apr 2011 17:30:03 +0200 +Subject: input: atmel_tsadcc: enable touchscreen averaging and add fast wake + up + +Enable the touchscreen average to improve the resulting events. For this +to work the trigger period needs to be reduced. + +This puts a field into at91_tsadcc_data to allow platforms to specify +the number of conversions to average over. + +XXX: should the trigger period passed by the platform, too, as this +depends on the number of conversions? +XXX: seperate fast wake up into a seperate patch? What does it? +XXX: don't use bare constants + +Signed-off-by: Ludovic Desroches +--- + drivers/input/touchscreen/atmel_tsadcc.c | 14 ++++++++------ + drivers/input/touchscreen/atmel_tsadcc.h | 1 + + 2 files changed, 9 insertions(+), 6 deletions(-) + +diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c +index b6a1630..48faecb 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.c ++++ b/drivers/input/touchscreen/atmel_tsadcc.c +@@ -96,7 +96,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + atmel_tsadcc_write(ATMEL_TSADCC_IER, + ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); + atmel_tsadcc_write(ATMEL_TSADCC_TRGR, +- ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16)); ++ ATMEL_TSADCC_TRGMOD_PERIOD | (0x00D0 << 16)); + + } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { + /* Conversion finished */ +@@ -259,6 +259,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + + if (cpu_has_9x5_adc()) { + reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ ++ ((0x01 << 6) & ATMEL_TSADCC_FWUP) | /* Fast Wake Up */ + (prsc << 8) | + ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | + ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); +@@ -277,11 +278,12 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + + if (cpu_has_9x5_adc()) { + atmel_tsadcc_write(ATMEL_TSADCC_TSMR, +- ATMEL_TSADCC_TSMODE_4WIRE_PRESS | +- ATMEL_TSADCC_NOTSDMA | +- ATMEL_TSADCC_PENDET_ENA | +- (pdata->pendet_debounce << 28) | +- (0x0 << 8)); ++ ATMEL_TSADCC_TSMODE_4WIRE_PRESS | ++ (pdata->filtering_average << 4) | /* Touchscreen average */ ++ ATMEL_TSADCC_NOTSDMA | ++ ATMEL_TSADCC_PENDET_ENA | ++ (pdata->pendet_debounce << 28) | ++ (0x3 << 8)); /* Touchscreen freq */ + } else { + atmel_tsadcc_write(ATMEL_TSADCC_TSR, + (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); +diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h +index 231497e..572770a 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.h ++++ b/drivers/input/touchscreen/atmel_tsadcc.h +@@ -34,6 +34,7 @@ + #define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ + #define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ + #define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ ++#define ATMEL_TSADCC_FWUP (1 << 6) /* Fast Wake Up selection (5series) */ + #define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ + #define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ + #define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0106-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch b/patches.at91/0106-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch new file mode 100644 index 000000000000..82d2f039f177 --- /dev/null +++ b/patches.at91/0106-input-atmel_tsadcc-add-ACR-register-and-change-trigg.patch @@ -0,0 +1,92 @@ +From 93e19b757f18fdf8b8a00999046b3abd4ea9b4a6 Mon Sep 17 00:00:00 2001 +From: Ludovic Desroches +Date: Fri, 6 May 2011 17:54:45 +0200 +Subject: input: atmel_tsadcc: add ACR register and change trigger period value + +Add ACR register which allows to configure internal ADC resistor, that should +prevent from adding resistor on display module. Furthermore increase +trigger period which seems to be related with resistor value. A Too small +value causes continuous irq. + +Signed-off-by: Ludovic Desroches +--- + drivers/input/touchscreen/atmel_tsadcc.c | 30 +++++++++++++++++++++++++++++- + drivers/input/touchscreen/atmel_tsadcc.h | 3 +++ + 2 files changed, 32 insertions(+), 1 deletion(-) + +diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c +index 48faecb..20154ba 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.c ++++ b/drivers/input/touchscreen/atmel_tsadcc.c +@@ -47,6 +47,17 @@ static void __iomem *tsc_base; + #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg)) + #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg)) + ++static void atmel_tsadcc_dump_conf(struct platform_device *pdev) ++{ ++ dev_info(&pdev->dev, "--- configuration ---\n"); ++ dev_info(&pdev->dev, "Mode Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_MR)); ++ dev_info(&pdev->dev, "Trigger Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_TRGR)); ++ dev_info(&pdev->dev, "Touchscreen Mode Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_TSMR)); ++ dev_info(&pdev->dev, "Analog Control Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_ACR)); ++ dev_info(&pdev->dev, "ADC Channel Status Register: %#x\n", atmel_tsadcc_read(ATMEL_TSADCC_CHSR)); ++ dev_info(&pdev->dev, "---------------------\n"); ++} ++ + static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + { + struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; +@@ -95,8 +106,14 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT); + atmel_tsadcc_write(ATMEL_TSADCC_IER, + ATMEL_TSADCC_CONVERSION_END | ATMEL_TSADCC_NOCNT); ++ /* this value is related to the resistor bits value of ++ * ACR register and R64. If internal resistor value is ++ * increased then this value has to be increased. This ++ * behavior seems to happen only with averaging on 8 ++ * values ++ */ + atmel_tsadcc_write(ATMEL_TSADCC_TRGR, +- ATMEL_TSADCC_TRGMOD_PERIOD | (0x00D0 << 16)); ++ ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FF << 16)); + + } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { + /* Conversion finished */ +@@ -289,9 +306,20 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); + } + ++ /* Change adc internal resistor value for better pen detection, ++ * default value is 100 kOhm. ++ * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm ++ * option only available on ES2 and higher ++ */ ++ if (cpu_has_9x5_adc()) { ++ atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); ++ } ++ + atmel_tsadcc_read(ATMEL_TSADCC_SR); + atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); + ++ /* atmel_tsadcc_dump_conf(pdev); */ ++ + /* All went ok, so register to the input system */ + err = input_register_device(input_dev); + if (err) +diff --git a/drivers/input/touchscreen/atmel_tsadcc.h b/drivers/input/touchscreen/atmel_tsadcc.h +index 572770a..fe74506 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.h ++++ b/drivers/input/touchscreen/atmel_tsadcc.h +@@ -103,6 +103,9 @@ + #define ATMEL_TSADCC_NOPEN (1 << 30) /* No Pen Contact */ + #define ATMEL_TSADCC_PENDET_STATUS (1 << 31) /* Pen Detect Status (not interrupt source) */ + ++#define ATMEL_TSADCC_ACR 0x94 /* Analog Control Register */ ++#define ATMEL_TSADCC_PENDET_SENSITIVITY (0x3 << 0) /* ADC internal resistor */ ++ + #define ATMEL_TSADCC_TSMR 0xb0 + #define ATMEL_TSADCC_TSMODE (3 << 0) /* Touch Screen Mode */ + #define ATMEL_TSADCC_TSMODE_NO (0 << 0) /* No Touch Screen */ +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0107-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch b/patches.at91/0107-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch new file mode 100644 index 000000000000..eee3b942640e --- /dev/null +++ b/patches.at91/0107-AT91-input-atmel_tsadcc-rework-irq-infrastructure-an.patch @@ -0,0 +1,168 @@ +From 385b5e2f9342fcf20ad97d4bf788e5e60635d542 Mon Sep 17 00:00:00 2001 +From: Nicolas Ferre +Date: Thu, 16 Jun 2011 19:24:04 +0200 +Subject: AT91/input: atmel_tsadcc: rework irq infrastructure and parameters + +Signed-off-by: Nicolas Ferre +--- + drivers/input/touchscreen/atmel_tsadcc.c | 70 ++++++++++++++++++-------------- + 1 file changed, 40 insertions(+), 30 deletions(-) + +diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c +index 20154ba..397d17a 100644 +--- a/drivers/input/touchscreen/atmel_tsadcc.c ++++ b/drivers/input/touchscreen/atmel_tsadcc.c +@@ -30,6 +30,7 @@ + #define cpu_has_9x5_adc() (cpu_is_at91sam9x5()) + + #define ADC_DEFAULT_CLOCK 100000 ++#define ZTHRESHOLD 3200 + + struct atmel_tsadcc { + struct input_dev *input; +@@ -39,7 +40,6 @@ struct atmel_tsadcc { + unsigned int prev_absx; + unsigned int prev_absy; + unsigned int prev_absz; +- unsigned char bufferedmeasure; + }; + + static void __iomem *tsc_base; +@@ -62,6 +62,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + { + struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; + struct input_dev *input_dev = ts_dev->input; ++ struct at91_tsadcc_data *pdata = input_dev->dev.parent->platform_data; + + unsigned int status; + unsigned int reg; +@@ -76,7 +77,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + /* Contact lost */ + if (cpu_has_9x5_adc()) { + /* 9X5 using TSMR to set PENDBC time */ +- reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ATMEL_TSADCC_PENDBC; ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_TSMR) | ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); + atmel_tsadcc_write(ATMEL_TSADCC_TSMR, reg); + } else { + reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; +@@ -88,7 +89,6 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); + + input_report_key(input_dev, BTN_TOUCH, 0); +- ts_dev->bufferedmeasure = 0; + input_sync(input_dev); + + } else if (status & ATMEL_TSADCC_PENCNT) { +@@ -118,27 +118,20 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + } else if ((status & ATMEL_TSADCC_CONVERSION_END) == ATMEL_TSADCC_CONVERSION_END) { + /* Conversion finished */ + +- if (ts_dev->bufferedmeasure) { +- /* Last measurement is always discarded, since it can +- * be erroneous. +- * Always report previous measurement */ +- dev_dbg(&input_dev->dev, +- "x = %d, y = %d, pressure = %d\n", +- ts_dev->prev_absx, ts_dev->prev_absy, +- ts_dev->prev_absz); +- input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); +- input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); +- input_report_key(input_dev, BTN_TOUCH, 1); +- if (cpu_has_9x5_adc()) +- input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); +- input_sync(input_dev); +- } else +- ts_dev->bufferedmeasure = 1; +- +- /* Now make new measurement */ ++ /* make new measurement */ + if (cpu_has_9x5_adc()) { +- ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR) & 0xffff; +- ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR) & 0xffff; ++ unsigned int xscale, yscale; ++ ++ /* calculate position */ ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_XPOSR); ++ ts_dev->prev_absx = (reg & ATMEL_TSADCC_XPOS) << 10; ++ xscale = (reg & ATMEL_TSADCC_XSCALE) >> 16; ++ ts_dev->prev_absx /= xscale ? xscale: 1; ++ ++ reg = atmel_tsadcc_read(ATMEL_TSADCC_YPOSR); ++ ts_dev->prev_absy = (reg & ATMEL_TSADCC_YPOS) << 10; ++ yscale = (reg & ATMEL_TSADCC_YSCALE) >> 16; ++ ts_dev->prev_absy /= yscale ? yscale: 1 << 10; + + /* calculate the pressure */ + reg = atmel_tsadcc_read(ATMEL_TSADCC_PRESSR); +@@ -157,6 +150,23 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) + ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; + ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); + } ++ ++ /* report measurement to input layer */ ++ if (ts_dev->prev_absz < ZTHRESHOLD) { ++ dev_dbg(&input_dev->dev, ++ "x = %d, y = %d, pressure = %d\n", ++ ts_dev->prev_absx, ts_dev->prev_absy, ++ ts_dev->prev_absz); ++ input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); ++ input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); ++ if (cpu_has_9x5_adc()) ++ input_report_abs(input_dev, ABS_PRESSURE, ts_dev->prev_absz); ++ input_report_key(input_dev, BTN_TOUCH, 1); ++ input_sync(input_dev); ++ } else { ++ dev_dbg(&input_dev->dev, ++ "pressure too low: not reporting\n"); ++ } + } + + return IRQ_HANDLED; +@@ -233,7 +243,6 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + } + + ts_dev->input = input_dev; +- ts_dev->bufferedmeasure = 0; + + snprintf(ts_dev->phys, sizeof(ts_dev->phys), + "%s/input0", dev_name(&pdev->dev)); +@@ -275,10 +284,10 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc); + + if (cpu_has_9x5_adc()) { +- reg = ((0x01 << 5) & ATMEL_TSADCC_SLEEP) | /* Sleep Mode */ +- ((0x01 << 6) & ATMEL_TSADCC_FWUP) | /* Fast Wake Up */ ++ reg = ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* no Sleep Mode */ ++ ((0x00 << 6) & ATMEL_TSADCC_FWUP) | /* no Fast Wake Up needed */ + (prsc << 8) | +- ((0x8 << 16) & ATMEL_TSADCC_STARTUP) | ++ ((0x4 << 16) & ATMEL_TSADCC_STARTUP) | + ((pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TRACKTIM); + } else { + reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | +@@ -296,10 +305,10 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + if (cpu_has_9x5_adc()) { + atmel_tsadcc_write(ATMEL_TSADCC_TSMR, + ATMEL_TSADCC_TSMODE_4WIRE_PRESS | +- (pdata->filtering_average << 4) | /* Touchscreen average */ ++ ((pdata->filtering_average << 4) & ATMEL_TSADCC_TSAV) | /* Touchscreen average */ + ATMEL_TSADCC_NOTSDMA | + ATMEL_TSADCC_PENDET_ENA | +- (pdata->pendet_debounce << 28) | ++ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC) | + (0x3 << 8)); /* Touchscreen freq */ + } else { + atmel_tsadcc_write(ATMEL_TSADCC_TSR, +@@ -312,7 +321,8 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) + * option only available on ES2 and higher + */ + if (cpu_has_9x5_adc()) { +- atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); ++ if (pdata->pendet_sensitivity <= ATMEL_TSADCC_PENDET_SENSITIVITY) ++ atmel_tsadcc_write(ATMEL_TSADCC_ACR, pdata->pendet_sensitivity); + } + + atmel_tsadcc_read(ATMEL_TSADCC_SR); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0107-media-video-atmel-isi-add-dumb-set_parm.patch b/patches.at91/0107-media-video-atmel-isi-add-dumb-set_parm.patch deleted file mode 100644 index d61092555b68..000000000000 --- a/patches.at91/0107-media-video-atmel-isi-add-dumb-set_parm.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 705b4b4645cf6f31bc1e267e193388a82b7f2df3 Mon Sep 17 00:00:00 2001 -From: Nicolas Ferre -Date: Fri, 10 Jun 2011 17:21:28 +0200 -Subject: media/video: atmel-isi: add dumb set_parm() - -Add dumb set_parm() & get_parm() function to struct soc_camera_host_ops. -Needed for ffmpeg to be able to capture frames from ISI driver. - -Signed-off-by: Nicolas Ferre ---- - drivers/media/video/atmel-isi.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c -index ec3f6a0..7a44df4 100644 ---- a/drivers/media/video/atmel-isi.c -+++ b/drivers/media/video/atmel-isi.c -@@ -893,6 +893,12 @@ static int isi_camera_set_bus_param(struct soc_camera_device *icd) - return 0; - } - -+ -+static int isi_camera_set_parm(struct soc_camera_device *icd, struct v4l2_streamparm *parm) -+{ -+ return 0; -+} -+ - static struct soc_camera_host_ops isi_soc_camera_host_ops = { - .owner = THIS_MODULE, - .add = isi_camera_add_device, -@@ -904,6 +910,8 @@ static struct soc_camera_host_ops isi_soc_camera_host_ops = { - .poll = isi_camera_poll, - .querycap = isi_camera_querycap, - .set_bus_param = isi_camera_set_bus_param, -+ .set_parm = isi_camera_set_parm, -+ .get_parm = isi_camera_set_parm, - }; - - /* -----------------------------------------------------------------------*/ --- -1.8.0.197.g5a90748 - diff --git a/patches.at91/0108-input-at91-add-tsadcc_data-for-9x5.patch b/patches.at91/0108-input-at91-add-tsadcc_data-for-9x5.patch new file mode 100644 index 000000000000..f2ed50235667 --- /dev/null +++ b/patches.at91/0108-input-at91-add-tsadcc_data-for-9x5.patch @@ -0,0 +1,27 @@ +From 08f2a486546d5837c09535727250b2c03832c063 Mon Sep 17 00:00:00 2001 +From: Josh Wu +Date: Thu, 7 Jun 2012 14:19:11 +0800 +Subject: input: at91: add tsadcc_data for 9x5 + +Signed-off-by: Josh Wu +--- + arch/arm/mach-at91/include/mach/board.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h +index 369afc2..726e5f3 100644 +--- a/arch/arm/mach-at91/include/mach/board.h ++++ b/arch/arm/mach-at91/include/mach/board.h +@@ -175,7 +175,9 @@ extern void __init at91_add_device_isi(struct isi_platform_data *data, + /* Touchscreen Controller */ + struct at91_tsadcc_data { + unsigned int adc_clock; ++ u8 filtering_average; + u8 pendet_debounce; ++ u8 pendet_sensitivity; + u8 ts_sample_hold_time; + }; + extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data); +-- +1.8.0.197.g5a90748 + diff --git a/patches.at91/0108-video-atmel_lcdfb-add-support-for-AT91SAM9x5.patch b/patches.at91/0108-video-atmel_lcdfb-add-support-for-AT91SAM9x5.patch deleted file mode 100644 index 4e4c77bc85b9..000000000000 --- a/patches.at91/0108-video-atmel_lcdfb-add-support-for-AT91SAM9x5.patch +++ /dev/null @@ -1,1810 +0,0 @@ -From 5c29a55f144400febf2dfcdc327253b813113c07 Mon Sep 17 00:00:00 2001 -From: Josh Wu -Date: Mon, 1 Nov 2010 16:38:41 +0800 -Subject: video/atmel_lcdfb: add support for AT91SAM9x5 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Josh Wu -Signed-off-by: Dan Liang -Signed-off-by: Nicolas Ferre -[ukleinek: forward-port to 2.6.39-rcish] -Signed-off-by: Uwe Kleine-König - -Conflicts: - - drivers/video/atmel_lcdfb.c ---- - arch/arm/mach-at91/include/mach/atmel_hlcdfb.h | 865 +++++++++++++++++++++++++ - drivers/video/atmel_lcdfb.c | 668 ++++++++++++++----- - include/video/atmel_lcdc.h | 15 + - 3 files changed, 1389 insertions(+), 159 deletions(-) - create mode 100644 arch/arm/mach-at91/include/mach/atmel_hlcdfb.h - -diff --git a/arch/arm/mach-at91/include/mach/atmel_hlcdfb.h b/arch/arm/mach-at91/include/mach/atmel_hlcdfb.h -new file mode 100644 -index 0000000..a57b79b ---- /dev/null -+++ b/arch/arm/mach-at91/include/mach/atmel_hlcdfb.h -@@ -0,0 +1,865 @@ -+/* -+ * Header file for AT91 High end LCD Controller -+ * -+ * Data structure and register user interface -+ * -+ * Copyright (C) 2010 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PUROFFSETE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+#ifndef __ATMEL_HLCD_H__ -+#define __ATMEL_HLCD_H__ -+ -+/* Lcdc hardware registers */ -+#define ATMEL_LCDC_LCDCFG0 0x0000 -+#define LCDC_LCDCFG0_CLKPOL (0x1 << 0) -+#define LCDC_LCDCFG0_CLKSEL (0x1 << 2) -+#define LCDC_LCDCFG0_CLKPWMSEL (0x1 << 3) -+#define LCDC_LCDCFG0_CGDISBASE (0x1 << 8) -+#define LCDC_LCDCFG0_CGDISOVR1 (0x1 << 9) -+#define LCDC_LCDCFG0_CGDISHEO (0x1 << 11) -+#define LCDC_LCDCFG0_CGDISHCR (0x1 << 12) -+#define LCDC_LCDCFG0_CLKDIV_OFFSET 16 -+#define LCDC_LCDCFG0_CLKDIV (0xff << LCDC_LCDCFG0_CLKDIV_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG1 0x0004 -+#define LCDC_LCDCFG1_HSPW_OFFSET 0 -+#define LCDC_LCDCFG1_HSPW (0x3f << LCDC_LCDCFG1_HSPW_OFFSET) -+#define LCDC_LCDCFG1_VSPW_OFFSET 16 -+#define LCDC_LCDCFG1_VSPW (0x3f << LCDC_LCDCFG1_VSPW_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG2 0x0008 -+#define LCDC_LCDCFG2_VFPW_OFFSET 0 -+#define LCDC_LCDCFG2_VFPW (0x3f << LCDC_LCDCFG2_VFPW_OFFSET) -+#define LCDC_LCDCFG2_VBPW_OFFSET 16 -+#define LCDC_LCDCFG2_VBPW (0x3f << LCDC_LCDCFG2_VBPW_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG3 0x000C -+#define LCDC_LCDCFG3_HFPW_OFFSET 0 -+#define LCDC_LCDCFG3_HFPW (0xff << LCDC_LCDCFG3_HFPW_OFFSET) -+#define LCDC_LCDCFG3_HBPW_OFFSET 16 -+#define LCDC_LCDCFG3_HBPW (0xff << LCDC_LCDCFG3_HBPW_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG4 0x0010 -+#define LCDC_LCDCFG4_PPL_OFFSET 0 -+#define LCDC_LCDCFG4_PPL (0x7ff << LCDC_LCDCFG4_PPL_OFFSET) -+#define LCDC_LCDCFG4_RPF_OFFSET 16 -+#define LCDC_LCDCFG4_RPF (0x7ff << LCDC_LCDCFG4_RPF_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG5 0x0014 -+#define LCDC_LCDCFG5_HSPOL (0x1 << 0) -+#define LCDC_LCDCFG5_VSPOL (0x1 << 1) -+#define LCDC_LCDCFG5_VSPDLYS (0x1 << 2) -+#define LCDC_LCDCFG5_VSPDLYE (0x1 << 3) -+#define LCDC_LCDCFG5_DISPPOL (0x1 << 4) -+#define LCDC_LCDCFG5_SERIAL (0x1 << 5) -+#define LCDC_LCDCFG5_DITHER (0x1 << 6) -+#define LCDC_LCDCFG5_DISPDLY (0x1 << 7) -+#define LCDC_LCDCFG5_MODE_OFFSET 8 -+#define LCDC_LCDCFG5_MODE (0x3 << LCDC_LCDCFG5_MODE_OFFSET) -+#define LCDC_LCDCFG5_MODE_OUTPUT_12BPP (0x0 << 8) -+#define LCDC_LCDCFG5_MODE_OUTPUT_16BPP (0x1 << 8) -+#define LCDC_LCDCFG5_MODE_OUTPUT_18BPP (0x2 << 8) -+#define LCDC_LCDCFG5_MODE_OUTPUT_24BPP (0x3 << 8) -+#define LCDC_LCDCFG5_VSPSU (0x1 << 12) -+#define LCDC_LCDCFG5_VSPHO (0x1 << 13) -+#define LCDC_LCDCFG5_GUARDTIME_OFFSET 16 -+#define LCDC_LCDCFG5_GUARDTIME (0x1f << LCDC_LCDCFG5_GUARDTIME_OFFSET) -+ -+#define ATMEL_LCDC_LCDCFG6 0x0018 -+#define LCDC_LCDCFG6_PWMPS_OFFSET 0 -+#define LCDC_LCDCFG6_PWMPS (0x7 << LCDC_LCDCFG6_PWMPS_OFFSET) -+#define LCDC_LCDCFG6_PWMPOL (0x1 << 4) -+#define LCDC_LCDCFG6_PWMCVAL_OFFSET 8 -+#define LCDC_LCDCFG6_PWMCVAL (0xff << LCDC_LCDCFG6_PWMCVAL_OFFSET) -+ -+#define ATMEL_LCDC_LCDEN 0x0020 -+#define LCDC_LCDEN_CLKEN (0x1 << 0) -+#define LCDC_LCDEN_SYNCEN (0x1 << 1) -+#define LCDC_LCDEN_DISPEN (0x1 << 2) -+#define LCDC_LCDEN_PWMEN (0x1 << 3) -+ -+#define ATMEL_LCDC_LCDDIS 0x0024 -+#define LCDC_LCDDIS_CLKDIS (0x1 << 0) -+#define LCDC_LCDDIS_SYNCDIS (0x1 << 1) -+#define LCDC_LCDDIS_DISPDIS (0x1 << 2) -+#define LCDC_LCDDIS_PWMDIS (0x1 << 3) -+#define LCDC_LCDDIS_CLKRST (0x1 << 8) -+#define LCDC_LCDDIS_SYNCRST (0x1 << 9) -+#define LCDC_LCDDIS_DISPRST (0x1 << 10) -+#define LCDC_LCDDIS_PWMRST (0x1 << 11) -+ -+#define ATMEL_LCDC_LCDSR 0x0028 -+#define LCDC_LCDSR_CLKSTS (0x1 << 0) -+#define LCDC_LCDSR_LCDSTS (0x1 << 1) -+#define LCDC_LCDSR_DISPSTS (0x1 << 2) -+#define LCDC_LCDSR_PWMSTS (0x1 << 3) -+#define LCDC_LCDSR_SIPSTS (0x1 << 4) -+ -+#define ATMEL_LCDC_LCDIER 0x002C -+#define LCDC_LCDIER_SOFIE (0x1 << 0) -+#define LCDC_LCDIER_DISIE (0x1 << 1) -+#define LCDC_LCDIER_DISPIE (0x1 << 2) -+#define LCDC_LCDIER_FIFOERRIE (0x1 << 4) -+#define LCDC_LCDIER_BASEIE (0x1 << 8) -+#define LCDC_LCDIER_OVR1IE (0x1 << 9) -+#define LCDC_LCDIER_HEOIE (0x1 << 11) -+#define LCDC_LCDIER_HCRIE (0x1 << 12) -+ -+#define ATMEL_LCDC_LCDIDR 0x0030 -+#define LCDC_LCDIDR_SOFID (0x1 << 0) -+#define LCDC_LCDIDR_DISID (0x1 << 1) -+#define LCDC_LCDIDR_DISPID (0x1 << 2) -+#define LCDC_LCDIDR_FIFOERRID (0x1 << 4) -+#define LCDC_LCDIDR_BASEID (0x1 << 8) -+#define LCDC_LCDIDR_OVR1ID (0x1 << 9) -+#define LCDC_LCDIDR_HEOID (0x1 << 11) -+#define LCDC_LCDIDR_HCRID (0x1 << 12) -+ -+#define ATMEL_LCDC_LCDIMR 0x0034 -+#define LCDC_LCDIMR_SOFIM (0x1 << 0) -+#define LCDC_LCDIMR_DISIM (0x1 << 1) -+#define LCDC_LCDIMR_DISPIM (0x1 << 2) -+#define LCDC_LCDIMR_FIFOERRIM (0x1 << 4) -+#define LCDC_LCDIMR_BASEIM (0x1 << 8) -+#define LCDC_LCDIMR_OVR1IM (0x1 << 9) -+#define LCDC_LCDIMR_HEOIM (0x1 << 11) -+#define LCDC_LCDIMR_HCRIM (0x1 << 12) -+ -+#define ATMEL_LCDC_LCDISR 0x0038 -+#define LCDC_LCDISR_SOF (0x1 << 0) -+#define LCDC_LCDISR_DIS (0x1 << 1) -+#define LCDC_LCDISR_DISP (0x1 << 2) -+#define LCDC_LCDISR_FIFOERR (0x1 << 4) -+#define LCDC_LCDISR_BASE (0x1 << 8) -+#define LCDC_LCDISR_OVR1 (0x1 << 9) -+#define LCDC_LCDISR_HEO (0x1 << 11) -+#define LCDC_LCDISR_HCR (0x1 << 12) -+ -+#define ATMEL_LCDC_BASECHER 0x0040 -+#define LCDC_BASECHER_CHEN (0x1 << 0) -+#define LCDC_BASECHER_UPDATEEN (0x1 << 1) -+#define LCDC_BASECHER_A2QEN (0x1 << 2) -+ -+#define ATMEL_LCDC_BASECHDR 0x0044 -+#define LCDC_BASECHDR_CHDIS (0x1 << 0) -+#define LCDC_BASECHDR_CHRST (0x1 << 8) -+ -+#define ATMEL_LCDC_BASECHSR 0x0048 -+#define LCDC_BASECHSR_CHSR (0x1 << 0) -+#define LCDC_BASECHSR_UPDATESR (0x1 << 1) -+#define LCDC_BASECHSR_A2QSR (0x1 << 2) -+ -+#define ATMEL_LCDC_BASEIER 0x004C -+#define LCDC_BASEIER_DMA (0x1 << 2) -+#define LCDC_BASEIER_DSCR (0x1 << 3) -+#define LCDC_BASEIER_ADD (0x1 << 4) -+#define LCDC_BASEIER_DONE (0x1 << 5) -+#define LCDC_BASEIER_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_BASEIDR 0x0050 -+#define LCDC_BASEIDR_DMA (0x1 << 2) -+#define LCDC_BASEIDR_DSCR (0x1 << 3) -+#define LCDC_BASEIDR_ADD (0x1 << 4) -+#define LCDC_BASEIDR_DONE (0x1 << 5) -+#define LCDC_BASEIDR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_BASEIMR 0x0054 -+#define LCDC_BASEIMR_DMA (0x1 << 2) -+#define LCDC_BASEIMR_DSCR (0x1 << 3) -+#define LCDC_BASEIMR_ADD (0x1 << 4) -+#define LCDC_BASEIMR_DONE (0x1 << 5) -+#define LCDC_BASEIMR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_BASEISR 0x0058 -+#define LCDC_BASEISR_DMA (0x1 << 2) -+#define LCDC_BASEISR_DSCR (0x1 << 3) -+#define LCDC_BASEISR_ADD (0x1 << 4) -+#define LCDC_BASEISR_DONE (0x1 << 5) -+#define LCDC_BASEISR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_BASEHEAD 0x005C -+ -+#define ATMEL_LCDC_BASEADDR 0x0060 -+ -+#define ATMEL_LCDC_BASECTRL 0x0064 -+#define LCDC_BASECTRL_DFETCH (0x1 << 0) -+#define LCDC_BASECTRL_LFETCH (0x1 << 1) -+#define LCDC_BASECTRL_DMAIEN (0x1 << 2) -+#define LCDC_BASECTRL_DSCRIEN (0x1 << 3) -+#define LCDC_BASECTRL_ADDIEN (0x1 << 4) -+#define LCDC_BASECTRL_DONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_BASENEXT 0x0068 -+ -+#define ATMEL_LCDC_BASECFG0 0x006C -+#define LCDC_BASECFG0_BLEN_OFFSET 4 -+#define LCDC_BASECFG0_BLEN (0x3 << LCDC_BASECFG0_BLEN_OFFSET) -+#define LCDC_BASECFG0_BLEN_AHB_SINGLE (0x0 << 4) -+#define LCDC_BASECFG0_BLEN_AHB_INCR4 (0x1 << 4) -+#define LCDC_BASECFG0_BLEN_AHB_INCR8 (0x2 << 4) -+#define LCDC_BASECFG0_BLEN_AHB_INCR16 (0x3 << 4) -+#define LCDC_BASECFG0_DLBO (0x1 << 8) -+ -+#define ATMEL_LCDC_BASECFG1 0x0070 -+#define LCDC_BASECFG1_CLUTEN (0x1 << 0) -+#define LCDC_BASECFG1_RGBMODE_OFFSET 4 -+#define LCDC_BASECFG1_RGBMODE (0xf << LCDC_BASECFG1_RGBMODE_OFFSET) -+#define LCDC_BASECFG1_RGBMODE_12BPP_RGB_444 (0x0 << 4) -+#define LCDC_BASECFG1_RGBMODE_16BPP_ARGB_4444 (0x1 << 4) -+#define LCDC_BASECFG1_RGBMODE_16BPP_RGBA_4444 (0x2 << 4) -+#define LCDC_BASECFG1_RGBMODE_16BPP_RGB_565 (0x3 << 4) -+#define LCDC_BASECFG1_RGBMODE_16BPP_TRGB_1555 (0x4 << 4) -+#define LCDC_BASECFG1_RGBMODE_18BPP_RGB_666 (0x5 << 4) -+#define LCDC_BASECFG1_RGBMODE_18BPP_RGB_666_PACKED (0x6 << 4) -+#define LCDC_BASECFG1_RGBMODE_19BPP_TRGB_1666 (0x7 << 4) -+#define LCDC_BASECFG1_RGBMODE_19BPP_TRGB_PACKED (0x8 << 4) -+#define LCDC_BASECFG1_RGBMODE_24BPP_RGB_888 (0x9 << 4) -+#define LCDC_BASECFG1_RGBMODE_24BPP_RGB_888_PACKED (0xA << 4) -+#define LCDC_BASECFG1_RGBMODE_25BPP_TRGB_1888 (0xB << 4) -+#define LCDC_BASECFG1_RGBMODE_32BPP_ARGB_8888 (0xC << 4) -+#define LCDC_BASECFG1_RGBMODE_32BPP_RGBA_8888 (0xD << 4) -+#define LCDC_BASECFG1_CLUTMODE_OFFSET 8 -+#define LCDC_BASECFG1_CLUTMODE (0x3 << LCDC_BASECFG1_CLUTMODE_OFFSET) -+#define LCDC_BASECFG1_CLUTMODE_1BPP (0x0 << 8) -+#define LCDC_BASECFG1_CLUTMODE_2BPP (0x1 << 8) -+#define LCDC_BASECFG1_CLUTMODE_4BPP (0x2 << 8) -+#define LCDC_BASECFG1_CLUTMODE_8BPP (0x3 << 8) -+ -+#define ATMEL_LCDC_BASECFG2 0x0074 -+ -+#define ATMEL_LCDC_BASECFG3 0x0078 -+#define LCDC_BASECFG3_BDEF_OFFSET 0 -+#define LCDC_BASECFG3_BDEF (0xff << LCDC_BASECFG3_BDEF_OFFSET) -+#define LCDC_BASECFG3_GDEF_OFFSET 8 -+#define LCDC_BASECFG3_GDEF (0xff << LCDC_BASECFG3_GDEF_OFFSET) -+#define LCDC_BASECFG3_RDEF_OFFSET 16 -+#define LCDC_BASECFG3_RDEF (0xff << LCDC_BASECFG3_RDEF_OFFSET) -+ -+#define ATMEL_LCDC_BASECFG4 0x007C -+#define LCDC_BASECFG4_DMA (0x1 << 8) -+#define LCDC_BASECFG4_REP (0x1 << 9) -+ -+#define ATMEL_LCDC_OVRCHER1 0x0100 -+#define LCDC_OVRCHER1_CHEN (0x1 << 0) -+#define LCDC_OVRCHER1_UPDATEEN (0x1 << 1) -+#define LCDC_OVRCHER1_A2QEN (0x1 << 2) -+ -+#define ATMEL_LCDC_OVRCHDR1 0x0104 -+#define LCDC_OVRCHDR1_CHDIS (0x1 << 0) -+#define LCDC_OVRCHDR1_CHRST (0x1 << 8) -+ -+#define ATMEL_LCDC_OVRCHSR1 0x0108 -+#define LCDC_OVRCHSR1_CHSR (0x1 << 0) -+#define LCDC_OVRCHSR1_UPDATESR (0x1 << 1) -+#define LCDC_OVRCHSR1_A2QSR (0x1 << 2) -+ -+#define ATMEL_LCDC_OVRIER1 0x010C -+#define LCDC_OVRIER1_DMA (0x1 << 2) -+#define LCDC_OVRIER1_DSCR (0x1 << 3) -+#define LCDC_OVRIER1_ADD (0x1 << 4) -+#define LCDC_OVRIER1_DONE (0x1 << 5) -+#define LCDC_OVRIER1_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_OVRIDR1 0x0110 -+#define LCDC_OVRIDR1_DMA (0x1 << 2) -+#define LCDC_OVRIDR1_DSCR (0x1 << 3) -+#define LCDC_OVRIDR1_ADD (0x1 << 4) -+#define LCDC_OVRIDR1_DONE (0x1 << 5) -+#define LCDC_OVRIDR1_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_OVRIMR1 0x0114 -+#define LCDC_OVRIMR1_DMA (0x1 << 2) -+#define LCDC_OVRIMR1_DSCR (0x1 << 3) -+#define LCDC_OVRIMR1_ADD (0x1 << 4) -+#define LCDC_OVRIMR1_DONE (0x1 << 5) -+#define LCDC_OVRIMR1_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_OVRISR1 0x0118 -+#define LCDC_OVRISR1_DMA (0x1 << 2) -+#define LCDC_OVRISR1_DSCR (0x1 << 3) -+#define LCDC_OVRISR1_ADD (0x1 << 4) -+#define LCDC_OVRISR1_DONE (0x1 << 5) -+#define LCDC_OVRISR1_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_OVRHEAD1 0x011C -+ -+#define ATMEL_LCDC_OVRADDR1 0x0120 -+ -+#define ATMEL_LCDC_OVRCTRL1 0x0124 -+#define LCDC_OVRCTRL1_DFETCH (0x1 << 0) -+#define LCDC_OVRCTRL1_LFETCH (0x1 << 1) -+#define LCDC_OVRCTRL1_DMAIEN (0x1 << 2) -+#define LCDC_OVRCTRL1_DSCRIEN (0x1 << 3) -+#define LCDC_OVRCTRL1_ADDIEN (0x1 << 4) -+#define LCDC_OVRCTRL1_DONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_OVRNEXT1 0x0128 -+ -+#define ATMEL_LCDC_OVR1CFG0 0x012C -+#define LCDC_OVR1CFG0_BLEN_OFFSET 4 -+#define LCDC_OVR1CFG0_BLEN (0x3 << LCDC_OVR1CFG0_BLEN_OFFSET) -+#define LCDC_OVR1CFG0_BLEN_AHB_SINGLE (0x0 << 4) -+#define LCDC_OVR1CFG0_BLEN_AHB_INCR4 (0x1 << 4) -+#define LCDC_OVR1CFG0_BLEN_AHB_INCR8 (0x2 << 4) -+#define LCDC_OVR1CFG0_BLEN_AHB_INCR16 (0x3 << 4) -+#define LCDC_OVR1CFG0_DLBO (0x1 << 8) -+#define LCDC_OVR1CFG0_ROTDIS (0x1 << 12) -+#define LCDC_OVR1CFG0_LOCKDIS (0x1 << 13) -+ -+#define ATMEL_LCDC_OVR1CFG1 0x0130 -+#define LCDC_OVR1CFG1_CLUTEN (0x1 << 0) -+#define LCDC_OVR1CFG1_RGBMODE_OFFSET 4 -+#define LCDC_OVR1CFG1_RGBMODE (0xf << LCDC_OVR1CFG1_RGBMODE_OFFSET) -+#define LCDC_OVR1CFG1_RGBMODE_12BPP_RGB_444 (0x0 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_16BPP_ARGB_4444 (0x1 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_16BPP_RGBA_4444 (0x2 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_16BPP_RGB_565 (0x3 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_16BPP_TRGB_1555 (0x4 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_18BPP_RGB_666 (0x5 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_18BPP_RGB_666_PACKED (0x6 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_19BPP_TRGB_1666 (0x7 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_19BPP_TRGB_PACKED (0x8 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_24BPP_RGB_888 (0x9 << 4) -+#define LCDC_OVR1CFG1_RGBMODE_24BPP_RGB_888_PACKED (0xA << 4) -+#define LCDC_OVR1CFG1_RGBMODE_25BPP_TRGB_1888 (0xB << 4) -+#define LCDC_OVR1CFG1_RGBMODE_32BPP_ARGB_8888 (0xC << 4) -+#define LCDC_OVR1CFG1_RGBMODE_32BPP_RGBA_8888 (0xD << 4) -+#define LCDC_OVR1CFG1_CLUTMODE_OFFSET 8 -+#define LCDC_OVR1CFG1_CLUTMODE (0x3 << LCDC_OVR1CFG1_CLUTMODE_OFFSET) -+#define LCDC_OVR1CFG1_CLUTMODE_1BPP (0x0 << 8) -+#define LCDC_OVR1CFG1_CLUTMODE_2BPP (0x1 << 8) -+#define LCDC_OVR1CFG1_CLUTMODE_4BPP (0x2 << 8) -+#define LCDC_OVR1CFG1_CLUTMODE_8BPP (0x3 << 8) -+ -+#define ATMEL_LCDC_OVR1CFG2 0x0134 -+#define LCDC_OVR1CFG2_XOFFSET_OFFSET 0 -+#define LCDC_OVR1CFG2_XOFFSET (0x7ff << LCDC_OVR1CFG2_XOFFSET_OFFSET) -+#define LCDC_OVR1CFG2_YOFFSET_OFFSET 16 -+#define LCDC_OVR1CFG2_YOFFSET (0x7ff << LCDC_OVR1CFG2_YOFFSET_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CFG3 0x0138 -+#define LCDC_OVR1CFG3_XSIZE_OFFSET 0 -+#define LCDC_OVR1CFG3_XSIZE (0x7ff << LCDC_OVR1CFG3_XSIZE_OFFSET) -+#define LCDC_OVR1CFG3_YSIZE_OFFSET 16 -+#define LCDC_OVR1CFG3_YSIZE (0x7ff << LCDC_OVR1CFG3_YSIZE_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CFG4 0x013C -+ -+#define ATMEL_LCDC_OVR1CFG5 0x0140 -+ -+#define ATMEL_LCDC_OVR1CFG6 0x0144 -+#define LCDC_OVR1CFG6_BDEF_OFFSET 0 -+#define LCDC_OVR1CFG6_BDEF (0xff << LCDC_OVR1CFG6_BDEF_OFFSET) -+#define LCDC_OVR1CFG6_GDEF_OFFSET 8 -+#define LCDC_OVR1CFG6_GDEF (0xff << LCDC_OVR1CFG6_GDEF_OFFSET) -+#define LCDC_OVR1CFG6_RDEF_OFFSET 16 -+#define LCDC_OVR1CFG6_RDEF (0xff << LCDC_OVR1CFG6_RDEF_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CFG7 0x0148 -+#define LCDC_OVR1CFG7_BKEY_OFFSET 0 -+#define LCDC_OVR1CFG7_BKEY (0xff << LCDC_OVR1CFG7_BKEY_OFFSET) -+#define LCDC_OVR1CFG7_GKEY_OFFSET 8 -+#define LCDC_OVR1CFG7_GKEY (0xff << LCDC_OVR1CFG7_GKEY_OFFST) -+#define LCDC_OVR1CFG7_RKEY_OFFSET 16 -+#define LCDC_OVR1CFG7_RKEY (0xff << LCDC_OVR1CFG7_RKEY_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CFG8 0x014C -+#define LCDC_OVR1CFG8_BMASK_OFFSET 0 -+#define LCDC_OVR1CFG8_BMASK (0xff << LCDC_OVR1CFG8_BMASK_OFFSET) -+#define LCDC_OVR1CFG8_GMASK_OFFSET 8 -+#define LCDC_OVR1CFG8_GMASK (0xff << LCDC_OVR1CFG8_GMASK_OFFSET) -+#define LCDC_OVR1CFG8_RMASK_OFFSET 16 -+#define LCDC_OVR1CFG8_RMASK (0xff << LCDC_OVR1CFG8_RMASK_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CFG9 0x0150 -+#define LCDC_OVR1CFG9_CRKEY (0x1 << 0) -+#define LCDC_OVR1CFG9_INV (0x1 << 1) -+#define LCDC_OVR1CFG9_ITER2BL (0x1 << 2) -+#define LCDC_OVR1CFG9_ITER (0x1 << 3) -+#define LCDC_OVR1CFG9_REVALPHA (0x1 << 4) -+#define LCDC_OVR1CFG9_GAEN (0x1 << 5) -+#define LCDC_OVR1CFG9_LAEN (0x1 << 6) -+#define LCDC_OVR1CFG9_OVR (0x1 << 7) -+#define LCDC_OVR1CFG9_DMA (0x1 << 8) -+#define LCDC_OVR1CFG9_REP (0x1 << 9) -+#define LCDC_OVR1CFG9_DSTKEY (0x1 << 10) -+#define LCDC_OVR1CFG9_GA_OFFSET 16 -+#define LCDC_OVR1CFG9_GA (0xff << LCDC_OVR1CFG9_GA_OFFSET) -+ -+#define ATMEL_LCDC_HEOCHER 0x0280 -+#define LCDC_HEOCHER_CHEN (0x1 << 0) -+#define LCDC_HEOCHER_UPDATEEN (0x1 << 1) -+#define LCDC_HEOCHER_A2QEN (0x1 << 2) -+ -+#define ATMEL_LCDC_HEOCHDR 0x0284 -+#define LCDC_HEOCHDR_CHDIS (0x1 << 0) -+#define LCDC_HEOCHDR_CHRST (0x1 << 8) -+ -+#define ATMEL_LCDC_HEOCHSR 0x0288 -+#define LCDC_HEOCHSR_CHSR (0x1 << 0) -+#define LCDC_HEOCHSR_UPDATESR (0x1 << 1) -+#define LCDC_HEOCHSR_A2QSR (0x1 << 2) -+ -+#define ATMEL_LCDC_HEOIER 0x028C -+#define LCDC_HEOIER_DMA (0x1 << 2) -+#define LCDC_HEOIER_DSCR (0x1 << 3) -+#define LCDC_HEOIER_ADD (0x1 << 4) -+#define LCDC_HEOIER_DONE (0x1 << 5) -+#define LCDC_HEOIER_OVR (0x1 << 6) -+#define LCDC_HEOIER_UDMA (0x1 << 10) -+#define LCDC_HEOIER_UDSCR (0x1 << 11) -+#define LCDC_HEOIER_UADD (0x1 << 12) -+#define LCDC_HEOIER_UDONE (0x1 << 13) -+#define LCDC_HEOIER_UOVR (0x1 << 14) -+#define LCDC_HEOIER_VDMA (0x1 << 18) -+#define LCDC_HEOIER_VDSCR (0x1 << 19) -+#define LCDC_HEOIER_VADD (0x1 << 20) -+#define LCDC_HEOIER_VDONE (0x1 << 21) -+#define LCDC_HEOIER_VOVR (0x1 << 22) -+ -+#define ATMEL_LCDC_HEOIDR 0x0290 -+#define LCDC_HEOIDR_DMA (0x1 << 2) -+#define LCDC_HEOIDR_DSCR (0x1 << 3) -+#define LCDC_HEOIDR_ADD (0x1 << 4) -+#define LCDC_HEOIDR_DONE (0x1 << 5) -+#define LCDC_HEOIDR_OVR (0x1 << 6) -+#define LCDC_HEOIDR_UDMA (0x1 << 10) -+#define LCDC_HEOIDR_UDSCR (0x1 << 11) -+#define LCDC_HEOIDR_UADD (0x1 << 12) -+#define LCDC_HEOIDR_UDONE (0x1 << 13) -+#define LCDC_HEOIDR_UOVR (0x1 << 14) -+#define LCDC_HEOIDR_VDMA (0x1 << 18) -+#define LCDC_HEOIDR_VDSCR (0x1 << 19) -+#define LCDC_HEOIDR_VADD (0x1 << 20) -+#define LCDC_HEOIDR_VDONE (0x1 << 21) -+#define LCDC_HEOIDR_VOVR (0x1 << 22) -+ -+#define ATMEL_LCDC_HEOIMR 0x0294 -+#define LCDC_HEOIMR_DMA (0x1 << 2) -+#define LCDC_HEOIMR_DSCR (0x1 << 3) -+#define LCDC_HEOIMR_ADD (0x1 << 4) -+#define LCDC_HEOIMR_DONE (0x1 << 5) -+#define LCDC_HEOIMR_OVR (0x1 << 6) -+#define LCDC_HEOIMR_UDMA (0x1 << 10) -+#define LCDC_HEOIMR_UDSCR (0x1 << 11) -+#define LCDC_HEOIMR_UADD (0x1 << 12) -+#define LCDC_HEOIMR_UDONE (0x1 << 13) -+#define LCDC_HEOIMR_UOVR (0x1 << 14) -+#define LCDC_HEOIMR_VDMA (0x1 << 18) -+#define LCDC_HEOIMR_VDSCR (0x1 << 19) -+#define LCDC_HEOIMR_VADD (0x1 << 20) -+#define LCDC_HEOIMR_VDONE (0x1 << 21) -+#define LCDC_HEOIMR_VOVR (0x1 << 22) -+ -+#define ATMEL_LCDC_HEOISR 0x0298 -+#define LCDC_HEOISR_DMA (0x1 << 2) -+#define LCDC_HEOISR_DSCR (0x1 << 3) -+#define LCDC_HEOISR_ADD (0x1 << 4) -+#define LCDC_HEOISR_DONE (0x1 << 5) -+#define LCDC_HEOISR_OVR (0x1 << 6) -+#define LCDC_HEOISR_UDMA (0x1 << 10) -+#define LCDC_HEOISR_UDSCR (0x1 << 11) -+#define LCDC_HEOISR_UADD (0x1 << 12) -+#define LCDC_HEOISR_UDONE (0x1 << 13) -+#define LCDC_HEOISR_UOVR (0x1 << 14) -+#define LCDC_HEOISR_VDMA (0x1 << 18) -+#define LCDC_HEOISR_VDSCR (0x1 << 19) -+#define LCDC_HEOISR_VADD (0x1 << 20) -+#define LCDC_HEOISR_VDONE (0x1 << 21) -+#define LCDC_HEOISR_VOVR (0x1 << 22) -+ -+#define ATMEL_LCDC_HEOHEAD 0x029C -+ -+#define ATMEL_LCDC_HEOADDR 0x02A0 -+ -+#define ATMEL_LCDC_HEOCTRL 0x02A4 -+#define LCDC_HEOCTRL_DFETCH (0x1 << 0) -+#define LCDC_HEOCTRL_LFETCH (0x1 << 1) -+#define LCDC_HEOCTRL_DMAIEN (0x1 << 2) -+#define LCDC_HEOCTRL_DSCRIEN (0x1 << 3) -+#define LCDC_HEOCTRL_ADDIEN (0x1 << 4) -+#define LCDC_HEOCTRL_DONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_HEONEXT 0x02A8 -+ -+#define ATMEL_LCDC_HEOUHEAD 0x02AC -+ -+#define ATMEL_LCDC_HEOUADDR 0x02B0 -+ -+#define ATMEL_LCDC_HEOUCTRL 0x02B4 -+#define LCDC_HEOUCTRL_UDFETCH (0x1 << 0) -+#define LCDC_HEOUCTRL_UDMAIEN (0x1 << 2) -+#define LCDC_HEOUCTRL_UDSCRIEN (0x1 << 3) -+#define LCDC_HEOUCTRL_UADDIEN (0x1 << 4) -+#define LCDC_HEOUCTRL_UDONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_HEOUNEXT 0x02B8 -+ -+#define ATMEL_LCDC_HEOVHEAD 0x02BC -+ -+#define ATMEL_LCDC_HEOVADDR 0x02C0 -+ -+#define ATMEL_LCDC_HEOVCTRL 0x02C4 -+#define LCDC_HEOVCTRL_VDFETCH (0x1 << 0) -+#define LCDC_HEOVCTRL_VDMAIEN (0x1 << 2) -+#define LCDC_HEOVCTRL_VDSCRIEN (0x1 << 3) -+#define LCDC_HEOVCTRL_VADDIEN (0x1 << 4) -+#define LCDC_HEOVCTRL_VDONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_HEOVNEXT 0x02C8 -+ -+#define ATMEL_LCDC_HEOCFG0 0x02CC -+#define LCDC_HEOCFG0_BLEN_OFFSET 4 -+#define LCDC_HEOCFG0_BLEN (0x3 << LCDC_HEOCFG0_BLEN_OFFSET) -+#define LCDC_HEOCFG0_BLEN_AHB_SINGLE (0x0 << 4) -+#define LCDC_HEOCFG0_BLEN_AHB_INCR4 (0x1 << 4) -+#define LCDC_HEOCFG0_BLEN_AHB_INCR8 (0x2 << 4) -+#define LCDC_HEOCFG0_BLEN_AHB_INCR16 (0x3 << 4) -+#define LCDC_HEOCFG0_BLENUV_OFFSET 6 -+#define LCDC_HEOCFG0_BLENUV (0x3 << LCDC_HEOCFG0_BLENUV_OFFSET) -+#define LCDC_HEOCFG0_BLENUV_AHB_SINGLE (0x0 << 6) -+#define LCDC_HEOCFG0_BLENUV_AHB_INCR4 (0x1 << 6) -+#define LCDC_HEOCFG0_BLENUV_AHB_INCR8 (0x2 << 6) -+#define LCDC_HEOCFG0_BLENUV_AHB_INCR16 (0x3 << 6) -+#define LCDC_HEOCFG0_DLBO (0x1 << 8) -+#define LCDC_HEOCFG0_ROTDIS (0x1 << 12) -+#define LCDC_HEOCFG0_LOCKDIS (0x1 << 13) -+ -+#define ATMEL_LCDC_HEOCFG1 0x02D0 -+#define LCDC_HEOCFG1_CLUTEN (0x1 << 0) -+#define LCDC_HEOCFG1_YUVEN (0x1 << 1) -+#define LCDC_HEOCFG1_RGBMODE_OFFSET 4 -+#define LCDC_HEOCFG1_RGBMODE (0xf << LCDC_HEOCFG1_RGBMODE_OFFSET) -+#define LCDC_HEOCFG1_RGBMODE_12BPP_RGB_444 (0x0 << 4) -+#define LCDC_HEOCFG1_RGBMODE_16BPP_ARGB_4444 (0x1 << 4) -+#define LCDC_HEOCFG1_RGBMODE_16BPP_RGBA_4444 (0x2 << 4) -+#define LCDC_HEOCFG1_RGBMODE_16BPP_RGB_565 (0x3 << 4) -+#define LCDC_HEOCFG1_RGBMODE_16BPP_TRGB_1555 (0x4 << 4) -+#define LCDC_HEOCFG1_RGBMODE_18BPP_RGB_666 (0x5 << 4) -+#define LCDC_HEOCFG1_RGBMODE_18BPP_RGB_666_PACKED (0x6 << 4) -+#define LCDC_HEOCFG1_RGBMODE_19BPP_TRGB_1666 (0x7 << 4) -+#define LCDC_HEOCFG1_RGBMODE_19BPP_TRGB_PACKED (0x8 << 4) -+#define LCDC_HEOCFG1_RGBMODE_24BPP_RGB_888 (0x9 << 4) -+#define LCDC_HEOCFG1_RGBMODE_24BPP_RGB_888_PACKED (0xA << 4) -+#define LCDC_HEOCFG1_RGBMODE_25BPP_TRGB_1888 (0xB << 4) -+#define LCDC_HEOCFG1_RGBMODE_32BPP_ARGB_8888 (0xC << 4) -+#define LCDC_HEOCFG1_RGBMODE_32BPP_RGBA_8888 (0xD << 4) -+#define LCDC_HEOCFG1_CLUTMODE_OFFSET 8 -+#define LCDC_HEOCFG1_CLUTMODE (0x3 << LCDC_HEOCFG1_CLUTMODE_OFFSET) -+#define LCDC_HEOCFG1_CLUTMODE_1BPP (0x0 << 8) -+#define LCDC_HEOCFG1_CLUTMODE_2BPP (0x1 << 8) -+#define LCDC_HEOCFG1_CLUTMODE_4BPP (0x2 << 8) -+#define LCDC_HEOCFG1_CLUTMODE_8BPP (0x3 << 8) -+#define LCDC_HEOCFG1_YUVMODE_OFFSET 12 -+#define LCDC_HEOCFG1_YUVMODE (0xf << LCDC_HEOCFG1_YUVMODE_OFFSET) -+#define LCDC_HEOCFG1_YUVMODE_32BPP_AYCBCR (0x0 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_MODE0 (0x1 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_MODE1 (0x2 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_MODE2 (0x3 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_MODE3 (0x4 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_SEMIPLANAR (0x5 << 12) -+#define LCDC_HEOCFG1_YUVMODE_16BPP_YCBCR_PLANAR (0x6 << 12) -+#define LCDC_HEOCFG1_YUVMODE_12BPP_YCBCR_SEMIPLANAR (0x7 << 12) -+#define LCDC_HEOCFG1_YUVMODE_12BPP_YCBCR_PLANAR (0x8 << 12) -+#define LCDC_HEOCFG1_YUV422ROT (0x1 << 16) -+#define LCDC_HEOCFG1_YUV422SWP (0x1 << 17) -+ -+#define ATMEL_LCDC_HEOCFG2 0x02D4 -+#define LCDC_HEOCFG2_XOFFSET_OFFSET 0 -+#define LCDC_HEOCFG2_XOFFSET (0x7ff << LCDC_HEOCFG2_XOFFSET_OFFSET) -+#define LCDC_HEOCFG2_YOFFSET_OFFSET 16 -+#define LCDC_HEOCFG2_YOFFSET (0x7ff << LCDC_HEOCFG2_YOFFSET_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG3 0x02D8 -+#define LCDC_HEOCFG3_XSIZE_OFFSET 0 -+#define LCDC_HEOCFG3_XSIZE (0x7ff << LCDC_HEOCFG3_XSIZE_OFFSET) -+#define LCDC_HEOCFG3_YSIZE_OFFSET 16 -+#define LCDC_HEOCFG3_YSIZE (0x7ff << LCDC_HEOCFG3_YSIZE_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG4 0x02DC -+#define LCDC_HEOCFG4_XMEM_SIZE_OFFSET 0 -+#define LCDC_HEOCFG4_XMEM_SIZE (0x7ff << LCDC_HEOCFG4_XMEM_SIZE_OFFSET) -+#define LCDC_HEOCFG4_YMEM_SIZE_OFFSET 16 -+#define LCDC_HEOCFG4_YMEM_SIZE (0x7ff << LCDC_HEOCFG4_YMEM_SIZE_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG5 0x02E0 -+ -+#define ATMEL_LCDC_HEOCFG6 0x02E4 -+ -+#define ATMEL_LCDC_HEOCFG7 0x02E8 -+ -+#define ATMEL_LCDC_HEOCFG8 0x02EC -+ -+#define ATMEL_LCDC_HEOCFG9 0x02F0 -+#define LCDC_HEOCFG9_BDEF_OFFSET 0 -+#define LCDC_HEOCFG9_BDEF (0xff << LCDC_HEOCFG9_BDEF_OFFSET) -+#define LCDC_HEOCFG9_GDEF_OFFSET 8 -+#define LCDC_HEOCFG9_GDEF (0xff << LCDC_HEOCFG9_GDEF_OFFSET) -+#define LCDC_HEOCFG9_RDEF_OFFSET 16 -+#define LCDC_HEOCFG9_RDEF (0xff << LCDC_HEOCFG9_RDEF_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG10 0x02F4 -+#define LCDC_HEOCFG10_BKEY_OFFSET 0 -+#define LCDC_HEOCFG10_BKEY (0xff << LCDC_HEOCFG10_BKEY_OFFSET) -+#define LCDC_HEOCFG10_GKEY_OFFSET 8 -+#define LCDC_HEOCFG10_GKEY (0xff << LCDC_HEOCFG10_GKEY_OFFSET) -+#define LCDC_HEOCFG10_RKEY_OFFSET 16 -+#define LCDC_HEOCFG10_RKEY (0xff << LCDC_HEOCFG10_RKEY_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG11 0x02F8 -+#define LCDC_HEOCFG11_BMASK_OFFSET 0 -+#define LCDC_HEOCFG11_BMASK (0xff << LCDC_HEOCFG11_BMASK_OFFSET) -+#define LCDC_HEOCFG11_GMASK_OFFSET 8 -+#define LCDC_HEOCFG11_GMASK (0xff << LCDC_HEOCFG11_GMASK_OFFSET) -+#define LCDC_HEOCFG11_RMASK_OFFSET 16 -+#define LCDC_HEOCFG11_RMASK (0xff << LCDC_HEOCFG11_RMASK_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG12 0x02FC -+#define LCDC_HEOCFG12_CRKEY (0x1 << 0) -+#define LCDC_HEOCFG12_INV (0x1 << 1) -+#define LCDC_HEOCFG12_ITER2BL (0x1 << 2) -+#define LCDC_HEOCFG12_ITER (0x1 << 3) -+#define LCDC_HEOCFG12_REVALPHA (0x1 << 4) -+#define LCDC_HEOCFG12_GAEN (0x1 << 5) -+#define LCDC_HEOCFG12_LAEN (0x1 << 6) -+#define LCDC_HEOCFG12_OVR (0x1 << 7) -+#define LCDC_HEOCFG12_DMA (0x1 << 8) -+#define LCDC_HEOCFG12_REP (0x1 << 9) -+#define LCDC_HEOCFG12_DSTKEY (0x1 << 10) -+#define LCDC_HEOCFG12_VIDPRI (0x1 << 12) -+#define LCDC_HEOCFG12_GA_OFFSET 16 -+#define LCDC_HEOCFG12_GA (0xff << LCDC_HEOCFG12_GA_OFFSET) -+ -+#define ATMEL_LCDC_HEOCFG13 0x0300 -+#define LCDC_HEOCFG13_XFACTOR_OFFSET 0 -+#define LCDC_HEOCFG13_XFACTOR (0x1fff << LCDC_HEOCFG13_XFACTOR_OFFSET) -+#define LCDC_HEOCFG13_YFACTOR_OFFSET 16 -+#define LCDC_HEOCFG13_YFACTOR (0x1fff << LCDC_HEOCFG13_YFACTOR_OFFSET) -+#define LCDC_HEOCFG13_SCALEN (0x1 << 31) -+ -+#define ATMEL_LCDC_HEOCFG14 0x0304 -+#define LCDC_HEOCFG14_CSCRY_OFFSET 0 -+#define LCDC_HEOCFG14_CSCRY (0x3ff << LCDC_HEOCFG14_CSCRY_OFFSET) -+#define LCDC_HEOCFG14_CSCRU_OFFSET 10 -+#define LCDC_HEOCFG14_CSCRU (0x3ff << LCDC_HEOCFG14_CSCRU_OFFSET) -+#define LCDC_HEOCFG14_CSCRV_OFFSET 20 -+#define LCDC_HEOCFG14_CSCRV (0x3ff << LCDC_HEOCFG14_CSCRV_OFFSET) -+#define LCDC_HEOCFG14_CSCYOFF (0x1 << 30) -+ -+#define ATMEL_LCDC_HEOCFG15 0x0308 -+#define LCDC_HEOCFG15_CSCGY_OFFSET 0 -+#define LCDC_HEOCFG15_CSCGY (0x3ff << LCDC_HEOCFG15_CSCGY_OFFSET) -+#define LCDC_HEOCFG15_CSCGU_OFFSET 10 -+#define LCDC_HEOCFG15_CSCGU (0x3ff << LCDC_HEOCFG15_CSCGU_OFFSET) -+#define LCDC_HEOCFG15_CSCGV_OFFSET 20 -+#define LCDC_HEOCFG15_CSCGV (0x3ff << LCDC_HEOCFG15_CSCGV_OFFSET) -+#define LCDC_HEOCFG15_CSCUOFF (0x1 << 30) -+ -+#define ATMEL_LCDC_HEOCFG16 0x030C -+#define LCDC_HEOCFG16_CSCBY_OFFSET 0 -+#define LCDC_HEOCFG16_CSCBY (0x3ff << LCDC_HEOCFG16_CSCBY_OFFSET) -+#define LCDC_HEOCFG16_CSCBU_OFFSET 10 -+#define LCDC_HEOCFG16_CSCBU (0x3ff << LCDC_HEOCFG16_CSCBU_OFFSET) -+#define LCDC_HEOCFG16_CSCBV_OFFSET 20 -+#define LCDC_HEOCFG16_CSCBV (0x3ff << LCDC_HEOCFG16_CSCBV_OFFSET) -+#define LCDC_HEOCFG16_CSCVOFF (0x1 << 30) -+ -+#define ATMEL_LCDC_HCRCHER 0x0340 -+#define LCDC_HCRCHER_CHEN (0x1 << 0) -+#define LCDC_HCRCHER_UPDATEEN (0x1 << 1) -+#define LCDC_HCRCHER_A2QEN (0x1 << 2) -+ -+#define ATMEL_LCDC_HCRCHDR 0x0344 -+#define LCDC_HCRCHDR_CHDIS (0x1 << 0) -+#define LCDC_HCRCHDR_CHRST (0x1 << 8) -+ -+#define ATMEL_LCDC_HCRCHSR 0x0348 -+#define LCDC_HCRCHSR_CHSR (0x1 << 0) -+#define LCDC_HCRCHSR_UPDATESR (0x1 << 1) -+#define LCDC_HCRCHSR_A2QSR (0x1 << 2) -+ -+#define ATMEL_LCDC_HCRIER 0x034C -+#define LCDC_HCRIER_DMA (0x1 << 2) -+#define LCDC_HCRIER_DSCR (0x1 << 3) -+#define LCDC_HCRIER_ADD (0x1 << 4) -+#define LCDC_HCRIER_DONE (0x1 << 5) -+#define LCDC_HCRIER_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_HCRIDR 0x0350 -+#define LCDC_HCRIDR_DMA (0x1 << 2) -+#define LCDC_HCRIDR_DSCR (0x1 << 3) -+#define LCDC_HCRIDR_ADD (0x1 << 4) -+#define LCDC_HCRIDR_DONE (0x1 << 5) -+#define LCDC_HCRIDR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_HCRIMR 0x0354 -+#define LCDC_HCRIMR_DMA (0x1 << 2) -+#define LCDC_HCRIMR_DSCR (0x1 << 3) -+#define LCDC_HCRIMR_ADD (0x1 << 4) -+#define LCDC_HCRIMR_DONE (0x1 << 5) -+#define LCDC_HCRIMR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_HCRISR 0x0358 -+#define LCDC_HCRISR_DMA (0x1 << 2) -+#define LCDC_HCRISR_DSCR (0x1 << 3) -+#define LCDC_HCRISR_ADD (0x1 << 4) -+#define LCDC_HCRISR_DONE (0x1 << 5) -+#define LCDC_HCRISR_OVR (0x1 << 6) -+ -+#define ATMEL_LCDC_HCRHEAD 0x035C -+ -+#define ATMEL_LCDC_HCRADDR 0x0360 -+ -+#define ATMEL_LCDC_HCRCTRL 0x0364 -+#define LCDC_HCRCTRL_DFETCH (0x1 << 0) -+#define LCDC_HCRCTRL_LFETCH (0x1 << 1) -+#define LCDC_HCRCTRL_DMAIEN (0x1 << 2) -+#define LCDC_HCRCTRL_DSCRIEN (0x1 << 3) -+#define LCDC_HCRCTRL_ADDIEN (0x1 << 4) -+#define LCDC_HCRCTRL_DONEIEN (0x1 << 5) -+ -+#define ATMEL_LCDC_HCRNEXT 0x0368 -+ -+#define ATMEL_LCDC_HCRCFG0 0x036C -+#define LCDC_HCRCFG0_BLEN_OFFSET 4 -+#define LCDC_HCRCFG0_BLEN (0x3 << LCDC_HCRCFG0_BLEN_OFFSET) -+#define LCDC_HCRCFG0_BLEN_AHB_SINGLE (0x0 << 4) -+#define LCDC_HCRCFG0_BLEN_AHB_INCR4 (0x1 << 4) -+#define LCDC_HCRCFG0_BLEN_AHB_INCR8 (0x2 << 4) -+#define LCDC_HCRCFG0_BLEN_AHB_INCR16 (0x3 << 4) -+#define LCDC_HCRCFG0_DLBO (0x1 << 8) -+ -+#define ATMEL_LCDC_HCRCFG1 0x0370 -+#define LCDC_HCRCFG1_CLUTEN (0x1 << 0) -+#define LCDC_HCRCFG1_RGBMODE_OFFSET 4 -+#define LCDC_HCRCFG1_RGBMODE (0xf << LCDC_HCRCFG1_RGBMODE_OFFSET) -+#define LCDC_HCRCFG1_RGBMODE_12BPP_RGB_444 (0x0 << 4) -+#define LCDC_HCRCFG1_RGBMODE_16BPP_ARGB_4444 (0x1 << 4) -+#define LCDC_HCRCFG1_RGBMODE_16BPP_RGBA_4444 (0x2 << 4) -+#define LCDC_HCRCFG1_RGBMODE_16BPP_RGB_565 (0x3 << 4) -+#define LCDC_HCRCFG1_RGBMODE_16BPP_TRGB_1555 (0x4 << 4) -+#define LCDC_HCRCFG1_RGBMODE_18BPP_RGB_666 (0x5 << 4) -+#define LCDC_HCRCFG1_RGBMODE_18BPP_RGB_666_PACKED (0x6 << 4) -+#define LCDC_HCRCFG1_RGBMODE_19BPP_TRGB_1666 (0x7 << 4) -+#define LCDC_HCRCFG1_RGBMODE_19BPP_TRGB_PACKED (0x8 << 4) -+#define LCDC_HCRCFG1_RGBMODE_24BPP_RGB_888 (0x9 << 4) -+#define LCDC_HCRCFG1_RGBMODE_24BPP_RGB_888_PACKED (0xA << 4) -+#define LCDC_HCRCFG1_RGBMODE_25BPP_TRGB_1888 (0xB << 4) -+#define LCDC_HCRCFG1_RGBMODE_32BPP_ARGB_8888 (0xC << 4) -+#define LCDC_HCRCFG1_RGBMODE_32BPP_RGBA_8888 (0xD << 4) -+#define LCDC_HCRCFG1_CLUTMODE_OFFSET 8 -+#define LCDC_HCRCFG1_CLUTMODE (0x3 << LCDC_HCRCFG1_CLUTMODE_OFFSET) -+#define LCDC_HCRCFG1_CLUTMODE_1BPP (0x0 << 8) -+#define LCDC_HCRCFG1_CLUTMODE_2BPP (0x1 << 8) -+#define LCDC_HCRCFG1_CLUTMODE_4BPP (0x2 << 8) -+#define LCDC_HCRCFG1_CLUTMODE_8BPP (0x3 << 8) -+ -+#define ATMEL_LCDC_HCRCFG2 0x0374 -+#define LCDC_HCRCFG2_XOFFSET_OFFSET 0 -+#define LCDC_HCRCFG2_XOFFSET (0x7ff << LCDC_HCRCFG2_XOFFSET_OFFSET) -+#define LCDC_HCRCFG2_YOFFSET_OFFSET 16 -+#define LCDC_HCRCFG2_YOFFSET (0x7ff << LCDC_HCRCFG2_YOFFSET_OFFSET) -+ -+#define ATMEL_LCDC_HCRCFG3 0x0378 -+#define LCDC_HCRCFG3_XSIZE_OFFSET 0 -+#define LCDC_HCRCFG3_XSIZE (0x7f << LCDC_HCRCFG3_XSIZE_OFFSET) -+#define LCDC_HCRCFG3_YSIZE_OFFSET 16 -+#define LCDC_HCRCFG3_YSIZE (0x7f << LCDC_HCRCFG3_YSIZE_OFFSET) -+ -+#define ATMEL_LCDC_HCRCFG4 0x037C -+ -+#define ATMEL_LCDC_HCRCFG6 0x0384 -+#define LCDC_HCRCFG6_BDEF_OFFSET 0 -+#define LCDC_HCRCFG6_BDEF (0xff << LCDC_HCRCFG6_BDEF_OFFSET) -+#define LCDC_HCRCFG6_GDEF_OFFSET 8 -+#define LCDC_HCRCFG6_GDEF (0xff << LCDC_HCRCFG6_GDEF_OFFSET) -+#define LCDC_HCRCFG6_RDEF_OFFSET 16 -+#define LCDC_HCRCFG6_RDEF (0xff << LCDC_HCRCFG6_RDEF_OFFSET) -+ -+#define ATMEL_LCDC_HCRCFG7 0x0388 -+#define LCDC_HCRCFG7_BKEY_OFFSET 0 -+#define LCDC_HCRCFG7_BKEY (0xff << LCDC_HCRCFG7_BKEY_OFFSET) -+#define LCDC_HCRCFG7_GKEY_OFFSET 8 -+#define LCDC_HCRCFG7_GKEY (0xff << LCDC_HCRCFG7_GKEY_OFFSET) -+#define LCDC_HCRCFG7_RKEY_OFFSET 16 -+#define LCDC_HCRCFG7_RKEY (0xff << LCDC_HCRCFG7_RKEY_OFFSET) -+ -+#define ATMEL_LCDC_HCRCFG8 0x038C -+#define LCDC_HCRCFG8_BMASK_OFFSET 0 -+#define LCDC_HCRCFG8_BMASK (0xff << LCDC_HCRCFG8_BMASK_OFFSET) -+#define LCDC_HCRCFG8_GMASK_OFFSET 8 -+#define LCDC_HCRCFG8_GMASK (0xff << LCDC_HCRCFG8_GMASK_OFFSET) -+#define LCDC_HCRCFG8_RMASK_OFFSET 16 -+#define LCDC_HCRCFG8_RMASK (0xff << LCDC_HCRCFG8_RMASK_OFFSET) -+ -+#define ATMEL_LCDC_HCRCFG9 0x0390 -+#define LCDC_HCRCFG9_CRKEY (0x1 << 0) -+#define LCDC_HCRCFG9_INV (0x1 << 1) -+#define LCDC_HCRCFG9_ITER2BL (0x1 << 2) -+#define LCDC_HCRCFG9_ITER (0x1 << 3) -+#define LCDC_HCRCFG9_REVALPHA (0x1 << 4) -+#define LCDC_HCRCFG9_GAEN (0x1 << 5) -+#define LCDC_HCRCFG9_LAEN (0x1 << 6) -+#define LCDC_HCRCFG9_OVR (0x1 << 7) -+#define LCDC_HCRCFG9_DMA (0x1 << 8) -+#define LCDC_HCRCFG9_REP (0x1 << 9) -+#define LCDC_HCRCFG9_DSTKEY (0x1 << 10) -+#define LCDC_HCRCFG9_GA_OFFSET 16 -+#define LCDC_HCRCFG9_GA_Msk (0xff << LCDC_HCRCFG9_GA_OFFSET) -+ -+#define ATMEL_LCDC_BASECLUT 0x400 -+#define LCDC_BASECLUT_BCLUT_OFFSET 0 -+#define LCDC_BASECLUT_BCLUT (0xff << LCDC_BASECLUT_BCLUT_OFFSET) -+#define LCDC_BASECLUT_GCLUT_OFFSET 8 -+#define LCDC_BASECLUT_GCLUT (0xff << LCDC_BASECLUT_GCLUT_OFFSET) -+#define LCDC_BASECLUT_RCLUT_OFFSET 16 -+#define LCDC_BASECLUT_RCLUT (0xff << LCDC_BASECLUT_RCLUT_OFFSET) -+ -+#define ATMEL_LCDC_OVR1CLUT 0x800 -+#define LCDC_OVR1CLUT_BCLUT_OFFSET 0 -+#define LCDC_OVR1CLUT_BCLUT (0xff << LCDC_OVR1CLUT_BCLUT_OFFSET) -+#define LCDC_OVR1CLUT_GCLUT_OFFSET 8 -+#define LCDC_OVR1CLUT_GCLUT (0xff << LCDC_OVR1CLUT_GCLUT_OFFSET) -+#define LCDC_OVR1CLUT_RCLUT_OFFSET 16 -+#define LCDC_OVR1CLUT_RCLUT (0xff << LCDC_OVR1CLUT_RCLUT_OFFSET) -+#define LCDC_OVR1CLUT_ACLUT_OFFSET 24 -+#define LCDC_OVR1CLUT_ACLUT (0xff << LCDC_OVR1CLUT_ACLUT_OFFSET) -+ -+#define ATMEL_LCDC_HEOCLUT 0x1000 -+#define LCDC_HEOCLUT_BCLUT_OFFSET 0 -+#define LCDC_HEOCLUT_BCLUT (0xff << LCDC_HEOCLUT_BCLUT_OFFSET) -+#define LCDC_HEOCLUT_GCLUT_OFFSET 8 -+#define LCDC_HEOCLUT_GCLUT (0xff << LCDC_HEOCLUT_GCLUT_OFFSET) -+#define LCDC_HEOCLUT_RCLUT_OFFSET 16 -+#define LCDC_HEOCLUT_RCLUT (0xff << LCDC_HEOCLUT_RCLUT_OFFSET) -+#define LCDC_HEOCLUT_ACLUT_OFFSET 24 -+#define LCDC_HEOCLUT_ACLUT (0xff << LCDC_HEOCLUT_ACLUT_OFFSET) -+ -+#define ATMEL_LCDC_HCRCLUT 0x1400 -+#define LCDC_HCRCLUT_BCLUT_OFFSET 0 -+#define LCDC_HCRCLUT_BCLUT (0xff << LCDC_HCRCLUT_BCLUT_OFFSET) -+#define LCDC_HCRCLUT_GCLUT_OFFSET 8 -+#define LCDC_HCRCLUT_GCLUT (0xff << LCDC_HCRCLUT_GCLUT_OFFSET) -+#define LCDC_HCRCLUT_RCLUT_OFFSET 16 -+#define LCDC_HCRCLUT_RCLUT (0xff << LCDC_HCRCLUT_RCLUT_OFFSET) -+#define LCDC_HCRCLUT_ACLUT_OFFSET 24 -+#define LCDC_HCRCLUT_ACLUT (0xff << LCDC_HCRCLUT_ACLUT_OFFSET) -+ -+/* Base layer CLUT */ -+#define ATMEL_LCDC_LUT(n) (0x0400 + ((n)*4)) -+ -+ -+#endif /* __ATMEL_HLCDC4_H__ */ -diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c -index d99505b..c35f5c7 100644 ---- a/drivers/video/atmel_lcdfb.c -+++ b/drivers/video/atmel_lcdfb.c -@@ -1,7 +1,7 @@ - /* - * Driver for AT91/AT32 LCD Controller - * -- * Copyright (C) 2007 Atmel Corporation -+ * Copyright (C) 2007-2010 Atmel Corporation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for -@@ -25,6 +25,7 @@ - #include - - #include