From: NĂ­colas F. R. A. Prado Date: Wed, 4 May 2022 21:45:16 +0000 (-0400) Subject: arm64: dts: mt8192: Follow binding order for SCP registers X-Git-Tag: v6.1-rc5~1259^2^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c75104762ddace5973deb4ea54d35bf2b64bba98;p=platform%2Fkernel%2Flinux-starfive.git arm64: dts: mt8192: Follow binding order for SCP registers The dt-binding for SCP documents the reg-names order as sram, cfg, l1tcm. Update the SCP node on the mt8192 devicetree to follow that order, which gets rid of a dtbs_check warning. This doesn't change any behavior since the SCP driver accesses the memory regions through the names anyway. Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node") Signed-off-by: NĂ­colas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20220504214516.2957504-1-nfraprado@collabora.com Signed-off-by: Matthias Brugger --- diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 26dbe9e..733aec2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -699,9 +699,9 @@ scp: scp@10500000 { compatible = "mediatek,mt8192-scp"; reg = <0 0x10500000 0 0x100000>, - <0 0x10700000 0 0x8000>, - <0 0x10720000 0 0xe0000>; - reg-names = "sram", "l1tcm", "cfg"; + <0 0x10720000 0 0xe0000>, + <0 0x10700000 0 0x8000>; + reg-names = "sram", "cfg", "l1tcm"; interrupts = ; clocks = <&infracfg CLK_INFRA_SCPSYS>; clock-names = "main";