From: Alex Deucher Date: Wed, 11 Apr 2018 22:57:13 +0000 (-0500) Subject: drm/amdgpu/powerplay: fix smu7_get_memory_type for fiji X-Git-Tag: v5.15~8594^2~16^2~190 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c73a3626619018adfa2bb0fa1e64310be8e73152;p=platform%2Fkernel%2Flinux-starfive.git drm/amdgpu/powerplay: fix smu7_get_memory_type for fiji Fiji uses a different register than other smu7 asics, but we already have this info in the base driver so just use that. Reviewed-by: Rex Zhu Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 21c021b..97b7c23 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -4150,13 +4150,9 @@ static int smu7_read_clock_registers(struct pp_hwmgr *hwmgr) static int smu7_get_memory_type(struct pp_hwmgr *hwmgr) { struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); - uint32_t temp; - - temp = cgs_read_register(hwmgr->device, mmMC_SEQ_MISC0); + struct amdgpu_device *adev = hwmgr->adev; - data->is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == - ((temp & MC_SEQ_MISC0_GDDR5_MASK) >> - MC_SEQ_MISC0_GDDR5_SHIFT)); + data->is_memory_gddr5 = (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5); return 0; }