From: Boyuan Zhang <boyuan.zhang@amd.com>
Date: Wed, 1 Jul 2020 21:59:51 +0000 (-0400)
Subject: drm/amdgpu: enable VCN3.0 DPG for navy_flounder
X-Git-Tag: v5.15~2586^2~30^2~432
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c6e9dd0ea8355024de890f559b78c83a365641d0;p=platform%2Fkernel%2Flinux-starfive.git

drm/amdgpu: enable VCN3.0 DPG for navy_flounder

Enable VCN3.0 DPG for navy_flounder by setting up the flag to the ASIC

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 13efe87..7f2af24 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -776,7 +776,8 @@ static int nv_common_early_init(void *handle)
 		break;
 	case CHIP_NAVY_FLOUNDER:
 		adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
-		adev->pg_flags = AMD_PG_SUPPORT_VCN;
+		adev->pg_flags = AMD_PG_SUPPORT_VCN |
+			AMD_PG_SUPPORT_VCN_DPG;
 		adev->external_rev_id = adev->rev_id + 0x32;
 		break;