From: Dinh Nguyen Date: Thu, 14 Aug 2014 15:37:22 +0000 (-0500) Subject: ARM: dts: socfpga: memreserve first 4KB for future system use X-Git-Tag: v3.18-rc1~119^2~32^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c6dcb1010239e484a461178d3318b35ef44dbcf0;p=platform%2Fkernel%2Flinux-exynos.git ARM: dts: socfpga: memreserve first 4KB for future system use This patch adds a /memreserve/ section to reserve the first 4K for future use by the system. One possible use-case is trampoline code used to bring secondary cores online. Signed-off-by: Dinh Nguyen Acked-by: Pavel Machek --- v3: Update commit message based on Mark Rutland's comment v2: Add a comment in the dts files --- diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 468fc4c..03e8268 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi @@ -15,6 +15,8 @@ */ /dts-v1/; +/* First 4KB has trampoline code for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; #include "socfpga.dtsi" / { diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index 33cad8b..28c05e7 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -16,6 +16,8 @@ */ /dts-v1/; +/* First 4KB has trampoline code for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; #include "socfpga.dtsi" / {