From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Thu, 19 Aug 2021 11:55:39 +0000 (+0300)
Subject: intel/devinfo: Rename & implement num_dual_subslices
X-Git-Tag: upstream/22.3.5~2250
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c6a7f4b34e6835aff2f3c45a8cd3a3d175874443;p=platform%2Fupstream%2Fmesa.git

intel/devinfo: Rename & implement num_dual_subslices

v2: Use the upper bound of dual subslices as the ID is not remapped
with fused off parts and this is what we'll use for a bunch of
computation in RT.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
---

diff --git a/src/intel/compiler/brw_nir_rt_builder.h b/src/intel/compiler/brw_nir_rt_builder.h
index ae84120..f0476d5 100644
--- a/src/intel/compiler/brw_nir_rt_builder.h
+++ b/src/intel/compiler/brw_nir_rt_builder.h
@@ -165,7 +165,7 @@ brw_nir_num_rt_stacks(nir_builder *b,
                       const struct intel_device_info *devinfo)
 {
    return nir_imul_imm(b, nir_load_ray_num_dss_rt_stacks_intel(b),
-                          intel_device_info_num_dual_subslices(devinfo));
+                          intel_device_info_dual_subslice_id_bound(devinfo));
 }
 
 static inline nir_ssa_def *
diff --git a/src/intel/compiler/brw_rt.h b/src/intel/compiler/brw_rt.h
index 2452d72..d031876 100644
--- a/src/intel/compiler/brw_rt.h
+++ b/src/intel/compiler/brw_rt.h
@@ -205,7 +205,7 @@ brw_rt_compute_scratch_layout(struct brw_rt_scratch_layout *layout,
 {
    layout->stack_ids_per_dss = stack_ids_per_dss;
 
-   const uint32_t dss_count = intel_device_info_num_dual_subslices(devinfo);
+   const uint32_t dss_count = intel_device_info_dual_subslice_id_bound(devinfo);
    const uint32_t num_stack_ids = dss_count * stack_ids_per_dss;
 
    uint64_t size = 0;
diff --git a/src/intel/dev/intel_device_info.h b/src/intel/dev/intel_device_info.h
index 994da2a..74047fb 100644
--- a/src/intel/dev/intel_device_info.h
+++ b/src/intel/dev/intel_device_info.h
@@ -476,11 +476,29 @@ intel_device_info_eu_total(const struct intel_device_info *devinfo)
    return total;
 }
 
+/**
+ * Computes the bound of dualsubslice ID that can be used on this device.
+ *
+ * You should use this number if you're going to make calculation based on the
+ * slice/dualsubslice ID provided by the SR0.0 EU register. The maximum
+ * dualsubslice ID can be superior to the total number of dualsubslices on the
+ * device, depending on fusing.
+ *
+ * On a 16 dualsubslice GPU, the maximum dualsubslice ID is 15. This function
+ * would return the exclusive bound : 16.
+ */
 static inline unsigned
-intel_device_info_num_dual_subslices(UNUSED
-                                     const struct intel_device_info *devinfo)
+intel_device_info_dual_subslice_id_bound(const struct intel_device_info *devinfo)
 {
-   unreachable("TODO");
+   /* Start from the last slice/subslice so we find the answer faster. */
+   for (int s = devinfo->max_slices - 1; s >= 0; s--) {
+      for (int ss = devinfo->max_subslices_per_slice - 1; ss >= 0; ss--) {
+         if (intel_device_info_subslice_available(devinfo, s, ss))
+            return s * devinfo->max_subslices_per_slice + ss + 1;
+      }
+   }
+   unreachable("Invalid topology");
+   return 0;
 }
 
 int intel_device_name_to_pci_device_id(const char *name);