From: weiliang.lin Date: Tue, 20 Jan 2015 14:59:47 +0000 (-0800) Subject: [x86] Avoid memory form of PUSH/CALL for ATOM. X-Git-Tag: upstream/4.7.83~4877 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c63e994166eb7c24d435a3c85eb2af1ebc73cf7f;p=platform%2Fupstream%2Fv8.git [x86] Avoid memory form of PUSH/CALL for ATOM. Review URL: https://codereview.chromium.org/853703002 Cr-Commit-Position: refs/heads/master@{#26163} --- diff --git a/src/base/cpu.cc b/src/base/cpu.cc index 0cf3fb8..1be0596 100644 --- a/src/base/cpu.cc +++ b/src/base/cpu.cc @@ -315,6 +315,7 @@ CPU::CPU() has_ssse3_(false), has_sse41_(false), has_sse42_(false), + is_atom_(false), has_avx_(false), has_fma3_(false), has_idiva_(false), @@ -365,6 +366,20 @@ CPU::CPU() has_sse42_ = (cpu_info[2] & 0x00100000) != 0; has_avx_ = (cpu_info[2] & 0x10000000) != 0; if (has_avx_) has_fma3_ = (cpu_info[2] & 0x00001000) != 0; + + if (family_ == 0x6) { + switch (model_) { + case 0x1c: // SLT + case 0x26: + case 0x36: + case 0x27: + case 0x35: + case 0x37: // SLM + case 0x4a: + case 0x4d: + is_atom_ = true; + } + } } #if V8_HOST_ARCH_IA32 diff --git a/src/base/cpu.h b/src/base/cpu.h index 38465f5..193ea5a 100644 --- a/src/base/cpu.h +++ b/src/base/cpu.h @@ -85,6 +85,7 @@ class CPU FINAL { bool has_sse42() const { return has_sse42_; } bool has_avx() const { return has_avx_; } bool has_fma3() const { return has_fma3_; } + bool is_atom() const { return is_atom_; } // arm features bool has_idiva() const { return has_idiva_; } @@ -119,6 +120,7 @@ class CPU FINAL { bool has_ssse3_; bool has_sse41_; bool has_sse42_; + bool is_atom_; bool has_avx_; bool has_fma3_; bool has_idiva_; diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc index e3a8246..7b6b721 100644 --- a/src/compiler/ia32/instruction-selector-ia32.cc +++ b/src/compiler/ia32/instruction-selector-ia32.cc @@ -737,8 +737,11 @@ void InstructionSelector::VisitCall(Node* node) { for (auto i = buffer.pushed_nodes.rbegin(); i != buffer.pushed_nodes.rend(); ++i) { // TODO(titzer): handle pushing double parameters. - Emit(kIA32Push, nullptr, - g.CanBeImmediate(*i) ? g.UseImmediate(*i) : g.Use(*i)); + InstructionOperand* value = + g.CanBeImmediate(*i) ? g.UseImmediate(*i) : IsSupported(ATOM) + ? g.UseRegister(*i) + : g.Use(*i); + Emit(kIA32Push, nullptr, value); } // Select the appropriate opcode based on the call type. diff --git a/src/compiler/x64/instruction-selector-x64.cc b/src/compiler/x64/instruction-selector-x64.cc index c1f2e0c..0e6e220 100644 --- a/src/compiler/x64/instruction-selector-x64.cc +++ b/src/compiler/x64/instruction-selector-x64.cc @@ -942,8 +942,11 @@ void InstructionSelector::VisitCall(Node* node) { for (auto i = buffer.pushed_nodes.rbegin(); i != buffer.pushed_nodes.rend(); ++i) { // TODO(titzer): handle pushing double parameters. - Emit(kX64Push, nullptr, - g.CanBeImmediate(*i) ? g.UseImmediate(*i) : g.Use(*i)); + InstructionOperand* value = + g.CanBeImmediate(*i) ? g.UseImmediate(*i) : IsSupported(ATOM) + ? g.UseRegister(*i) + : g.Use(*i); + Emit(kX64Push, nullptr, value); } // Select the appropriate opcode based on the call type. diff --git a/src/flag-definitions.h b/src/flag-definitions.h index b9794f4..03e22df 100644 --- a/src/flag-definitions.h +++ b/src/flag-definitions.h @@ -467,6 +467,7 @@ DEFINE_BOOL(enable_vldr_imm, false, "enable use of constant pools for double immediate (ARM only)") DEFINE_BOOL(force_long_branches, false, "force all emitted branches to be in long mode (MIPS/PPC only)") +DEFINE_STRING(mcpu, "auto", "enable optimization for specific cpu") // bootstrapper.cc DEFINE_STRING(expose_natives_as, NULL, "expose natives in global object") diff --git a/src/globals.h b/src/globals.h index 9db432e..4b9f79b 100644 --- a/src/globals.h +++ b/src/globals.h @@ -609,6 +609,7 @@ enum CpuFeature { SAHF, AVX, FMA3, + ATOM, // ARM VFP3, ARMv7, diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc index 86a77f9..9815f01 100644 --- a/src/ia32/assembler-ia32.cc +++ b/src/ia32/assembler-ia32.cc @@ -92,14 +92,20 @@ void CpuFeatures::ProbeImpl(bool cross_compile) { if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3; if (cpu.has_avx() && EnableAVX()) supported_ |= 1u << AVX; if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3; + if (strcmp(FLAG_mcpu, "auto") == 0) { + if (cpu.is_atom()) supported_ |= 1u << ATOM; + } else if (strcmp(FLAG_mcpu, "atom") == 0) { + supported_ |= 1u << ATOM; + } } void CpuFeatures::PrintTarget() { } void CpuFeatures::PrintFeatures() { - printf("SSE3=%d SSE4_1=%d AVX=%d FMA3=%d\n", CpuFeatures::IsSupported(SSE3), - CpuFeatures::IsSupported(SSE4_1), CpuFeatures::IsSupported(AVX), - CpuFeatures::IsSupported(FMA3)); + printf("SSE3=%d SSE4_1=%d AVX=%d FMA3=%d ATOM=%d\n", + CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1), + CpuFeatures::IsSupported(AVX), CpuFeatures::IsSupported(FMA3), + CpuFeatures::IsSupported(ATOM)); } diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc index 96422f6..e4d0993 100644 --- a/src/x64/assembler-x64.cc +++ b/src/x64/assembler-x64.cc @@ -60,15 +60,20 @@ void CpuFeatures::ProbeImpl(bool cross_compile) { if (cpu.has_sahf() && FLAG_enable_sahf) supported_ |= 1u << SAHF; if (cpu.has_avx() && EnableAVX()) supported_ |= 1u << AVX; if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3; + if (strcmp(FLAG_mcpu, "auto") == 0) { + if (cpu.is_atom()) supported_ |= 1u << ATOM; + } else if (strcmp(FLAG_mcpu, "atom") == 0) { + supported_ |= 1u << ATOM; + } } void CpuFeatures::PrintTarget() { } void CpuFeatures::PrintFeatures() { - printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d\n", + printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d ATOM=%d\n", CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1), CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX), - CpuFeatures::IsSupported(FMA3)); + CpuFeatures::IsSupported(FMA3), CpuFeatures::IsSupported(ATOM)); } diff --git a/src/x64/macro-assembler-x64.cc b/src/x64/macro-assembler-x64.cc index 97e5690..7a9319b 100644 --- a/src/x64/macro-assembler-x64.cc +++ b/src/x64/macro-assembler-x64.cc @@ -3068,7 +3068,7 @@ void MacroAssembler::Call(ExternalReference ext) { void MacroAssembler::Call(const Operand& op) { - if (kPointerSize == kInt64Size) { + if (kPointerSize == kInt64Size && !CpuFeatures::IsSupported(ATOM)) { call(op); } else { movp(kScratchRegister, op);