From: Zhang Rui Date: Thu, 18 Aug 2022 13:21:46 +0000 (+0800) Subject: tools/power/x86/intel-speed-select: Hide invalid TRL level X-Git-Tag: v6.6.7~3026^2~39^2~10 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c5a295caefa33ce7599d7afbe7a2e9b1bc8d92a2;p=platform%2Fkernel%2Flinux-starfive.git tools/power/x86/intel-speed-select: Hide invalid TRL level TRL levels with Zero ratio values is meaningless. Prevent these TRL levels from being displayed. Signed-off-by: Zhang Rui Signed-off-by: Srinivas Pandruvada --- diff --git a/tools/power/x86/intel-speed-select/isst-display.c b/tools/power/x86/intel-speed-select/isst-display.c index 1723e88..d8b789b 100644 --- a/tools/power/x86/intel-speed-select/isst-display.c +++ b/tools/power/x86/intel-speed-select/isst-display.c @@ -505,6 +505,9 @@ void isst_ctdp_display_information(struct isst_id *id, FILE *outf, int tdp_level } for (k = 0; k < trl_max_levels; k++) { + if (!ctdp_level->trl_ratios[k][0]) + continue; + snprintf(header, sizeof(header), "turbo-ratio-limits-%s", isst_get_trl_level_name(k)); format_and_print(outf, level + 2, header, NULL);