From: Pavel Ondračka <pavel.ondracka@gmail.com>
Date: Fri, 14 Jul 2023 10:22:15 +0000 (+0200)
Subject: r300: bump the RC_MAX_INDEX_BITS
X-Git-Tag: upstream/23.3.3~5383
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c577655f8c4742cfcbef2a9761028fda71a1fe63;p=platform%2Fupstream%2Fmesa.git

r300: bump the RC_MAX_INDEX_BITS

We skip ntt regalloc for vertex shaders and we have 1024 instruction
limit for R500 vs, so in theory we could run some shaders with more that
1024 ssa registers (if we can optimize the number of instruction in the
backend). So add one more bit.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24154>
---

diff --git a/src/gallium/drivers/r300/compiler/radeon_program_constants.h b/src/gallium/drivers/r300/compiler/radeon_program_constants.h
index 6a8cbe3..4c12c5f 100644
--- a/src/gallium/drivers/r300/compiler/radeon_program_constants.h
+++ b/src/gallium/drivers/r300/compiler/radeon_program_constants.h
@@ -101,7 +101,7 @@ enum {
 	RC_NUM_SPECIAL_REGISTERS
 };
 
-#define RC_REGISTER_INDEX_BITS 10
+#define RC_REGISTER_INDEX_BITS 11
 #define RC_REGISTER_MAX_INDEX (1 << RC_REGISTER_INDEX_BITS)
 
 typedef enum {