From: Kang Zhang <shkzhang@cn.ibm.com>
Date: Thu, 12 Mar 2020 03:18:56 +0000 (+0000)
Subject: [NFC][PowerPC] Add a new MIR file te test ppc-early-ret pass
X-Git-Tag: llvmorg-12-init~12347
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c4cbc5806218bf4232523771805580fa40b83244;p=platform%2Fupstream%2Fllvm.git

[NFC][PowerPC] Add a new MIR file te test ppc-early-ret pass
---

diff --git a/llvm/test/CodeGen/PowerPC/early-ret.mir b/llvm/test/CodeGen/PowerPC/early-ret.mir
new file mode 100644
index 0000000..6897b20
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/early-ret.mir
@@ -0,0 +1,83 @@
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -run-pass=ppc-early-ret -o \
+# RUN:   - %s -verify-machineinstrs | FileCheck %s
+
+---
+name:            testBCLRn
+body:             |
+  bb.0.entry:
+    successors: %bb.3(0x20000000), %bb.1(0x60000000)
+    liveins: $f1, $f2, $f3, $f4, $v2, $v3
+
+    renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
+    BCn killed renamable $cr0eq, %bb.3
+
+  bb.1.entry:
+    successors: %bb.2(0x80000000)
+    liveins: $f1, $f2, $v2, $v3
+
+    renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
+    BCLR killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+
+  bb.2:
+    successors: %bb.3(0x80000000)
+    liveins: $v3
+
+    $v2 = VOR killed $v3, $v3
+
+  bb.3:
+    liveins: $v2
+
+    BLR implicit $lr, implicit $rm, implicit killed $v2
+
+  ; CHECK-LABEL: name: testBCLRn
+  ; CHECK: bb.0.entry:
+  ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
+  ; CHECK:   BCLRn $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK: bb.1.entry:
+  ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
+  ; CHECK:   BCLR killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK: bb.2:
+  ; CHECK:   $v2 = VOR killed $v3, $v3
+  ; CHECK:   BLR implicit $lr, implicit $rm, implicit killed $v2
+...
+
+
+---
+name:            testBCLR
+body:             |
+  bb.0.entry:
+    successors: %bb.3(0x20000000), %bb.1(0x60000000)
+    liveins: $f1, $f2, $f3, $f4, $v2, $v3
+
+    renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
+    BC killed renamable $cr0eq, %bb.3
+
+  bb.1.entry:
+    successors: %bb.2(0x80000000)
+    liveins: $f1, $f2, $v2, $v3
+
+    renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
+    BCLRn killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+
+  bb.2:
+    successors: %bb.3(0x80000000)
+    liveins: $v3
+
+    $v2 = VOR killed $v3, $v3
+
+  bb.3:
+    liveins: $v2
+
+    BLR implicit $lr, implicit $rm, implicit killed $v2
+
+  ; CHECK-LABEL: name: testBCLR
+  ; CHECK: bb.0.entry:
+  ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
+  ; CHECK:   BCLR $cr0eq, implicit $lr, implicit $rm, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK: bb.1.entry:
+  ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
+  ; CHECK:   BCLRn killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK: bb.2:
+  ; CHECK:   $v2 = VOR killed $v3, $v3
+  ; CHECK:   BLR implicit $lr, implicit $rm, implicit killed $v2
+...