From: Laxman Dewangan <ldewangan@nvidia.com>
Date: Wed, 7 Mar 2012 11:09:05 +0000 (+0530)
Subject: regulator: tps65910: Configure correct value for VDDCTRL vout reg
X-Git-Tag: upstream/snapshot3+hdmi~8017^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c4632aed3e5b134c55b54af19db49662959384c1;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git

regulator: tps65910: Configure correct value for VDDCTRL vout reg

As per datasheet, the voltage output is defined as
from SEL[6:0] = 3 to 64 (dec)
Vout= (SEL[6:0] × 12.5 mV + 562.5 mV)

The list_voltage returns the vout as
    600mV +  selector * 12.5mV

and so equivalent VSEL is selector + 3.
Adding 3 on selector when configuring VSEL register for
VDDCTRL output.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---

diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c
index 5c15ba0..40ecf516 100644
--- a/drivers/regulator/tps65910-regulator.c
+++ b/drivers/regulator/tps65910-regulator.c
@@ -662,7 +662,7 @@ static int tps65910_set_voltage_dcdc(struct regulator_dev *dev,
 		tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
 		break;
 	case TPS65911_REG_VDDCTRL:
-		vsel = selector;
+		vsel = selector + 3;
 		tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
 	}