From: Eric Anholt <eric@anholt.net>
Date: Tue, 7 Nov 2017 23:42:04 +0000 (-0800)
Subject: broadcom/vc5: Fix clear color for swap_color_rb render targets.
X-Git-Tag: upstream/18.1.0~3910
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c40ac132e4ba44f1d086112ebd27d3ec06aea8e9;p=platform%2Fupstream%2Fmesa.git

broadcom/vc5: Fix clear color for swap_color_rb render targets.

Fixes dEQP-GLES3.functional.depth_stencil_clear.depth.*
---

diff --git a/src/gallium/drivers/vc5/vc5_draw.c b/src/gallium/drivers/vc5/vc5_draw.c
index f834207..c4f73f6 100644
--- a/src/gallium/drivers/vc5/vc5_draw.c
+++ b/src/gallium/drivers/vc5/vc5_draw.c
@@ -517,6 +517,15 @@ vc5_clear(struct pipe_context *pctx, unsigned buffers,
                 union util_color uc;
                 uint32_t internal_size = 4 << surf->internal_bpp;
 
+                static union pipe_color_union swapped_color;
+                if (vc5->swap_color_rb & (1 << i)) {
+                        swapped_color.f[0] = color->f[2];
+                        swapped_color.f[1] = color->f[1];
+                        swapped_color.f[2] = color->f[0];
+                        swapped_color.f[3] = color->f[3];
+                        color = &swapped_color;
+                }
+
                 switch (surf->internal_type) {
                 case INTERNAL_TYPE_8:
                         if (surf->format == PIPE_FORMAT_B4G4R4A4_UNORM ||