From: Fabio Estevam <fabio.estevam@freescale.com>
Date: Fri, 26 Jul 2013 16:54:27 +0000 (-0300)
Subject: usb: ehci-mx5: Remove unneeded write to cscmr1 register
X-Git-Tag: v2013.10-rc2~2^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c3904128ad8c85b91bf1df2ed4b38fa8a17f32a6;p=kernel%2Fu-boot.git

usb: ehci-mx5: Remove unneeded write to cscmr1 register

Currently we have the following behavior in ehci_hcd_init()

- Read csmr1 register, clear bit 26 and then set bit 26.

However a little bit later we call set_usb_phy_clk() which clears bit 26, so
let's get rid of the unnecessary code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---

diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 3548620..a397d24 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -221,15 +221,6 @@ void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)
 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
 	struct usb_ehci *ehci;
-#ifdef CONFIG_MX53
-	struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR;
-	u32 reg;
-
-	reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26);
-	/* derive USB PHY clock multiplexer from PLL3 */
-	reg |= 1 << 26;
-	__raw_writel(reg, &sc_regs->cscmr1);
-#endif
 
 	set_usboh3_clk();
 	enable_usboh3_clk(1);