From: Tao Zhou <tao.zhou1@amd.com>
Date: Tue, 17 Nov 2020 06:24:17 +0000 (+0800)
Subject: drm/amd/pm: support runtime PPTable update for dimgrey_cavefish
X-Git-Tag: accepted/tizen/unified/20230118.172025~8358^2^2~243
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c28f91dc5e4d640be5dc737c50bd46fc0afa1ab4;p=platform%2Fkernel%2Flinux-rpi.git

drm/amd/pm: support runtime PPTable update for dimgrey_cavefish

There is no need to reset DPM for PPTable uploading on
dimgrey_cavefish and PMFW can handle it, same as navy_flounder.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 1904df5..8e3e7a5 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1183,7 +1183,7 @@ static int smu_disable_dpms(struct smu_context *smu)
 	 */
 	if (smu->uploading_custom_pp_table &&
 	    (adev->asic_type >= CHIP_NAVI10) &&
-	    (adev->asic_type <= CHIP_NAVY_FLOUNDER))
+	    (adev->asic_type <= CHIP_DIMGREY_CAVEFISH))
 		return 0;
 
 	/*