From: Paul Walmsley Date: Mon, 6 Dec 2010 20:52:40 +0000 (+0000) Subject: OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks X-Git-Tag: v2.6.37-rc6~11^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c2015dc88a57090bcf67ab7cfcdbc34671598d36;p=platform%2Fkernel%2Flinux-3.10.git OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks After Charu's GPIO hwmod patches, GPIO initialization on N800 emits the following messages for all GPIO banks: omap_hwmod: gpio1: cannot be enabled (3) This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask. Fix this and also fix two other macros that had the same problem. Thanks to Tony Lindgren for originally reporting this bug. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 298a22a..f81acee 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -243,13 +243,14 @@ #define OMAP24XX_EN_GPT1_MASK (1 << 0) /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ -#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2) -#define OMAP24XX_ST_GPIOS_MASK 2 -#define OMAP24XX_ST_GPT1_SHIFT (1 << 0) -#define OMAP24XX_ST_GPT1_MASK 0 +#define OMAP24XX_ST_GPIOS_SHIFT 2 +#define OMAP24XX_ST_GPIOS_MASK (1 << 2) +#define OMAP24XX_ST_GPT1_SHIFT 0 +#define OMAP24XX_ST_GPT1_MASK (1 << 0) /* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ -#define OMAP2430_ST_MDM_SHIFT (1 << 0) +#define OMAP2430_ST_MDM_SHIFT 0 +#define OMAP2430_ST_MDM_MASK (1 << 0) /* 3430 register bits shared between CM & PRM registers */