From: Dmitry Osipenko <digetx@gmail.com>
Date: Thu, 24 Oct 2019 22:14:14 +0000 (+0300)
Subject: ARM: tegra: trimslice: Add CPU Operating Performance Points
X-Git-Tag: v5.15~4957^2~21^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c19c631a3cb71ccde4a283fea4cb3bf1c56b947f;p=platform%2Fkernel%2Flinux-starfive.git

ARM: tegra: trimslice: Add CPU Operating Performance Points

Utilize common Tegra20 CPU OPP table. CPU voltage scaling is available
now on TrimSlice.

Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---

diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 3e5ac09..8debd3d 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -3,6 +3,7 @@
 
 #include <dt-bindings/input/input.h>
 #include "tegra20.dtsi"
+#include "tegra20-cpu-opp.dtsi"
 
 / {
 	model = "Compulab TrimSlice board";
@@ -471,4 +472,14 @@
 			 <&tegra_car TEGRA20_CLK_CDEV1>;
 		clock-names = "pll_a", "pll_a_out0", "mclk";
 	};
+
+	cpus {
+		cpu0: cpu@0 {
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+
+		cpu@1 {
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
 };