From: Vladimir Zapolskiy Date: Mon, 18 Apr 2016 04:12:00 +0000 (+0300) Subject: ARM: dts: lpc32xx: set default clock rate of HCLK PLL X-Git-Tag: v5.15~13613^2~18^2~12 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c17e9377aa81664d94b4f2102559fcf2a01ec8e7;p=platform%2Fkernel%2Flinux-starfive.git ARM: dts: lpc32xx: set default clock rate of HCLK PLL Probably most of NXP LPC32xx boards have 13MHz main oscillator and therefore for HCLK PLL and ARM core clock rate default hardware setting is 16 * 13MHz = 208MHz, however a user may vary HCLK PLL/ARM core rate from 156MHz to about 266MHz for 13MHz clock source. The change explicitly defines HCLK PLL output rate to default 208MHz to overwrite any settings done by a bootloader, if needed it can be redefined in a board DTS file. Acked-by: Sylvain Lemieux Signed-off-by: Vladimir Zapolskiy --- diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index c58d8da..d7b84cd 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -294,6 +294,9 @@ clocks = <&xtal_32k>, <&xtal>; clock-names = "xtal_32k", "xtal"; + + assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>; + assigned-clock-rates = <208000000>; }; };