From: Chia-Wei, Wang Date: Mon, 3 Aug 2020 09:36:07 +0000 (+0800) Subject: cosmetic: aspeed: ast2500: Rename board file X-Git-Tag: v2020.10~58^2~22 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c16f518a7973c26bb0b8a30b5624ac09b968bc0e;p=platform%2Fkernel%2Fu-boot.git cosmetic: aspeed: ast2500: Rename board file Rename the ast2500-board.c to board_common.c and place the renamed file under the ast2500 folder. Signed-off-by: Chia-Wei, Wang --- diff --git a/arch/arm/mach-aspeed/Makefile b/arch/arm/mach-aspeed/Makefile index 1557dcae66..33f65b50b2 100644 --- a/arch/arm/mach-aspeed/Makefile +++ b/arch/arm/mach-aspeed/Makefile @@ -3,4 +3,4 @@ # Copyright (c) 2016 Google, Inc obj-$(CONFIG_ARCH_ASPEED) += ast_wdt.o -obj-$(CONFIG_ASPEED_AST2500) += ast2500/ ast2500-board.o +obj-$(CONFIG_ASPEED_AST2500) += ast2500/ diff --git a/arch/arm/mach-aspeed/ast2500-board.c b/arch/arm/mach-aspeed/ast2500-board.c deleted file mode 100644 index 3482ee91ef..0000000000 --- a/arch/arm/mach-aspeed/ast2500-board.c +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 Google, Inc - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Second Watchdog Timer by default is configured - * to trigger secondary boot source. - */ -#define AST_2ND_BOOT_WDT 1 - -/* - * Third Watchdog Timer by default is configured - * to toggle Flash address mode switch before reset. - */ -#define AST_FLASH_ADDR_DETECT_WDT 2 - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -int dram_init(void) -{ - struct udevice *dev; - struct ram_info ram; - int ret; - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM FAIL1\r\n"); - return ret; - } - - ret = ram_get_info(dev, &ram); - if (ret) { - debug("DRAM FAIL2\r\n"); - return ret; - } - - gd->ram_size = ram.size; - - return 0; -} diff --git a/arch/arm/mach-aspeed/ast2500/Makefile b/arch/arm/mach-aspeed/ast2500/Makefile index 2e9e15d831..4c27c8fc46 100644 --- a/arch/arm/mach-aspeed/ast2500/Makefile +++ b/arch/arm/mach-aspeed/ast2500/Makefile @@ -1,2 +1,3 @@ obj-y += lowlevel_init.o +obj-y += board_common.o obj-y += clk_ast2500.o sdram_ast2500.o diff --git a/arch/arm/mach-aspeed/ast2500/board_common.c b/arch/arm/mach-aspeed/ast2500/board_common.c new file mode 100644 index 0000000000..3482ee91ef --- /dev/null +++ b/arch/arm/mach-aspeed/ast2500/board_common.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 Google, Inc + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Second Watchdog Timer by default is configured + * to trigger secondary boot source. + */ +#define AST_2ND_BOOT_WDT 1 + +/* + * Third Watchdog Timer by default is configured + * to toggle Flash address mode switch before reset. + */ +#define AST_FLASH_ADDR_DETECT_WDT 2 + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int dram_init(void) +{ + struct udevice *dev; + struct ram_info ram; + int ret; + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM FAIL1\r\n"); + return ret; + } + + ret = ram_get_info(dev, &ram); + if (ret) { + debug("DRAM FAIL2\r\n"); + return ret; + } + + gd->ram_size = ram.size; + + return 0; +}