From: Bjorn Helgaas <bhelgaas@google.com>
Date: Fri, 15 Jan 2016 18:33:14 +0000 (-0600)
Subject: Merge branches 'pci/host', 'pci/host-designware', 'pci/host-hisi', 'pci/host-qcom... 
X-Git-Tag: v4.14-rc1~3952^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c111e8bf6edfead5602aafa2cda937781737d4f9;p=platform%2Fkernel%2Flinux-rpi.git

Merge branches 'pci/host', 'pci/host-designware', 'pci/host-hisi', 'pci/host-qcom' and 'pci/host-rcar' into next

* pci/host:
  PCI: host: Add of_pci_get_host_bridge_resources() stub
  PCI: host: Mark PCIe/PCI (MSI) IRQ cascade handlers as IRQF_NO_THREAD

* pci/host-designware:
  PCI: designware: Make config accessor override checking symmetric
  PCI: designware: Simplify control flow

* pci/host-hisi:
  PCI: hisi: Add support for HiSilicon Hip06 PCIe host controllers

* pci/host-qcom:
  ARM: dts: ifc6410: enable PCIe DT node for this board
  ARM: dts: apq8064: add PCIe devicetree node
  PCI: qcom: Add Qualcomm PCIe controller driver
  PCI: qcom: Document PCIe devicetree bindings
  PCI: designware: Ensure ATU is enabled before IO/conf space accesses

* pci/host-rcar:
  PCI: rcar: Add Gen2 PHY setup to pcie-rcar
  PCI: rcar: Add runtime PM support to pcie-rcar
  PCI: rcar: Remove unused pci_sys_data struct from pcie-rcar
---

c111e8bf6edfead5602aafa2cda937781737d4f9
diff --cc drivers/pci/host/Kconfig
index 98ce547,f131ba9,f131ba9,3f73587,de18298,86c2a12..6d181ba
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@@@@@@ -177,6 -170,6 -170,6 -170,7 -170,16 -169,6 +177,17 @@@@@@@ config PCI_HIS
      	select PCIEPORTBUS
      	select PCIE_DW
      	help
--- --	  Say Y here if you want PCIe controller support on HiSilicon HIP05 SoC
+++ ++	  Say Y here if you want PCIe controller support on HiSilicon
+++ ++	  Hip05 and Hip06 SoCs
+++  +
++++ +config PCIE_QCOM
++++ +	bool "Qualcomm PCIe controller"
++++ +	depends on ARCH_QCOM && OF
++++ +	select PCIE_DW
++++ +	select PCIEPORTBUS
++++ +	help
++++ +	  Say Y here to enable PCIe controller support on Qualcomm SoCs. The
++++ +	  PCIe controller uses the Designware core plus Qualcomm-specific
++++ +	  hardware wrappers.
   +  
      endmenu
diff --cc drivers/pci/host/pcie-rcar.c
index 5c29626,414c336,f4fa6c5,f4fa6c5,f4fa6c5,d6f140a..4edb518
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@@@@@@ -124,19 -126,20 -126,20 -126,20 -126,20 -130,10 +130,10 @@@@@@@ static inline struct rcar_msi *to_rcar_
      }
      
      /* Structure representing the PCIe interface */
----- /*
-----  * ARM pcibios functions expect the ARM struct pci_sys_data as the PCI
-----  * sysdata.  Add pci_sys_data as the first element in struct gen_pci so
-----  * that when we use a gen_pci pointer as sysdata, it is also a pointer to
-----  * a struct pci_sys_data.
-----  */
      struct rcar_pcie {
----- #ifdef CONFIG_ARM
----- 	struct pci_sys_data	sys;
----- #endif
      	struct device		*dev;
      	void __iomem		*base;
 ---- 	struct resource		res[RCAR_PCI_MAX_RESOURCES];
 ---- 	struct resource		busn;
 ++++ 	struct list_head	resources;
      	int			root_bus_nr;
      	struct clk		*clk;
      	struct clk		*bus_clk;
@@@@@@@ -915,10 -919,8 -917,8 -917,8 -917,8 -932,10 +934,10 @@@@@@@ static int rcar_pcie_parse_map_dma_rang
      
      static const struct of_device_id rcar_pcie_of_match[] = {
      	{ .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
-     	{ .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init },
----- 	{ .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init },
----- 	{ .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init },
+++++ 	{ .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init_gen2 },
+++++ 	{ .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init_gen2 },
+++++ 	{ .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init_gen2 },
 ++++ 	{ .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
      	{},
      };
      MODULE_DEVICE_TABLE(of, rcar_pcie_of_match);