From: Jordan Justen <jordan.l.justen@intel.com>
Date: Fri, 21 Oct 2016 14:46:37 +0000 (+0100)
Subject: i965: Add function to indicate when sampling with hiz is supported
X-Git-Tag: upstream/17.1.0~4927
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c0f505c7ef179249673e764de51b969e07fc8194;p=platform%2Fupstream%2Fmesa.git

i965: Add function to indicate when sampling with hiz is supported

Currently it indicates that this is never supported, but soon it will
be supported for gen8+^w gen9+

v2 by Ben:
- Explicitly disable aux_hiz for gen < 9 (with comment)
- squashed in next patch to avoid unused and useless functions

   i965: Support sampling with hiz during rendering

   For gen8, we can sample from depth while using the hiz buffer. This
   allows us to sample depth without resolving from hiz to the depth
   texture.

   To do this we must resolve to hiz before drawing so we can use the hiz
   buffer to sample while rendering. Hopefully the hiz buffer will
   already be resolved in most cases because it was previously rendered,
   meaning the hiz resolve is a no-op.

   Note that this is still controlled by the
   intel_miptree_sample_with_hiz function, and we will enable hiz
   sampling for gen8 in a separate patch.

   Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
   Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> (v2)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
---

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 3085a98..a01decd 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -254,7 +254,10 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
       tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
       if (!tex_obj || !tex_obj->mt)
 	 continue;
-      intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
+      if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
+         intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
+      else
+         intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
       /* Sampling engine understands lossless compression and resolving
        * those surfaces should be skipped for performance reasons.
        */
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 1141e94..a44fce0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2009,6 +2009,23 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
 }
 
 /**
+ * Can the miptree sample using the hiz buffer?
+ */
+bool
+intel_miptree_sample_with_hiz(struct brw_context *brw,
+                              struct intel_mipmap_tree *mt)
+{
+   /* It's unclear how well supported sampling from the hiz buffer is on GEN8,
+    * so keep things conservative for now and never enable it unless we're SKL+.
+    */
+   if (brw->gen < 9) {
+      return false;
+   }
+
+   return false;
+}
+
+/**
  * Does the miptree slice have hiz enabled?
  */
 bool
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index e9024a1..29228b8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -1050,6 +1050,10 @@ void
 intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
 	       unsigned int level, unsigned int layer, enum blorp_hiz_op op);
 
+bool
+intel_miptree_sample_with_hiz(struct brw_context *brw,
+                              struct intel_mipmap_tree *mt);
+
 #ifdef __cplusplus
 }
 #endif