From: Lu Baolu Date: Wed, 22 Nov 2023 03:26:04 +0000 (+0800) Subject: iommu/vt-d: Disable PCI ATS in legacy passthrough mode X-Git-Tag: v6.6.17~2283 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c0b0cfd979fbc6a5abc0127c087e1f3d4c91f281;p=platform%2Fkernel%2Flinux-rpi.git iommu/vt-d: Disable PCI ATS in legacy passthrough mode [ Upstream commit da37dddcf4caf015c400a930301d2ee27a7a15fb ] When IOMMU hardware operates in legacy mode, the TT field of the context entry determines the translation type, with three supported types (Section 9.3 Context Entry): - DMA translation without device TLB support - DMA translation with device TLB support - Passthrough mode with translated and translation requests blocked Device TLB support is absent when hardware is configured in passthrough mode. Disable the PCI ATS feature when IOMMU is configured for passthrough translation type in legacy (non-scalable) mode. Fixes: 0faa19a1515f ("iommu/vt-d: Decouple PASID & PRI enabling from SVA") Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Link: https://lore.kernel.org/r/20231114011036.70142-3-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel Signed-off-by: Sasha Levin --- diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 8e878c3..18fa71a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2487,7 +2487,8 @@ static int dmar_domain_attach_device(struct dmar_domain *domain, return ret; } - iommu_enable_pci_caps(info); + if (sm_supported(info->iommu) || !domain_type_is_si(info->domain)) + iommu_enable_pci_caps(info); return 0; }