From: Nikola Cornij Date: Sun, 5 Apr 2020 20:40:42 +0000 (-0400) Subject: drm/amd/display: Program DSC before enabling link X-Git-Tag: v5.10.7~2352^2~20^2~156 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=c06a545ae531bd8f791dc41b787822512eb65c5d;p=platform%2Fkernel%2Flinux-rpi.git drm/amd/display: Program DSC before enabling link [why] Link or DIG BE can't be exposed to a higher stream bandwidth than they can handle. When DSC is required to fit the stream into the link bandwidth, DSC has to be programmed before the link is enabled to ensure this. Without it, intermittent issues such as black screen after S3 or a hot-plug can be seen with DSC timings like 4k144Hz or 8k60Hz. [how] Move DSC programming from before enabling stream to before enabling link Signed-off-by: Nikola Cornij Reviewed-by: Jun Lei Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 1e64c01..b66d416 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3035,6 +3035,18 @@ void core_link_enable_stream( if (pipe_ctx->stream->dpms_off) return; + /* Have to setup DSC before DIG FE and BE are connected (which happens before the + * link training). This is to make sure the bandwidth sent to DIG BE won't be + * bigger than what the link and/or DIG BE can handle. VBID[6]/CompressedStream_flag + * will be automatically set at a later time when the video is enabled + * (DP_VID_STREAM_EN = 1). + */ + if (pipe_ctx->stream->timing.flags.DSC) { + if (dc_is_dp_signal(pipe_ctx->stream->signal) || + dc_is_virtual_signal(pipe_ctx->stream->signal)) + dp_set_dsc_enable(pipe_ctx, true); + } + status = enable_link(state, pipe_ctx); if (status != DC_OK) { @@ -3062,11 +3074,6 @@ void core_link_enable_stream( CONTROLLER_DP_TEST_PATTERN_VIDEOMODE, COLOR_DEPTH_UNDEFINED); - if (pipe_ctx->stream->timing.flags.DSC) { - if (dc_is_dp_signal(pipe_ctx->stream->signal) || - dc_is_virtual_signal(pipe_ctx->stream->signal)) - dp_set_dsc_enable(pipe_ctx, true); - } dc->hwss.enable_stream(pipe_ctx); /* Set DPS PPS SDP (AKA "info frames") */