From: Thierry Reding Date: Mon, 15 Apr 2019 09:32:16 +0000 (+0200) Subject: ARM: tegra: Remove disp1 clock initialization on Tegra210 X-Git-Tag: v2019.07-rc4~4^2~22 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bf468e5e1ae71c97f01a1ef2e97e18bd5bca40ce;p=platform%2Fkernel%2Fu-boot.git ARM: tegra: Remove disp1 clock initialization on Tegra210 pll_c is not a valid parent for the disp1 clock, so trying to set it will fail. Given that display is not used in U-Boot, remove the init table entry so that disp1 will keep its default parent (clk_m). Signed-off-by: Thierry Reding Signed-off-by: Tom Warren --- diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 0d7cafe..b240860 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SBC5, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, - { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },