From: Ben Skeggs Date: Fri, 9 May 2014 05:55:57 +0000 (+1000) Subject: nvc0: bump sched data member to 32-bits X-Git-Tag: upstream/10.3~2037 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bede1bdb4828ea673bc7859db4058da7e35c6774;p=platform%2Fupstream%2Fmesa.git nvc0: bump sched data member to 32-bits SM50 backend requires 21 bits per instruction, not 8. Signed-off-by: Ben Skeggs Reviewed-by: Ilia Mirkin --- diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 8872cfb..f082f85 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h @@ -792,7 +792,7 @@ public: int8_t flagsDef; int8_t flagsSrc; - uint8_t sched; // scheduling data (NOTE: maybe move to separate storage) + uint32_t sched; // scheduling data (NOTE: maybe move to separate storage) BasicBlock *bb;