From: Craig Topper Date: Thu, 24 May 2012 07:02:50 +0000 (+0000) Subject: Convert assert(0) to llvm_unreachable. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bdf39a46a302df7cb07e948a6780265b3335fbda;p=platform%2Fupstream%2Fllvm.git Convert assert(0) to llvm_unreachable. llvm-svn: 157380 --- diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index c2eb894..696f459 100644 --- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -478,7 +478,7 @@ NVPTXAsmPrinter::getVirtualRegisterName(unsigned vr, bool isVec, << getNVPTXRegClassStr(RC) << mapped_vr << "_1" << "}"; else - assert(0 && "Unsupported vector size"); + llvm_unreachable("Unsupported vector size"); } void @@ -519,7 +519,7 @@ void NVPTXAsmPrinter::printVecModifiedImmediate(const MachineOperand &MO, O << "_" << vecelem[Imm%2]; } else - assert(0 && "Unknown Modifier on immediate operand"); + llvm_unreachable("Unknown Modifier on immediate operand"); } void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, @@ -539,7 +539,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, if (strcmp(Modifier, "vecfull") == 0) emitVirtualRegister(MO.getReg(), true, O); else - assert(0 && + llvm_unreachable( "Don't know how to handle the modifier on virtual register."); } } @@ -551,7 +551,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, else if (strstr(Modifier, "vec") == Modifier) printVecModifiedImmediate(MO, Modifier, O); else - assert(0 && "Don't know how to handle modifier on immediate operand"); + llvm_unreachable("Don't know how to handle modifier on immediate operand"); return; case MachineOperand::MO_FPImmediate: @@ -584,7 +584,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, return; default: - assert(0 && " Operand type not supported."); + llvm_unreachable("Operand type not supported."); } } @@ -1257,7 +1257,7 @@ void NVPTXAsmPrinter::emitPTXAddressSpace(unsigned int AddressSpace, O << "shared" ; break; default: - assert(0 && "unexpected address space"); + llvm_unreachable("unexpected address space"); } } @@ -1748,8 +1748,7 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes, ptr = (unsigned char*)&int32; aggBuffer->addBytes(ptr, 4, Bytes); break; - } - else if (ConstantExpr *Cexpr = dyn_cast(CPV)) { + } else if (ConstantExpr *Cexpr = dyn_cast(CPV)) { if (ConstantInt *constInt = dyn_cast(ConstantFoldConstantExpression( Cexpr, TD))) { @@ -1765,15 +1764,14 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes, break; } } - assert(0 && "unsupported integer const type"); + llvm_unreachable("unsupported integer const type"); } else if (ETy == Type::getInt64Ty(CPV->getContext()) ) { if (ConstantInt *constInt = dyn_cast(CPV)) { long long int64 =(long long)(constInt->getZExtValue()); ptr = (unsigned char*)&int64; aggBuffer->addBytes(ptr, 8, Bytes); break; - } - else if (ConstantExpr *Cexpr = dyn_cast(CPV)) { + } else if (ConstantExpr *Cexpr = dyn_cast(CPV)) { if (ConstantInt *constInt = dyn_cast( ConstantFoldConstantExpression(Cexpr, TD))) { long long int64 =(long long)(constInt->getZExtValue()); @@ -1789,8 +1787,7 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes, } } llvm_unreachable("unsupported integer const type"); - } - else + } else llvm_unreachable("unsupported integer const type"); break; } @@ -1887,7 +1884,7 @@ void NVPTXAsmPrinter::bufferAggregateConstant(Constant *CPV, } return; } - assert(0 && "unsupported constant type in printAggregateConstant()"); + llvm_unreachable("unsupported constant type in printAggregateConstant()"); } // buildTypeNameMap - Run through symbol table looking for type names. diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h index a035299..6488b14 100644 --- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h +++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h @@ -148,8 +148,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter { O << ", "; O << (unsigned int)buffer[i]; } - } - else { + } else { // print out in 4-bytes or 8-bytes unsigned int pos = 0; unsigned int nSym = 0; @@ -169,16 +168,14 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter { else if (ConstantExpr *Cexpr = dyn_cast(v)) { O << *nvptx::LowerConstant(Cexpr, AP); - } - else - assert(0 && "symbol type unknown"); + } else + llvm_unreachable("symbol type unknown"); nSym++; if (nSym >= numSymbols) nextSymbolPos = size+1; else nextSymbolPos = symbolPosInBuffer[nSym]; - } - else + } else if (nBytes == 4) O << *(unsigned int*)(buffer+pos); else diff --git a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp index b57592d..cd50deb 100644 --- a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp @@ -106,7 +106,7 @@ void NVPTXInstrInfo::copyPhysReg (MachineBasicBlock &MBB, BuildMI(MBB, I, DL, get(NVPTX::V2f64Mov), DestReg) .addReg(SrcReg, getKillRegState(KillSrc)); else { - assert(0 && "Don't know how to copy a register"); + llvm_unreachable("Don't know how to copy a register"); } } diff --git a/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp b/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp index 2728309..99b40a8 100644 --- a/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp @@ -196,8 +196,7 @@ std::string getNVPTXElemClassName(TargetRegisterClass const *RC) { return getNVPTXRegClassName(&NVPTX::Int32RegsRegClass); if (RC->getID() == NVPTX::V4I8RegsRegClassID) return getNVPTXRegClassName(&NVPTX::Int8RegsRegClass); - assert(0 && "Not a vector register class"); - return "Unsupported"; + llvm_unreachable("Not a vector register class"); } const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) { @@ -221,8 +220,7 @@ const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) { return (&NVPTX::Int32RegsRegClass); if (RC->getID() == NVPTX::V4I8RegsRegClassID) return (&NVPTX::Int8RegsRegClass); - assert(0 && "Not a vector register class"); - return 0; + llvm_unreachable("Not a vector register class"); } int getNVPTXVectorSize(TargetRegisterClass const *RC) { @@ -246,8 +244,7 @@ int getNVPTXVectorSize(TargetRegisterClass const *RC) { return 4; if (RC->getID() == NVPTX::V4I8RegsRegClassID) return 4; - assert(0 && "Not a vector register class"); - return -1; + llvm_unreachable("Not a vector register class"); } } diff --git a/llvm/lib/Target/NVPTX/VectorElementize.cpp b/llvm/lib/Target/NVPTX/VectorElementize.cpp index a0152bf..8043e2d 100644 --- a/llvm/lib/Target/NVPTX/VectorElementize.cpp +++ b/llvm/lib/Target/NVPTX/VectorElementize.cpp @@ -731,9 +731,7 @@ unsigned VectorElementize::getScalarVersion(unsigned opcode) { if (opcode == NVPTX::IMPLICIT_DEF) return opcode; switch(opcode) { - default: - assert(0 && "Scalar version not set, fix NVPTXVector.td"); - return 0; + default: llvm_unreachable("Scalar version not set, fix NVPTXVector.td"); case TargetOpcode::COPY: return TargetOpcode::COPY; case NVPTX::AddCCCV2I32: return NVPTX::ADDCCCi32rr; case NVPTX::AddCCCV4I32: return NVPTX::ADDCCCi32rr;