From: Eric Anholt <eric@anholt.net>
Date: Mon, 10 Jan 2011 22:03:39 +0000 (-0800)
Subject: intel: Don't relayout the texture on maxlevel change.
X-Git-Tag: mesa-7.11-rc1~2852
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bdc6dc1d7e7891ab00a2d08818093d5ecf249920;p=platform%2Fupstream%2Fmesa.git

intel: Don't relayout the texture on maxlevel change.

This avoids relayouts in the common case of glGenerateMipmap() or
people doing similar things.

Bug #30366.
---

diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index ab8aba3..81795e4 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -122,18 +122,17 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
 
    /* Check tree can hold all active levels.  Check tree matches
     * target, imageFormat, etc.
-    * 
-    * XXX: For some layouts (eg i945?), the test might have to be
-    * first_level == firstLevel, as the tree isn't valid except at the
-    * original start level.  Hope to get around this by
-    * programming minLod, maxLod, baseLevel into the hardware and
-    * leaving the tree alone.
+    *
+    * For pre-gen4, we have to match first_level == tObj->BaseLevel,
+    * because we don't have the control that gen4 does to make min/mag
+    * determination happen at a nonzero (hardware) baselevel.  Because
+    * of that, we just always relayout on baselevel change.
     */
    if (intelObj->mt &&
        (intelObj->mt->target != intelObj->base.Target ||
 	intelObj->mt->internal_format != firstImage->base.InternalFormat ||
 	intelObj->mt->first_level != tObj->BaseLevel ||
-	intelObj->mt->last_level != intelObj->_MaxLevel ||
+	intelObj->mt->last_level < intelObj->_MaxLevel ||
 	intelObj->mt->width0 != firstImage->base.Width ||
 	intelObj->mt->height0 != firstImage->base.Height ||
 	intelObj->mt->depth0 != firstImage->base.Depth ||