From: Roman Lebedev Date: Fri, 7 May 2021 10:43:46 +0000 (+0300) Subject: [NFC][X86][MCA] AMD Zen 3: add tests with non-eliminatible MMX moves X-Git-Tag: llvmorg-14-init~7345 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bda9ca3e44c1b67d1c4ed145bb7071c340fe8961;p=platform%2Fupstream%2Fllvm.git [NFC][X86][MCA] AMD Zen 3: add tests with non-eliminatible MMX moves In Zen3, MMX moves are *not* eliminated, i've verified this with llvm-exegesis. --- diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-mmx.s b/llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-mmx.s new file mode 100644 index 0000000..e6b3509 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-mmx.s @@ -0,0 +1,123 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver3 -iterations=1 -timeline -register-file-stats < %s | FileCheck %s + +movq %mm0, %mm1 +movq %mm1, %mm2 +movq %mm2, %mm3 +movq %mm3, %mm4 +movq %mm4, %mm5 +movq %mm5, %mm6 +movq %mm6, %mm7 +movq %mm7, %mm0 + +# CHECK: Iterations: 1 +# CHECK-NEXT: Instructions: 8 +# CHECK-NEXT: Total Cycles: 11 +# CHECK-NEXT: Total uOps: 8 + +# CHECK: Dispatch Width: 6 +# CHECK-NEXT: uOps Per Cycle: 0.73 +# CHECK-NEXT: IPC: 0.73 +# CHECK-NEXT: Block RThroughput: 2.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 movq %mm0, %mm1 +# CHECK-NEXT: 1 1 0.25 movq %mm1, %mm2 +# CHECK-NEXT: 1 1 0.25 movq %mm2, %mm3 +# CHECK-NEXT: 1 1 0.25 movq %mm3, %mm4 +# CHECK-NEXT: 1 1 0.25 movq %mm4, %mm5 +# CHECK-NEXT: 1 1 0.25 movq %mm5, %mm6 +# CHECK-NEXT: 1 1 0.25 movq %mm6, %mm7 +# CHECK-NEXT: 1 1 0.25 movq %mm7, %mm0 + +# CHECK: Register File statistics: +# CHECK-NEXT: Total number of mappings created: 8 +# CHECK-NEXT: Max number of mappings used: 8 + +# CHECK: * Register File #1 -- Zn3FpPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 8 +# CHECK-NEXT: Max number of mappings used: 8 + +# CHECK: * Register File #2 -- Zn3IntegerPRF: +# CHECK-NEXT: Number of physical registers: 192 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn3AGU0 +# CHECK-NEXT: [1] - Zn3AGU1 +# CHECK-NEXT: [2] - Zn3AGU2 +# CHECK-NEXT: [3] - Zn3ALU0 +# CHECK-NEXT: [4] - Zn3ALU1 +# CHECK-NEXT: [5] - Zn3ALU2 +# CHECK-NEXT: [6] - Zn3ALU3 +# CHECK-NEXT: [7] - Zn3BRU1 +# CHECK-NEXT: [8] - Zn3FPP0 +# CHECK-NEXT: [9] - Zn3FPP1 +# CHECK-NEXT: [10] - Zn3FPP2 +# CHECK-NEXT: [11] - Zn3FPP3 +# CHECK-NEXT: [12.0] - Zn3FPP45 +# CHECK-NEXT: [12.1] - Zn3FPP45 +# CHECK-NEXT: [13] - Zn3FPSt +# CHECK-NEXT: [14.0] - Zn3LSU +# CHECK-NEXT: [14.1] - Zn3LSU +# CHECK-NEXT: [14.2] - Zn3LSU +# CHECK-NEXT: [15.0] - Zn3Load +# CHECK-NEXT: [15.1] - Zn3Load +# CHECK-NEXT: [15.2] - Zn3Load +# CHECK-NEXT: [16.0] - Zn3Store +# CHECK-NEXT: [16.1] - Zn3Store + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] +# CHECK-NEXT: - - - - - - - - 2.00 2.00 2.00 2.00 - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions: +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - - - - - - - movq %mm0, %mm1 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - - - - - - - movq %mm1, %mm2 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - - - - - - - movq %mm2, %mm3 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - - - - - - - - - - - movq %mm3, %mm4 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - - - - - - - movq %mm4, %mm5 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - - - - - - - movq %mm5, %mm6 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - - - - - - - movq %mm6, %mm7 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - - - - - - - - - - - movq %mm7, %mm0 + +# CHECK: Timeline view: +# CHECK-NEXT: 0 +# CHECK-NEXT: Index 0123456789 + +# CHECK: [0,0] DeER . . movq %mm0, %mm1 +# CHECK-NEXT: [0,1] D=eER. . movq %mm1, %mm2 +# CHECK-NEXT: [0,2] D==eER . movq %mm2, %mm3 +# CHECK-NEXT: [0,3] D===eER . movq %mm3, %mm4 +# CHECK-NEXT: [0,4] D====eER . movq %mm4, %mm5 +# CHECK-NEXT: [0,5] D=====eER . movq %mm5, %mm6 +# CHECK-NEXT: [0,6] .D=====eER. movq %mm6, %mm7 +# CHECK-NEXT: [0,7] .D======eER movq %mm7, %mm0 + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 1 1.0 1.0 0.0 movq %mm0, %mm1 +# CHECK-NEXT: 1. 1 2.0 0.0 0.0 movq %mm1, %mm2 +# CHECK-NEXT: 2. 1 3.0 0.0 0.0 movq %mm2, %mm3 +# CHECK-NEXT: 3. 1 4.0 0.0 0.0 movq %mm3, %mm4 +# CHECK-NEXT: 4. 1 5.0 0.0 0.0 movq %mm4, %mm5 +# CHECK-NEXT: 5. 1 6.0 0.0 0.0 movq %mm5, %mm6 +# CHECK-NEXT: 6. 1 6.0 0.0 0.0 movq %mm6, %mm7 +# CHECK-NEXT: 7. 1 7.0 0.0 0.0 movq %mm7, %mm0 +# CHECK-NEXT: 1 4.3 0.1 0.0