From: Maxime Ripard Date: Mon, 25 Oct 2021 15:29:01 +0000 (+0200) Subject: drm/vc4: hdmi: Raise the maximum clock rate X-Git-Tag: v6.6.17~3937^2~23^2~3513 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bd43e22bf28eadd69c176740da0fa9a9499aa872;p=platform%2Fkernel%2Flinux-rpi.git drm/vc4: hdmi: Raise the maximum clock rate Now that we have the infrastructure in place, we can raise the maximum pixel rate we can reach for HDMI0 on the BCM2711. HDMI1 is left untouched since its pixelvalve has a smaller FIFO and would need a clock faster than what we can provide to support the same modes. Acked-by: Thomas Zimmermann Reviewed-by: Dave Stevenson Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20211025152903.1088803-9-maxime@cerno.tech --- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 07a67bf..fe557c1 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -2373,7 +2373,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi0_regs", .card_name = "vc4-hdmi-0", - .max_pixel_clock = HDMI_14_MAX_TMDS_CLK, + .max_pixel_clock = 600000000, .registers = vc5_hdmi_hdmi0_fields, .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields), .phy_lane_mapping = {